Hi everyone,
I have some problem when I’m trying to use a slave as reference clock. My
application is based on rtai_rtdm_dc example and it is attached at the end of
this mail. The encountered problem is that the execution returns continuously
the following messages:
app_getTimeNS error: TimeBase greater than system time (timeBase: -4809954,
sysTime: 1467294001654551772)
app_getTimeNS error: TimeBase greater than system time (timeBase: -4810955,
sysTime: 1467294001655556313)
app_getTimeNS error: TimeBase greater than system time (timeBase: -4811956,
sysTime: 1467294001656548544)
app_getTimeNS error: TimeBase greater than system time (timeBase: -4812957,
sysTime: 1467294001657550067)
app_getTimeNS error: TimeBase greater than system time (timeBase: -4813958,
sysTime: 1467294001658543298)
app_getTimeNS error: TimeBase greater than system time (timeBase: -4814959,
sysTime: 1467294001659538712)
app_getTimeNS error: TimeBase greater than system time (timeBase: -4815960,
sysTime: 1467294001660554236)
app_getTimeNS error: TimeBase greater than system time (timeBase: -4816961,
sysTime: 1467294001661578083)
app_getTimeNS error: TimeBase greater than system time (timeBase: -4817962,
sysTime: 1467294001662547853)
where the timeBase value continuosly varies. The dmsg output is the following:
[20002.274528] EtherCAT: Requesting master 0...
[20002.274535] EtherCAT: Successfully requested master 0.
[20002.274628] EtherCAT 0: Domain0: Logical address 0x00000000, 5 byte,
expected working counter 2.
[20002.274631] EtherCAT 0: Datagram domain0-0-main: Logical offset
0x00000000, 5 byte, type LWR.
[20002.274673] EtherCAT 0: Master thread exited.
[20002.274677] EtherCAT 0: Starting EtherCAT-OP thread.
[20002.274889] EtherCAT WARNING 0: 1 datagram UNMATCHED!
[20002.356896] EtherCAT 0: Domain 0: Working counter changed to 1/2.
[20002.418739] EtherCAT 0: Slave states on main device: PREOP, OP.
[20003.357932] EtherCAT 0: Domain 0: 3 working counter changes - now 2/2.
[20004.274027] EtherCAT WARNING 0: 8 datagrams UNMATCHED!
[20004.277909] EtherCAT WARNING: Datagram ffff88003517c318 (domain0-0-main) was
SKIPPED 4 times.
[20008.152346] EtherCAT 0: Releasing master...
[20008.152364] EtherCAT 0: Master thread exited.
[20008.152379] EtherCAT 0: Starting EtherCAT-IDLE thread.
[20008.152699] EtherCAT 0: Released.
[20008.176023] EtherCAT 0: Slave states on main device: PREOP.
Anyone has any suggestion about this issue?
Thank you for your help.
Tommaso
#include <errno.h>
#include <signal.h>
#include <stdio.h>
#include <string.h>
#include <sys/resource.h>
#include <sys/time.h>
#include <sys/types.h>
#include <unistd.h>
#include <time.h>
#include <sys/mman.h>
#include <malloc.h>
#include <math.h>
#include <stdbool.h>
#include <sched.h>
/****************************************************************************/
#include "ecrt.h"
/****************************************************************************/
// Application parameters
#define FREQUENCY 1000 // Frequency set
#define CLOCK_TO_USE CLOCK_REALTIME // Its time represents seconds and
nanoseconds since the Epoch
#define MEASURE_TIMING 1 // 1 in order to measure all the time
values
/****************************************************************************/
#define NSEC_PER_SEC (1000000000L)
#define PERIOD_NS (NSEC_PER_SEC / FREQUENCY)
#define DIFF_NS(A, B) (((B).tv_sec - (A).tv_sec) * NSEC_PER_SEC + (B).tv_nsec -
(A).tv_nsec)
#define TIMESPEC2NS(T) ((uint64_t) (T).tv_sec * NSEC_PER_SEC + (T).tv_nsec)
#define sign(val) ({ typeof (val) _val = (val); ((_val > 0) - (_val < 0)); })
/* Return the sign of a number
*
* ie -1 for -ve value, 0 for 0, +1 for +ve value
*
* \retval the sign of the value
*/
/****************************************************************************/
// EtherCAT
static ec_master_t *master = NULL;
static ec_master_state_t master_state = {};
static ec_domain_t *domain1 = NULL;
static ec_domain_state_t domain1_state = {};
/****************************************************************************/
// EtherCAT synchronization variables
#define DC_FILTER_CNT 1024
#define SYNC_MASTER_TO_REF 1
static uint64_t dc_start_time_ns = 0LL;
static uint64_t dc_time_ns = 0;
#if SYNC_MASTER_TO_REF
static uint8_t dc_started = 0;
static int32_t dc_diff_ns = 0;
static int32_t prev_dc_diff_ns = 0;
static int64_t dc_diff_total_ns = 0LL;
static int64_t dc_delta_total_ns = 0LL;
static int dc_filter_idx = 0;
static int64_t dc_adjust_ns;
#endif
static int64_t system_time_base = 0LL;
static uint64_t wakeup_time = 0LL;
static uint64_t overruns = 0LL;
/****************************************************************************/
// Process data
#define BusCouplerPos 0, 0
#define DigOutSlavePos 0, 1
#define AnaOutSlavePos 0, 6
#define Beckhoff_EK1100 0x00000002, 0x044c2c52
#define Beckhoff_EL2004 0x00000002, 0x07d43052
#define Beckhoff_EL4002 0x00000002, 0x0fa23052
// offsets for PDO entries
static int off_dig_out;
static int off_ana_out;
static uint8_t *domain1_pd = NULL;
static unsigned int counter = 0;
static unsigned int blink = 0;
const struct timespec cycletime = {0, PERIOD_NS};
/*****************************************************************************/
struct timespec timespec_add(struct timespec time1, struct timespec time2) {
//Sum of two timespecs
struct timespec result;
if ((time1.tv_nsec + time2.tv_nsec) >= NSEC_PER_SEC) {
result.tv_sec = time1.tv_sec + time2.tv_sec + 1;
result.tv_nsec = time1.tv_nsec + time2.tv_nsec - NSEC_PER_SEC;
} else {
result.tv_sec = time1.tv_sec + time2.tv_sec;
result.tv_nsec = time1.tv_nsec + time2.tv_nsec;
}
return result;
}
/*****************************************************************************/
void check_domain1_state(FILE * f) {
ec_domain_state_t ds;
ecrt_domain_state(domain1, &ds);
if (ds.working_counter != domain1_state.working_counter)
fprintf(f,"Domain1: WC %u.\n", ds.working_counter);
if (ds.wc_state != domain1_state.wc_state)
fprintf(f,"Domain1: State %u.\n", ds.wc_state);
fflush(f);
domain1_state = ds;
}
/*****************************************************************************/
void check_master_state(FILE * f) {
ec_master_state_t ms;
ecrt_master_state(master, &ms);
if (ms.slaves_responding != master_state.slaves_responding)
fprintf(f,"%u slave(s).\n", ms.slaves_responding);
if (ms.al_states != master_state.al_states)
fprintf(f,"AL states: 0x%02X.\n", ms.al_states);
if (ms.link_up != master_state.link_up)
fprintf(f,"Link is %s.\n", ms.link_up ? "up" : "down");
fflush(f);
master_state = ms;
}
/****************************************************************************/
//Misc time functions:
uint64_t system_time_ns() { /* get the time in ns for
the current cpu (adjusted for the app time base)
*
* \ret the time in ns
*/
struct timespec auxTime;
uint64_t time;
clock_gettime(CLOCK_TO_USE, &auxTime);
time = TIMESPEC2NS(auxTime);
if (system_time_base > time) {
printf("app_getTimeNS error: TimeBase greater than system time
(timeBase: %lld, sysTime: %llu)\n", system_time_base, time);
return time;
}
else {
return time - system_time_base;
}
}
/****************************************************************************/
void syncDistClock(void) {
#if SYNC_MASTER_TO_REF
uint32_t ref_time = 0;
uint64_t prev_app_time = dc_time_ns;
#endif
dc_time_ns = system_time_ns();
// set master time in nano-seconds
ecrt_master_application_time(master, dc_time_ns);
#if SYNC_MASTER_TO_REF
// get reference clock time to synchronize master cycle
ecrt_master_reference_clock_time(master, &ref_time);
dc_diff_ns = (uint32_t) prev_app_time - ref_time;
#else
// sync reference clock to master
ecrt_master_sync_reference_clock(master);
#endif
// call to sync slaves to ref slave
ecrt_master_sync_slave_clocks(master);
}
/****************************************************************************/
//Computation of the slave-to-master time drift and adjust the master clock and
cycle period to match
//Called after the EtherCAT frame is sent to avoid time jitter in
syncDistClock()
int32_t updateMasterClock(void) {
#if SYNC_MASTER_TO_REF
// calc drift (via un-normalised time diff)
int32_t delta = dc_diff_ns - prev_dc_diff_ns;
prev_dc_diff_ns = dc_diff_ns;
// normalise the time diff
dc_diff_ns =
((dc_diff_ns + (PERIOD_NS / 2)) % PERIOD_NS) - (PERIOD_NS / 2);
// only update if primary master
if (dc_started) {
// add to totals
dc_diff_total_ns += dc_diff_ns;
dc_delta_total_ns += delta;
dc_filter_idx++;
if (dc_filter_idx >= DC_FILTER_CNT) {
// add rounded delta average
dc_adjust_ns +=
((dc_delta_total_ns + (DC_FILTER_CNT / 2)) / DC_FILTER_CNT);
// and add adjustment for general diff (to pull in drift)
dc_adjust_ns += sign(dc_diff_total_ns / DC_FILTER_CNT);
// limit crazy numbers (0.1% of std cycle time)
if (dc_adjust_ns < -1000) {
dc_adjust_ns = -1000;
}
if (dc_adjust_ns > 1000) {
dc_adjust_ns = 1000;
}
// reset
dc_diff_total_ns = 0LL;
dc_delta_total_ns = 0LL;
dc_filter_idx = 0;
}
// add cycles adjustment to time base (including a spot adjustment)
system_time_base += dc_adjust_ns + sign(dc_diff_ns);
} else {
dc_started = (dc_diff_ns != 0);
if (dc_started) {
// output first diff
printf("First master diff: %d.\n", dc_diff_ns);
// record the time of this initial cycle
dc_start_time_ns = dc_time_ns;
}
}
#endif
}
/*******************************************************************************/
void cyclic_task() {
FILE * f =
fopen("/home/temis/Documenti/Compilazione_c/Dc_user/SlaveRef/data1KHzRTFIFOSlaveRef.txt",
"w+");
fprintf(f,"Reference:period min/max execution min/max latency min/max\n");
struct timespec wakeupTime;
#ifdef MEASURE_TIMING
struct timespec startTime, endTime, lastStartTime = {};
uint32_t period_ns = 0, exec_ns = 0, latency_ns = 0,
latency_min_ns = 0, latency_max_ns = 0,
period_min_ns = 0, period_max_ns = 0,
exec_min_ns = 0, exec_max_ns = 0;
#endif
// get current time from the clock set in "CLOCK_TO_USE" and put it into
wakeupTime
clock_gettime(CLOCK_TO_USE, &wakeupTime);
while(1) {
wakeupTime = timespec_add(wakeupTime, cycletime);
clock_nanosleep(CLOCK_TO_USE, TIMER_ABSTIME, &wakeupTime, NULL);
#ifdef MEASURE_TIMING
clock_gettime(CLOCK_TO_USE, &startTime);
latency_ns = DIFF_NS(wakeupTime, startTime);
period_ns = DIFF_NS(lastStartTime, startTime);
exec_ns = DIFF_NS(lastStartTime, endTime);
lastStartTime = startTime;
if (latency_ns > latency_max_ns) {
latency_max_ns = latency_ns;
}
if (latency_ns < latency_min_ns) {
latency_min_ns = latency_ns;
}
if (period_ns > period_max_ns) {
period_max_ns = period_ns;
}
if (period_ns < period_min_ns) {
period_min_ns = period_ns;
}
if (exec_ns > exec_max_ns) {
exec_max_ns = exec_ns;
}
if (exec_ns < exec_min_ns) {
exec_min_ns = exec_ns;
}
#endif
// receive process data
ecrt_master_receive(master);
ecrt_domain_process(domain1);
// check process data state (optional)
check_domain1_state(f);
if (counter) {
counter--;
} else { // do this at 1 Hz
counter = FREQUENCY;
// check for master state (optional)
check_master_state(f);
#ifdef MEASURE_TIMING
// output timing stats
fprintf(f,"%10u\t%10u\t%10u\t%10u\t%10u\t%10u\n", period_min_ns,
period_max_ns, exec_min_ns, exec_max_ns,
latency_min_ns, latency_max_ns);
fflush(f);
period_max_ns = 0;
period_min_ns = 0xffffffff;
exec_max_ns = 0;
exec_min_ns = 0xffffffff;
latency_max_ns = 0;
latency_min_ns = 0xffffffff;
#endif
// calculate new process data
blink = !blink;
}
// write process data
EC_WRITE_U8(domain1_pd + off_dig_out, blink ? 0x66 : 0x99);
// send process data
ecrt_domain_queue(domain1);
syncDistClock();
ecrt_master_send(master);
updateMasterClock();
#ifdef MEASURE_TIMING
clock_gettime(CLOCK_TO_USE, &endTime);
#endif
}
}
/****************************************************************************/
int main(int argc, char **argv)
{
ec_slave_config_t *sc, *sc_ek1100;
int ret;
if (mlockall(MCL_CURRENT | MCL_FUTURE) == -1) {
perror("mlockall failed");
return -1;
}
master = ecrt_request_master(0);
if (!master)
return -1;
domain1 = ecrt_master_create_domain(master);
if (!domain1)
return -1;
// Create configuration for bus coupler
sc_ek1100 = ecrt_master_slave_config(master, BusCouplerPos,
Beckhoff_EK1100);
if (!sc)
return -1;
//Create configuration for digital output
if (!(sc = ecrt_master_slave_config(master, DigOutSlavePos,
Beckhoff_EL2004))) {
fprintf(stderr, "Failed to get slave configuration.\n");
return -1;
}
off_dig_out = ecrt_slave_config_reg_pdo_entry(sc, 0x7000, 1, domain1, NULL);
if (off_dig_out < 0)
return -1;
//Create configuration for analog output
if (!(sc = ecrt_master_slave_config(master, AnaOutSlavePos,
Beckhoff_EL4002))) {
fprintf(stderr, "Failed to get slave configuration.\n");
return -1;
}
off_ana_out = ecrt_slave_config_reg_pdo_entry(sc, 0x7000, 1, domain1, NULL);
if (off_dig_out < 0)
return -1;
// configure SYNC signals for this slave
ecrt_slave_config_dc(sc, 0x0700, PERIOD_NS, 4400000, 0, 0);
/* Set the initial master time and select a slave to use as the DC
* reference clock, otherwise pass NULL to auto select the first capable
* slave. Note: This can be used whether the master or the ref slave will
* be used as the systems master DC clock.
*/
dc_start_time_ns = system_time_ns();
dc_time_ns = dc_start_time_ns;
/* Attention: The initial application time is also used for phase
* calculation for the SYNC0/1 interrupts. Please be sure to call it at
* the correct phase to the realtime cycle.
*/
ecrt_master_application_time(master, dc_start_time_ns); // Set initial
app time
ret = ecrt_master_select_reference_clock(master, sc_ek1100);
if (ret < 0) {
fprintf(stderr, "Failed to select reference clock: %s\n",
strerror(-ret));
return ret;
}
printf("Activating master...\n");
if (ecrt_master_activate(master))
return -1;
if (!(domain1_pd = ecrt_domain_data(domain1))) {
return -1;
}
struct sched_param param;
param.sched_priority = 99; /*99 = sched_get_priority_max(SCHED_FIFO)*/
// 99 is the maximal priority
if(sched_setscheduler(0, SCHED_FIFO, ¶m) == -1) {
perror("sched_setscheduler failed");
exit(-1);
}
printf("Starting cyclic function.\n");
cyclic_task();
return 0;
}
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