[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-08-09 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 Jussi Lehtola jussi.leht...@iki.fi changed: What|Removed |Added

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-07-27 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 Fedora Update System upda...@fedoraproject.org changed: What|Removed |Added

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-07-27 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #53 from Fedora Update System upda...@fedoraproject.org 2009-07-27 17:31:24 EDT --- verilator-3.712-1.fc10 has

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-07-27 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 Fedora Update System upda...@fedoraproject.org changed: What|Removed |Added

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-07-27 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #52 from Fedora Update System upda...@fedoraproject.org 2009-07-27 17:28:46 EDT --- verilator-3.712-1.fc11 has

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-07-26 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #48 from Lane dir...@gmail.com 2009-07-26 18:03:40 EDT --- Chitlesh, When I build the EL-5 release of

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-07-26 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #49 from Chitlesh GOORAH chitl...@gmail.com 2009-07-26 18:10:08 EDT --- Give me a few days. I'm in holidays.

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-07-26 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #51 from Fedora Update System upda...@fedoraproject.org 2009-07-26 18:35:36 EDT --- verilator-3.712-1.fc11 has

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-07-26 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #50 from Fedora Update System upda...@fedoraproject.org 2009-07-26 18:35:30 EDT --- verilator-3.712-1.fc10 has

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-07-23 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 Jason Tibbitts ti...@math.uh.edu changed: What|Removed |Added

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-07-22 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 Lane dir...@gmail.com changed: What|Removed |Added

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-07-22 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 Lane dir...@gmail.com changed: What|Removed |Added

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-07-21 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #43 from Chitlesh GOORAH chitl...@gmail.com 2009-07-21 04:34:00 EDT --- Can you give me your Fedora FAS

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-07-21 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #44 from Lane dir...@gmail.com 2009-07-21 12:21:53 EDT --- username: dirjud I just applied to the packager

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-07-21 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #45 from Chitlesh GOORAH chitl...@gmail.com 2009-07-21 12:29:06 EDT --- You are now sponsored. It might be

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-07-20 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #42 from Lane dir...@gmail.com 2009-07-21 01:17:03 EDT --- The fedora_cvs flag is not editable for me. How do

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-07-14 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #41 from Chitlesh GOORAH chitl...@gmail.com 2009-07-14 17:24:53 EDT --- There is a new upstream release --

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-07-10 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #37 from Chitlesh GOORAH chitl...@gmail.com 2009-07-10 22:38:41 EDT --- Ping ? -- Configure bugmail:

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-07-10 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #38 from Lane dir...@gmail.com 2009-07-10 23:13:06 EDT --- Who are you pinging? What are the next steps? Is

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-07-10 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #39 from Jason Tibbitts ti...@math.uh.edu 2009-07-10 23:19:56 EDT --- Since the package is approved, it is up

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-07-10 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #40 from Chitlesh GOORAH chitl...@gmail.com 2009-07-10 23:21:18 EDT --- hehe to you Lane. No the process isn't

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-07-05 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #36 from Chitlesh GOORAH chitl...@gmail.com 2009-07-05 08:19:11 EDT --- - MUST: The package is named according

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-07-05 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 Chitlesh GOORAH chitl...@gmail.com changed: What|Removed |Added

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-06-28 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 Bug 468516 depends on bug 478759, which changed state. Bug 478759 Summary: Review Request: perl-SystemPerl - SystemPerl Perl

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-06-13 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #34 from Chitlesh GOORAH chitl...@gmail.com 2009-06-13 15:43:47 EDT --- Lane, the package is ready. please

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-06-13 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 Chitlesh GOORAH chitl...@gmail.com changed: What|Removed |Added

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-06-12 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #32 from Chitlesh GOORAH chitl...@gmail.com 2009-06-12 04:54:09 EDT --- The build is failing under F-11. You

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-06-12 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #33 from wsny...@wsnyder.org 2009-06-12 09:53:47 EDT --- Grr, every GCC version has slightly different things

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-06-09 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #31 from Lane dir...@gmail.com 2009-06-09 15:26:11 EDT --- I updated verilator to the latest 3.710 and also

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-06-04 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #30 from Chitlesh GOORAH chitl...@gmail.com 2009-06-04 04:31:52 EDT --- ping Lane ? -- Configure bugmail:

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-03-28 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #29 from wsny...@wsnyder.org 2009-03-28 11:19:13 EDT --- FYI Verilator 3.702 allows you to set and compile

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-01-28 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 wsny...@wsnyder.org changed: What|Removed |Added

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-01-10 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #27 from Lane dir...@gmail.com 2009-01-10 17:37:49 EDT --- (In reply to comment #26) in file (of verilator)

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-01-09 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #25 from Lane dir...@gmail.com 2009-01-09 12:21:48 EDT --- New files available: Spec URL:

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-01-09 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #26 from Chitlesh GOORAH cgoo...@yahoo.com.au 2009-01-09 13:05:10 EDT --- in file (of verilator)

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-01-04 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 Chitlesh GOORAH cgoo...@yahoo.com.au changed: What|Removed |Added

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-01-04 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #22 from Chitlesh GOORAH cgoo...@yahoo.com.au 2009-01-04 06:16:28 EDT --- (In reply to comment #21) If you

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-01-04 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #23 from Chitlesh GOORAH cgoo...@yahoo.com.au 2009-01-04 13:06:33 EDT --- (In reply to comment #11) #004:

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-01-04 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #24 from Chitlesh GOORAH cgoo...@yahoo.com.au 2009-01-04 13:07:39 EDT --- Use perl-SystemPerl as from now on:

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-01-04 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 Chitlesh GOORAH cgoo...@yahoo.com.au changed: What|Removed |Added

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-01-03 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #19 from Chitlesh GOORAH cgoo...@yahoo.com.au 2009-01-03 18:35:56 EDT --- Lane, you have commented

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-01-03 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #20 from Chitlesh GOORAH cgoo...@yahoo.com.au 2009-01-03 19:26:35 EDT --- #001: These should not be shipped

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-01-03 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #21 from Lane dir...@gmail.com 2009-01-03 19:34:42 EDT --- (In reply to comment #20) #002: do we need to

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-01-02 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #17 from manuel wolfshant wo...@nobugconsulting.ro 2009-01-02 14:45:41 EDT --- Lane, at

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-01-02 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #16 from manuel wolfshant wo...@nobugconsulting.ro 2009-01-02 14:43:26 EDT --- The suggestion was to package

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-01-02 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #18 from Lane dir...@gmail.com 2009-01-02 15:23:18 EDT --- I updated the spec file to move the examples from

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-01-01 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #11 from Lane dir...@gmail.com 2009-01-01 10:34:07 EDT --- #004: Are these useful ? /usr/share/verilator/bin

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-01-01 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #12 from Lane dir...@gmail.com 2009-01-01 11:14:59 EDT --- Created an attachment (id=328036) --

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-01-01 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #13 from Lane dir...@gmail.com 2009-01-01 11:19:13 EDT --- I have an updated spec and src file you can download

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-01-01 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #15 from Lane dir...@gmail.com 2009-01-01 11:26:33 EDT --- This is a URL correction of Comment #13 I have an

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2009-01-01 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #14 from Lane dir...@gmail.com 2009-01-01 11:25:42 EDT --- Chitlesh, I would like to get verilator into Fedora

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2008-12-06 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #9 from Chitlesh GOORAH [EMAIL PROTECTED] 2008-12-06 05:36:20 EDT --- #001: Summary:Verilator is a

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2008-12-06 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #10 from Lane [EMAIL PROTECTED] 2008-12-06 05:48:30 EDT --- I am swamped right now with a tape out. I will try

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2008-12-04 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #8 from Chitlesh GOORAH [EMAIL PROTECTED] 2008-12-04 18:30:56 EDT --- Ping ? -- Configure bugmail:

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2008-11-19 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #7 from Chitlesh GOORAH [EMAIL PROTECTED] 2008-11-19 17:03:44 EDT --- #001 You can replace %setup -q -n

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2008-11-02 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 David Woodhouse [EMAIL PROTECTED] changed: What|Removed |Added

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2008-10-26 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #4 from Chitlesh GOORAH [EMAIL PROTECTED] 2008-10-26 06:27:40 EDT --- True, but since it's his first package

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2008-10-26 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #5 from Lane [EMAIL PROTECTED] 2008-10-26 11:14:00 EDT --- I have incorporated Chitlesh's feedbackc into an

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2008-10-26 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 Itamar Reis Peixoto [EMAIL PROTECTED] changed: What|Removed |Added

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2008-10-25 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 Lane [EMAIL PROTECTED] changed: What|Removed |Added

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2008-10-25 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 Chitlesh GOORAH [EMAIL PROTECTED] changed: What|Removed |Added

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2008-10-25 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #2 from Chitlesh GOORAH [EMAIL PROTECTED] 2008-10-25 12:36:18 EDT --- #001: Release:2%{?dist} This

[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

2008-10-25 Thread bugzilla
Please do not reply directly to this email. All additional comments should be made in the comments box of this bug. https://bugzilla.redhat.com/show_bug.cgi?id=468516 --- Comment #3 from manuel wolfshant [EMAIL PROTECTED] 2008-10-25 22:00:53 EDT --- Actually, generally speaking, there is