Re: [FFmpeg-devel] [PATCH 0/3] RISC-V V swscale pixel format conversions

2022-09-28 Thread Lynne
Sep 28, 2022, 17:29 by r...@remlab.net: > Hello, > > This adds the pixel format conversions that appear to covered by checkasm > (plus YUYV to I422 for which a patch was sent already). > > RVV has no register-register interleaving/deinterleaving instructions, so this > uses strided loads or

[FFmpeg-devel] [PATCH 0/3] RISC-V V swscale pixel format conversions

2022-09-28 Thread RĂ©mi Denis-Courmont
Hello, This adds the pixel format conversions that appear to covered by checkasm (plus YUYV to I422 for which a patch was sent already). RVV has no register-register interleaving/deinterleaving instructions, so this uses strided loads or stores instead. Another option would be full register