Hi,
[I wish to apologize for the crossposting, but AFAICS quite a few
coreboot developers are not subscribed to the flashrom list yet.
Followup is set to flashrom@flashrom.org and I'll make sure your replies
will be whitelisted and end up on the flashrom list.]
flashrom has reached a state where
PCI device BARs of all types had only bits 1:0 cleared while reading the
address. That was correct for IO BARs, but failed to mask bit 3:2 for
MEM BARs, resulting in odd offsets for prefetchable MEM BARs and for
64-bit capable MEM BARs.
Mask the correct number of bits for all types of BARs and add
regards,
Sylvain BERTRAND
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This board (GA-MA74GM-S2H) has the same list of pciids as the GA-MA78M-S2H,
so I narroved search conditions by populating corresponding board_pciid_enable
entry for GA-MA78M-S2H with DMI pattern.
I don't have GA-MA78M-S2H available, so, please, test whether this works or not.
P.S. I made a typo i
This board (GA-MA74GM-S2H) has the same list of pciids as the GA-MA78M-S2H,
so I narroved search conditions by population corresponding board_pciid_enable
entry for GA-MA78M-S2H with DMI pattern.
I don't have GA-MA78M-S2H available, so, please, test whether this works or not.
Signed-off-by: Peter