On 15.09.2010 12:20, Carl-Daniel Hailfinger wrote:
> On 15.09.2010 12:13, Michael Karcher wrote:
>
>> Am Mittwoch, den 15.09.2010, 11:58 +0200 schrieb Carl-Daniel Hailfinger:
>>
>>
>>> Delay between probe and subsequent operations.
>>>
>>>
>> [...]
>>
>>
>>> Signed-of
On 15.09.2010 12:13, Michael Karcher wrote:
> Am Mittwoch, den 15.09.2010, 11:58 +0200 schrieb Carl-Daniel Hailfinger:
>
>> Delay between probe and subsequent operations.
>>
> [...]
>
>> Signed-off-by: Carl-Daniel Hailfinger
>>
> Acked-by: Michael Karcher
>
Thanks for the quic
Am Mittwoch, den 15.09.2010, 11:58 +0200 schrieb Carl-Daniel Hailfinger:
> Delay between probe and subsequent operations.
[...]
> Signed-off-by: Carl-Daniel Hailfinger
Acked-by: Michael Karcher
Regards,
Michael Karcher
___
flashrom mailing list
fla
Delay between probe and subsequent operations.
Some flash chips need time to exit ID mode, and while we take care of
correct timing for the matching probe, subsequent probes may have
totally different timing, and that can lead to garbage responses from
the flash chip during the first accesses afte