Florian Klaempfl wrote:
Does the ARM ABI require that the stack is aligned to 8 byte boundaries?
Sorry, I don't know.
Regards, Bernd.
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Micha Nelissen wrote:
Bernd Mueller wrote:
ok, it does not work. This is what I guessed. But I am in doubt about
your current fix:
asm
bic r0,sp,#7
ldrd r0,[r0]
end;
r0 is double word (8 byte) aligned now, but does it always point to a
valid memory location? IMHO something like t
Bernd Mueller wrote:
ok, it does not work. This is what I guessed. But I am in doubt about
your current fix:
asm
bic r0,sp,#7
ldrd r0,[r0]
end;
r0 is double word (8 byte) aligned now, but does it always point to a
valid memory location? IMHO something like that would be better:
Bernd Mueller schrieb:
> Bernd Mueller wrote:
>>
>> You chose ldrd r0, [sp] to force the SIGILL on ARMv4. According to the
>> docs the load address has to be double word (8 byte) aligned,
>> otherwise a Bus Error/Misaligned data access Error on ARMv5 would
>> occur. Is it save to use sp in your way
Bernd Mueller wrote:
You chose ldrd r0, [sp] to force the SIGILL on ARMv4. According to the
docs the load address has to be double word (8 byte) aligned, otherwise
a Bus Error/Misaligned data access Error on ARMv5 would occur. Is it
save to use sp in your way?
ok, it does not work. This is
Florian Klaempfl wrote:
I commited a fix in 10458. I tried to fix SignalToRunerror without
assembler, maybe it works.
yes it works, thanks.
You chose ldrd r0, [sp] to force the SIGILL on ARMv4. According to the
docs the load address has to be double word (8 byte) aligned, otherwise
a Bus Er
Bernd Mueller schrieb:
> Florian Klaempfl wrote:
>> Bernd Mueller schrieb:
>>> Florian Klaempfl wrote:
CPUs supporting CLZ might not support PLD. Can you test if using ldrd
works?
>>> yes, ldrd works.
>>
>> Ok, my question was not very good ;) I meant, can we use ldrd, i.e. does
>> ldrd c
Florian Klaempfl wrote:
Bernd Mueller schrieb:
Florian Klaempfl wrote:
CPUs supporting CLZ might not support PLD. Can you test if using ldrd
works?
yes, ldrd works.
Ok, my question was not very good ;) I meant, can we use ldrd, i.e. does
ldrd cause a sigill exception on ARMv4?
:-)
I unders
Bernd Mueller schrieb:
> Florian Klaempfl wrote:
>> CPUs supporting CLZ might not support PLD. Can you test if using ldrd
>> works?
>
> yes, ldrd works.
Ok, my question was not very good ;) I meant, can we use ldrd, i.e. does
ldrd cause a sigill exception on ARMv4?
___
Florian Klaempfl wrote:
CPUs supporting CLZ might not support PLD. Can you test if using ldrd works?
yes, ldrd works.
Regards, Bernd.
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Bernd Mueller schrieb:
> Florian Klaempfl wrote:
>> Bernd Mueller schrieb:
>>> Hello,
>>>
>>> the ARMv5 runtime detection in rtl/arm/arm.inc fails, because the used
>>> pld instruction does not raise SIGILL on ARM architectures ARMv4 and
>>> below. If you would use an instruction which raises a SIG
Florian Klaempfl wrote:
Bernd Mueller schrieb:
Hello,
the ARMv5 runtime detection in rtl/arm/arm.inc fails, because the used
pld instruction does not raise SIGILL on ARM architectures ARMv4 and
below. If you would use an instruction which raises a SIGILL, it would
still fail, because SignalToRu
Bernd Mueller schrieb:
> Hello,
>
> the ARMv5 runtime detection in rtl/arm/arm.inc fails, because the used
> pld instruction does not raise SIGILL on ARM architectures ARMv4 and
> below. If you would use an instruction which raises a SIGILL, it would
> still fail, because SignalToRunerror in rtl/l
Hello,
the ARMv5 runtime detection in rtl/arm/arm.inc fails, because the used
pld instruction does not raise SIGILL on ARM architectures ARMv4 and
below. If you would use an instruction which raises a SIGILL, it would
still fail, because SignalToRunerror in rtl/linux/arm/sighnd.inc does
not r
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