Re: [fpc-devel] arm embedded cortexm3 procedure address

2010-07-15 Thread Michael Schnell
Sorry: BLX. -Michael ___ fpc-devel maillist - fpc-devel@lists.freepascal.org http://lists.freepascal.org/mailman/listinfo/fpc-devel

Re: [fpc-devel] arm embedded cortexm3 procedure address

2010-07-15 Thread Michael Schnell
... And of course when using a memory cell to store a procedure address, BX is used to call the procedure. -Michael ___ fpc-devel maillist - fpc-devel@lists.freepascal.org http://lists.freepascal.org/mailman/listinfo/fpc-devel

Re: [fpc-devel] arm embedded cortexm3 procedure address

2010-07-15 Thread Michael Schnell
On 07/15/2010 11:33 AM, Jeppe Johansen wrote: I think it is on Thumb2 devices. To my understanding, they did so on purpose so you no longer have to use interwork intermidiate functions to switch between arm and thumb mode That seems to be not BL but BX: http://infocenter.arm.com/help/topic/

Re: [fpc-devel] arm embedded cortexm3 procedure address

2010-07-15 Thread Jeppe Johansen
I think it is on Thumb2 devices. To my understanding, they did so on purpose so you no longer have to use interwork intermidiate functions to switch between arm and thumb mode Michael Schnell skrev: On 07/15/2010 11:12 AM, Geoffrey Barton wrote: A normal procedural call seems to assemble as

Re: [fpc-devel] arm embedded cortexm3 procedure address

2010-07-15 Thread Michael Schnell
On 07/15/2010 11:12 AM, Geoffrey Barton wrote: A normal procedural call seems to assemble as a 'BL' to an even address? I doubt that it's possible to call thumb code from "ARM" code with a "BL". -Michael ___ fpc-devel maillist - fpc-devel@lists.fre

Re: [fpc-devel] arm embedded cortexm3 procedure address

2010-07-15 Thread Jonas Maebe
Geoffrey Barton wrote on Thu, 15 Jul 2010: On 14 Jul 2010, at 17:35, Jonas Maebe wrote: To identify the code as Thumb code. I was aware of the requirement to add one to the address of an ISR, but not to other calls. The address of the symbol is set to an odd value so that the linker c

Re: [fpc-devel] arm embedded cortexm3 procedure address

2010-07-15 Thread Geoffrey Barton
On 14 Jul 2010, at 17:35, Jonas Maebe wrote: Geoffrey Barton wrote on Wed, 14 Jul 2010: the resulting constant disassembles as:- 1bc:01a5.word 0x01a5 which seems to be one greater than the address of the procedure. Is this right? Yes. If so, why? To identify the

Re: [fpc-devel] arm embedded cortexm3 procedure address

2010-07-14 Thread Jonas Maebe
Geoffrey Barton wrote on Wed, 14 Jul 2010: the resulting constant disassembles as:- 1bc:01a5.word 0x01a5 which seems to be one greater than the address of the procedure. Is this right? Yes. If so, why? To identify the code as Thumb code. also, why does the compiler

[fpc-devel] arm embedded cortexm3 procedure address

2010-07-14 Thread Geoffrey Barton
disassembling from an elf file produce by FPC cross-assembling for arm embedded, an empty procedure:- procedure UART0int:nostackframe; begin end; looks like this:- 01a4 : 1a4: 46f7mov pc, lr 1a6: 46c0nop (mov r8, r8) if I grab the ad