Re: Programmatically cache line

2018-01-05 Thread David Chisnall
On 5 Jan 2018, at 02:46, Jon Brawn wrote: > This idea of Arm big.LITTLE systems having cache lines of different lengths > really, really bothers me - how on earth is the cache coherency supposed to > work in such a system? I doubt the usual cache coherency protocols would work > - probably need

Re: Programmatically cache line

2018-01-04 Thread Jon Brawn
> On Jan 4, 2018, at 4:03 AM, David Chisnall wrote: > > On 3 Jan 2018, at 22:12, Nathan Whitehorn wrote: >> >> On 01/03/18 13:37, Ed Schouten wrote: >>> 2018-01-01 11:36 GMT+01:00 Konstantin Belousov : >>> On x86, the CPUID instruction leaf 0x1 returns the information in >>> %ebx regi

Re: Programmatically cache line

2018-01-04 Thread blubee blubeeme
On Fri, Jan 5, 2018 at 2:29 AM, Konstantin Belousov wrote: > On Thu, Jan 04, 2018 at 10:03:32AM +, David Chisnall wrote: > > On 3 Jan 2018, at 22:12, Nathan Whitehorn > wrote: > > > > > > On 01/03/18 13:37, Ed Schouten wrote: > > >> 2018-01-01 11:36 GMT+01:00 Konstantin Belousov : > > >>

Re: Programmatically cache line

2018-01-04 Thread Konstantin Belousov
On Thu, Jan 04, 2018 at 10:03:32AM +, David Chisnall wrote: > On 3 Jan 2018, at 22:12, Nathan Whitehorn wrote: > > > > On 01/03/18 13:37, Ed Schouten wrote: > >> 2018-01-01 11:36 GMT+01:00 Konstantin Belousov : > >> On x86, the CPUID instruction leaf 0x1 returns the information in > >

Re: Programmatically cache line

2018-01-04 Thread David Chisnall
On 3 Jan 2018, at 22:12, Nathan Whitehorn wrote: > > On 01/03/18 13:37, Ed Schouten wrote: >> 2018-01-01 11:36 GMT+01:00 Konstantin Belousov : >> On x86, the CPUID instruction leaf 0x1 returns the information in >> %ebx register. > Hm, weird. Why don't we extend sysctl to include this

Re: Programmatically cache line

2018-01-03 Thread Nathan Whitehorn
On 01/03/18 13:37, Ed Schouten wrote: 2018-01-01 11:36 GMT+01:00 Konstantin Belousov : On x86, the CPUID instruction leaf 0x1 returns the information in %ebx register. Hm, weird. Why don't we extend sysctl to include this info? For the same reason we do not provide a sysctl to add two intege

Re: Programmatically cache line

2018-01-03 Thread Ed Schouten
2018-01-01 11:36 GMT+01:00 Konstantin Belousov : >> >> On x86, the CPUID instruction leaf 0x1 returns the information in >> >> %ebx register. >> > >> > Hm, weird. Why don't we extend sysctl to include this info? > > For the same reason we do not provide a sysctl to add two integers. I strongly agr

Re: Programmatically cache line

2018-01-03 Thread Maurizio Vairani
2018-01-02 2:27 GMT+01:00 blubee blubeeme : > On Tue, Jan 2, 2018 at 12:26 AM, Ian Lepore wrote: > > > On Mon, 2018-01-01 at 12:36 +0200, Konstantin Belousov wrote: > > > On Mon, Jan 01, 2018 at 06:52:37AM +, David Chisnall wrote: > > > > > > > > On 1 Jan 2018, at 05:09, Adrian Chadd > wrote

Re: Programmatically cache line

2018-01-01 Thread blubee blubeeme
On Tue, Jan 2, 2018 at 12:26 AM, Ian Lepore wrote: > On Mon, 2018-01-01 at 12:36 +0200, Konstantin Belousov wrote: > > On Mon, Jan 01, 2018 at 06:52:37AM +, David Chisnall wrote: > > > > > > On 1 Jan 2018, at 05:09, Adrian Chadd wrote: > > > > > > > > > > > > On 30 December 2017 at 00:28, Ko

Re: Programmatically cache line

2018-01-01 Thread Ian Lepore
On Mon, 2018-01-01 at 12:36 +0200, Konstantin Belousov wrote: > On Mon, Jan 01, 2018 at 06:52:37AM +, David Chisnall wrote: > > > > On 1 Jan 2018, at 05:09, Adrian Chadd wrote: > > > > > > > > > On 30 December 2017 at 00:28, Konstantin Belousov wrote: > > > > > > > > On Sat, Dec 30, 2017

Re: Programmatically cache line

2018-01-01 Thread Konstantin Belousov
On Mon, Jan 01, 2018 at 06:52:37AM +, David Chisnall wrote: > On 1 Jan 2018, at 05:09, Adrian Chadd wrote: > > > > On 30 December 2017 at 00:28, Konstantin Belousov > > wrote: > >> On Sat, Dec 30, 2017 at 07:50:19AM +, blubee blubeeme wrote: > >>> Is there some way to programmatically g

Re: Programmatically cache line

2018-01-01 Thread David Chisnall
On 1 Jan 2018, at 05:09, Adrian Chadd wrote: > > On 30 December 2017 at 00:28, Konstantin Belousov wrote: >> On Sat, Dec 30, 2017 at 07:50:19AM +, blubee blubeeme wrote: >>> Is there some way to programmatically get the CPU cache line sizes on >>> FreeBSD? >> >> There are, all of them are M

Re: Programmatically cache line

2017-12-31 Thread Adrian Chadd
On 30 December 2017 at 00:28, Konstantin Belousov wrote: > On Sat, Dec 30, 2017 at 07:50:19AM +, blubee blubeeme wrote: >> Is there some way to programmatically get the CPU cache line sizes on >> FreeBSD? > > There are, all of them are MD. > > On x86, the CPUID instruction leaf 0x1 returns the

Re: Programmatically cache line

2017-12-30 Thread Konstantin Belousov
On Sat, Dec 30, 2017 at 07:50:19AM +, blubee blubeeme wrote: > Is there some way to programmatically get the CPU cache line sizes on > FreeBSD? There are, all of them are MD. On x86, the CPUID instruction leaf 0x1 returns the information in %ebx register. _

Programmatically cache line

2017-12-29 Thread blubee blubeeme
Is there some way to programmatically get the CPU cache line sizes on FreeBSD? ___ freebsd-current@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/freebsd-current To unsubscribe, send any mail to "freebsd-current-unsubscr...@freebsd.or