On Mar 26, 2011, at 8:43 AM, Jing Huang wrote:
Hi,
Thanks for you all sincerely. Under your guidance, I read the
specification of TSC in Intel Manual and learned the hardware feature
of TSC:
Processor families increment the time-stamp counter differently:
• For Pentium M processors
On 3/27/2011 5:32 PM, Warner Losh wrote:
On Mar 26, 2011, at 8:43 AM, Jing Huang wrote:
Hi,
Thanks for you all sincerely. Under your guidance, I read the
specification of TSC in Intel Manual and learned the hardware feature
of TSC:
Processor families increment the time-stamp counter
On 3/27/11 3:32 PM, Warner Losh wrote:
On Mar 26, 2011, at 8:43 AM, Jing Huang wrote:
Hi,
Thanks for you all sincerely. Under your guidance, I read the
specification of TSC in Intel Manual and learned the hardware feature
of TSC:
Processor families increment the time-stamp counter
On Mar 27, 2011, at 10:29 PM, Julian Elischer wrote:
On 3/27/11 3:32 PM, Warner Losh wrote:
On Mar 26, 2011, at 8:43 AM, Jing Huang wrote:
Hi,
Thanks for you all sincerely. Under your guidance, I read the
specification of TSC in Intel Manual and learned the hardware feature
of TSC:
On 2011-Mar-25 08:18:38 -0400, John Baldwin j...@freebsd.org wrote:
For modern Intel CPUs you can just assume that the TSCs are in sync across
packages. They also have invariant TSC's meaning that the frequency doesn't
change.
Synchronised P-state invariant TSCs vastly simplify the problem but
On Sat, Mar 26, 2011 at 11:16:46PM +1100, Peter Jeremy wrote:
On 2011-Mar-25 08:18:38 -0400, John Baldwin j...@freebsd.org wrote:
For modern Intel CPUs you can just assume that the TSCs are in sync across
packages. They also have invariant TSC's meaning that the frequency doesn't
change.
On Saturday, March 26, 2011 08:16:46 am Peter Jeremy wrote:
On 2011-Mar-25 08:18:38 -0400, John Baldwin j...@freebsd.org wrote:
For modern Intel CPUs you can just assume that the TSCs are in sync across
packages. They also have invariant TSC's meaning that the frequency
doesn't change.
Hi,
Thanks for you all sincerely. Under your guidance, I read the
specification of TSC in Intel Manual and learned the hardware feature
of TSC:
Processor families increment the time-stamp counter differently:
• For Pentium M processors (family [06H], models [09H, 0DH]); for Pentium 4
On Sat, Mar 26, 2011 at 10:12:32AM -0400, John Baldwin wrote:
On Saturday, March 26, 2011 08:16:46 am Peter Jeremy wrote:
On 2011-Mar-25 08:18:38 -0400, John Baldwin j...@freebsd.org wrote:
For modern Intel CPUs you can just assume that the TSCs are in sync across
packages. They also have
On Mar 26, 2011, at 8:12 AM, John Baldwin wrote:
On Saturday, March 26, 2011 08:16:46 am Peter Jeremy wrote:
On 2011-Mar-25 08:18:38 -0400, John Baldwin j...@freebsd.org wrote:
For modern Intel CPUs you can just assume that the TSCs are in sync across
packages. They also have invariant
On 3/25/11 1:24 AM, Peter Jeremy wrote:
On 2011-Mar-24 17:00:02 +0800, Jing Huangjing.huang@gmail.com wrote:
In this scenario, I plan to use both tsc and shared memory to
calculate precise time in user mode. The shared memory includes
system_time, tsc_system_time and
On 2011-Mar-24 17:00:02 +0800, Jing Huang jing.huang@gmail.com wrote:
In this scenario, I plan to use both tsc and shared memory to
calculate precise time in user mode. The shared memory includes
system_time, tsc_system_time and factor_tsc-system_time.
This sounds like a reasonable
On Thursday, March 24, 2011 9:34:35 am Jing Huang wrote:
Hi,
Thanks for your replay. That is just my self-introduction:) I want
to borrow the shared memory idea from KVM, I am not want to port a
whole KVM:) But for this project, there are some basic problems.
As I know, tsc
Hi,
Thanks for your replay. That is just my self-introduction:) I want
to borrow the shared memory idea from KVM, I am not want to port a
whole KVM:) But for this project, there are some basic problems.
As I know, tsc counter is CPU specific. If the process running on
a multi-core
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