Re: Why is PCE not set in CR4?

2003-10-02 Thread Terry Lambert
Bruce M Simpson wrote: On Wed, Oct 01, 2003 at 11:39:36AM +0200, Grumble wrote: However, I am not allowed to use the RDPMC instruction from ring 3 because the PCE (Performance-monitoring Counters Enable) bit is not set. You can do it with /dev/perfmon. man 4 perfmon. I have read the

Re: Why is PCE not set in CR4?

2003-10-01 Thread Bruce M Simpson
On Wed, Oct 01, 2003 at 11:39:36AM +0200, Grumble wrote: However, I am not allowed to use the RDPMC instruction from ring 3 because the PCE (Performance-monitoring Counters Enable) bit is not set. You can do it with /dev/perfmon. man 4 perfmon. I have read the perfmon documentation and

Re: Why is PCE not set in CR4?

2003-09-30 Thread DoubleF
On Tue, 30 Sep 2003 00:18:19 +0200 Shill [EMAIL PROTECTED] probably wrote: Hello all, I've been playing with my Athlon's timestamp counter for a while, and I would like to experiment with the performance-monitoring counters now. I can execute the RDTSC instruction from ring 3 because the

Why is PCE not set in CR4?

2003-09-29 Thread Shill
Hello all, I've been playing with my Athlon's timestamp counter for a while, and I would like to experiment with the performance-monitoring counters now. I can execute the RDTSC instruction from ring 3 because the TSD (TimeStamp Disable) bit in CR4 (Control Register 4) is cleared. However, I am