Saw a following error message on the console. Believe that synchronize cache
10 request returned 'check condition' and we sent a SCSI sense request which
returned Error code '0x4b'
(da0:umass-sim0:0:0:0): SYNCHRONIZE CACHE(10). CDB: 35 0 0 0 0 0 0 0 0 0
(da0:umass-sim0:0:0:0): SCSI sense: Error
It is allowed to set the configuration multiple times. Refer to USB
2.0 specification.
In what possible scenario would we want to set the configuration again? I
know USB 2.0 specification allows it. I have also tried to modify the code
and have sent SET_CONFIGURATION request to the device
I couldn't really get the meaning of the following
Anyhow, if a second configure event fails after a successful one, we are
still in the configured state.
Are we making the following change
done:
if (err)
unconfigure();
else
usb_set_device_state(udev,
In usb_device_alloc function, after putting the device into powered state. We
try to select configuration 1(default configuration of most of the USB
devices) by calling *usbd_set_config_index*
In *usb_set_config_index*, we check for power requirements, then make a
request to the device to select
if (EHCI_HCC_64BIT(cparams)) {
DPRINTF(HCC uses 64-bit structures\n);
/* MUST clear segment register if 64 bit capable */
EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
}
sc-sc_bus.usbrev = USB_REV_2_0;
/* Reset the controller
After making the above said changes, I ran into another problem
Root mount waiting for: usbus0
ehci_timeout: xfer=0xff8001e6c148
ehci_device_done: xfer=0xff8001e6c148, endpoint=0xff001fef28f8,
error=20
ehci_device_done: xfer=0xff8001e6c148, endpoint=0xff001fef28f8,
error=5
I'm trying to allocate memory from 4GB-8GB range and have modified the memory
structure(QH,iTD etc) to support 64 bit addressing. I am constantly hitting
the following issues and I am not sure about the exact meaning of the error
message(timed out waiting for BIOS).
ehci1: [ITHREAD]
usbus0:
I have gone through EHCI specification(was pretty long so couldn't finish it
though) and below is what that I have understood.
Control Data Structure Segment Register 'CTRLDSSEGMENT', This register
allows the host software to locate all control data structures within the
same 4 Gigabyte memory
I don't want to play around with 'kern.maxbcache', can we actually allow
driver to support 64 bit DMA?
In future we can use a bootarg/sysctl to enable this support if someone
comes across this issue else we will use 32 bit DMA allocations.
I am willing to enable this support, please guide me.
I am getting the following error 'USB_ERR_NOMEM' when I try to allocate DMA
memrory from [0 4GB] range, I have to enable 64 bit memory allocation.
Can you please briefly explain what I need to do to enable this support?
--
View this message in context:
It seems to me that Intel ehci controller supports 64 DMA address lines
(HCCPARAMS register's 0 bit is set hardwired) then why do force DMA
allocation from [0 4GB] range.
I tried to enable 64 bit DMA allocations by modifying call to
'usb_dma_tag_setup' in usb_controller.c and usb_transfer.c but
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