On 12/11/2018 15:01, Maarten Lankhorst wrote:
> We already have __drm_atomic_helper_connector_reset() and
> __drm_atomic_helper_plane_reset(), extend this to crtc as well.
>
> Most drivers already have a gpu reset hook, correct it.
> Nouveau already implemented its own __drm_atomic_helper_crtc_res
A2XX has its own very simple MMU.
Added a msm_use_mmu() function because we can't rely on iommu_present to
decide to use MMU or not.
Signed-off-by: Jonathan Marek
---
v2:
-tlb flush from cpu every time the page table is updated
-keep missing MMU error path, in case MMU init fails
-small cleanup
Add the mdp5_cfg_hw entry for MDP5 version v1.15 found on msm8917.
Signed-off-by: Jonathan Marek
---
drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c | 86
1 file changed, 86 insertions(+)
diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c
b/drivers/gpu/drm/msm/disp/mdp5/md
otherwise, priv->kms is non-NULL and msm_drm_uninit will cause a panic.
Signed-off-by: Jonathan Marek
---
drivers/gpu/drm/msm/msm_drv.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index 5d7304b5f399..fd5769e4c42a 100644
--- a/
derived from the a3xx driver and tested on the following hardware:
imx51-zii-rdu1 (a200 with 128kb gmem)
imx53-qsrb (a200)
msm8060-tenderloin (a220)
Signed-off-by: Jonathan Marek
Reviewed-by: Jordan Crouse
---
v2:
-fail when MMU is not present (instead of just a warning, matches a3xx)
-removed
Signed-off-by: Jonathan Marek
---
drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c | 22 +-
1 file changed, 13 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
b/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
index ae25d763cd8c..8f765f284d11 100644
--- a
For allocation in contiguous memory when the GPU has MMU but not mdp4.
Signed-off-by: Jonathan Marek
---
drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
b/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms
This patch allows using drm/msm without qcom display hardware. This is
especially useful for iMX5 hardware, which has a a2xx GPU but uses the
imx-drm driver for display.
Signed-off-by: Jonathan Marek
---
v2: added commit message and removed unnecessary comment
drivers/gpu/drm/msm/Kconfig
Makes it possible to have MMU for GPU but not display.
Signed-off-by: Jonathan Marek
---
drivers/gpu/drm/msm/msm_gem.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c
index d97f6ecb0531..6657453a3a58 100644
--- a/d
Controls which of the 8 lanes are used for 6 bit color.
Signed-off-by: Jonathan Marek
---
.../gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c | 22 ---
1 file changed, 14 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c
b/drivers/gpu/drm/ms
Quoting Jordan Crouse (2018-11-21 07:00:06)
> On Tue, Nov 20, 2018 at 11:54:46PM -0800, Stephen Boyd wrote:
> > Quoting Jordan Crouse (2018-11-19 15:47:06)
> > > @@ -1203,6 +1236,12 @@ int a6xx_gmu_probe(struct a6xx_gpu *a6xx_gpu,
> > > struct device_node *node)
> > > if (gmu->hfi_irq < 0
For the nouveau and drm core changes
Reviewed-by: Lyude Paul
On Mon, 2018-11-12 at 16:01 +0100, Maarten Lankhorst wrote:
> We already have __drm_atomic_helper_connector_reset() and
> __drm_atomic_helper_plane_reset(), extend this to crtc as well.
>
> Most drivers already have a gpu reset hook,
Hi Ville,
Thank you for the patch.
On Tuesday, 20 November 2018 18:13:42 EET Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Make life easier for drivers by simply passing the connector
> to drm_hdmi_avi_infoframe_from_display_mode() and
> drm_hdmi_avi_infoframe_quant_range(). That way drivers d
[+Thor]
On Fri, Nov 16, 2018 at 04:54:30PM +0530, Vivek Gautam wrote:
> qcom,smmu-v2 is an arm,smmu-v2 implementation with specific
> clock and power requirements.
> On msm8996, multiple cores, viz. mdss, video, etc. use this
> smmu. On sdm845, this smmu is used with gpu.
> Add bindings for the sa
On Fri, Nov 16, 2018 at 04:54:27PM +0530, Vivek Gautam wrote:
> From: Sricharan R
>
> The smmu device probe/remove and add/remove master device callbacks
> gets called when the smmu is not linked to its master, that is without
> the context of the master device. So calling runtime apis in those p
On Wed, Nov 21, 2018 at 12:00:51AM -0800, Stephen Boyd wrote:
> Quoting Jordan Crouse (2018-11-19 15:47:02)
> > The GPU GX domain on SDM845 is nominally managed by the GMU microcontroller
> > but there are certain circumstances when the CPU needs to be sure that the
> > GX headswitch is off.
> >
>
On Tue, Nov 20, 2018 at 11:54:46PM -0800, Stephen Boyd wrote:
> Quoting Jordan Crouse (2018-11-19 15:47:06)
> > 99.999% of the time during normal operation the GMU is responsible
> > for power and clock control on the GX domain and the CPU remains
> > blissfully unaware. However, there is one situa
On Wed, Nov 21, 2018 at 01:40:43PM +0200, Jani Nikula wrote:
> On Tue, 20 Nov 2018, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Make life easier for drivers by simply passing the connector
> > to drm_hdmi_avi_infoframe_from_display_mode() and
> > drm_hdmi_avi_infoframe_quant_range(). Tha
On Tue, 20 Nov 2018, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Make life easier for drivers by simply passing the connector
> to drm_hdmi_avi_infoframe_from_display_mode() and
> drm_hdmi_avi_infoframe_quant_range(). That way drivers don't
> need to worry about is_hdmi2_sink mess.
Overall lo
On Mon, Nov 12, 2018 at 04:47:03PM -0500, Sean Paul wrote:
> From: Sean Paul
>
> This patch wraps dpu_core_perf_crtc_release_bw() with modeset locks
> since it digs into the state objects.
>
> Signed-off-by: Sean Paul
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 2 ++
> 1 file changed, 2
Quoting Jordan Crouse (2018-11-19 15:47:02)
> The GPU GX domain on SDM845 is nominally managed by the GMU microcontroller
> but there are certain circumstances when the CPU needs to be sure that the
> GX headswitch is off.
>
> This RFC series adds a special modification for the GX power domain
> t
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