[Freedreno] [PATCH v2 6/7] arm64: dts: sdm845: Set 'bi_tcxo' as ref clock of the DSI PHYs

Add 'bi_tcxo' as ref clock for the DSI PHYs, it was previously hardcoded in the PLL 'driver' for the 10nm PHY. Signed-off-by: Matthias Kaehlcke --- based on "[v4,1/3] arm64: dts: qcom: sdm845: Add dpu to sdm845 dts file" (https://patchwork.kernel.org/patch/10666253/) Changes in v2: - patch add

[Freedreno] [PATCH v2 1/7] dt-bindings: msm/dsi: Add ref clock for PHYs

Allow the PHY drivers to get the ref clock from the DT. Signed-off-by: Matthias Kaehlcke --- Changes in v2: - add the ref clock for all PHYs, not only the 10nm one - updated commit message --- Documentation/devicetree/bindings/display/msm/dsi.txt | 1 + 1 file changed, 1 insertion(+) diff --git

[Freedreno] [PATCH v2 7/7] drm/msm/dsi: 10nm PHY: Get ref clock from the DT

Get the ref clock of the PHY from the device tree instead of hardcoding its name and rate. Signed-off-by: Matthias Kaehlcke --- Changes in v2: - remove anonymous array in clk_init_data assignment - log error code if devm_clk_get() fails - don't log devm_clk_get() failures for -EPROBE_DEFER - upda

[Freedreno] [PATCH v2 4/7] arm64: dts: qcom: msm8916: Set 'xo_board' as ref clock of the DSI PHY

Add 'xo_board' as ref clock for the DSI PHYs, it was previously hardcoded in the PLL 'driver' for the 28nm PHY. Signed-off-by: Matthias Kaehlcke --- Changes in v2: - patch added to the series --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) di

[Freedreno] [PATCH v2 5/7] drm/msm/dsi: 28nm PHY: Get ref clock from the DT

Get the ref clock of the PHY from the device tree instead of hardcoding its name and rate. Signed-off-by: Matthias Kaehlcke --- Changes in v2: - patch added to the series --- drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c | 29 +++--- 1 file changed, 20 insertions(+), 9 deletions(-)

[Freedreno] [PATCH v2 3/7] drm/msm/dsi: 28nm 8960 PHY: Get ref clock from the DT

Get the ref clock of the PHY from the device tree instead of hardcoding its name and rate. Signed-off-by: Matthias Kaehlcke --- Changes in v2: - patch added to the series --- drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c | 17 ++--- 1 file changed, 14 insertions(+), 3 deletions(-)

[Freedreno] [PATCH v2 0/7] drm/msm/dsi: Get PHY ref clocks from the DT

The MSM DSI PHY drivers currently hardcode the name and the rate of the PHY ref clock. Get the ref clock from the device tree instead. Note: testing of this series was limited to SDM845 and the 10nm PHY Major changes in v2: - apply to all MSM DSI PHY drivers, not only 10nm Matthias Kaehlcke (7):

[Freedreno] [PATCH v2 2/7] drm/msm/dsi: 14nm PHY: Get ref clock from the DT

Get the ref clock of the PHY from the device tree instead of hardcoding its name and rate. Signed-off-by: Matthias Kaehlcke --- Changes in v2: - patch added to the series --- drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c | 16 +--- 1 file changed, 13 insertions(+), 3 deletions(-) diff

Re: [Freedreno] [PATCH v2 15/24] drm/msm: dpu: Stop using encoder->crtc pointer

On Mon, Nov 19, 2018 at 12:03:53PM -0800, Jeykumar Sankaran wrote: > On 2018-11-16 13:14, Sean Paul wrote: > > On Fri, Nov 16, 2018 at 12:05:09PM -0800, Jeykumar Sankaran wrote: > > > On 2018-11-16 10:42, Sean Paul wrote: > > > > From: Sean Paul > > > > > > > > It's for legacy drivers, for atomic

Re: [Freedreno] [PATCH 1/3] drm/msm: dpu: Grab the modeset locks in frame_event

On Wed, Nov 21, 2018 at 10:29:57AM +0100, Daniel Vetter wrote: > On Mon, Nov 12, 2018 at 04:47:03PM -0500, Sean Paul wrote: > > From: Sean Paul > > > > This patch wraps dpu_core_perf_crtc_release_bw() with modeset locks > > since it digs into the state objects. > > > > Signed-off-by: Sean Paul

Re: [Freedreno] [DPU PATCH 2/3] drm/msm/dp: add displayPort driver support

On Mon, Nov 19, 2018 at 02:34:53PM -0800, chand...@codeaurora.org wrote: > On 2018-10-23 09:28, Sean Paul wrote: > > On Wed, Oct 10, 2018 at 10:15:58AM -0700, Chandan Uddaraju wrote: > > > Add the needed displayPort files to enable DP driver > > > on msm target. > > > > > > "dp_display" module is

[Freedreno] [PATCH v2 1/1] drm: msm: Replace dma_map_sg with dma_sync_sg*

dma_map_sg() expects a DMA domain. However, the drm devices have been traditionally using unmanaged iommu domain which is non-dma type. Using dma mapping APIs with that domain is bad. Replace dma_map_sg() calls with dma_sync_sg_for_device{|cpu}() to do the cache maintenance. Signed-off-by: Vivek

Re: [Freedreno] [PATCH] iommu: arm-smmu: Set SCTLR.HUPCF bit

On Mon, Nov 26, 2018 at 2:31 PM Will Deacon wrote: > > Hi Rob, > > On Tue, Nov 13, 2018 at 08:12:35AM -0500, Rob Clark wrote: > > On Tue, Nov 13, 2018 at 1:32 AM Will Deacon wrote: > > > On Fri, Nov 09, 2018 at 01:01:55PM -0500, Rob Clark wrote: > > > > On Mon, Oct 29, 2018 at 3:09 PM Will Deacon

Re: [Freedreno] [PATCH] iommu: arm-smmu: Set SCTLR.HUPCF bit

On Mon, Nov 26, 2018 at 07:31:48PM +, Will Deacon wrote: > Hi Rob, > > On Tue, Nov 13, 2018 at 08:12:35AM -0500, Rob Clark wrote: > > On Tue, Nov 13, 2018 at 1:32 AM Will Deacon wrote: > > > On Fri, Nov 09, 2018 at 01:01:55PM -0500, Rob Clark wrote: > > > > On Mon, Oct 29, 2018 at 3:09 PM Wil

Re: [Freedreno] [RESEND PATCH v17 2/5] iommu/arm-smmu: Invoke pm_runtime during probe, add/remove device

On Mon, Nov 26, 2018 at 04:56:42PM +0530, Vivek Gautam wrote: > On 11/26/2018 11:33 AM, Vivek Gautam wrote: > >On 11/24/2018 12:06 AM, Will Deacon wrote: > >>On Thu, Nov 22, 2018 at 05:32:24PM +0530, Vivek Gautam wrote: > >>>On Wed, Nov 21, 2018 at 11:09 PM Will Deacon > >>>wrote: > On Fri, No

Re: [Freedreno] [PATCH] iommu: arm-smmu: Set SCTLR.HUPCF bit

Hi Rob, On Tue, Nov 13, 2018 at 08:12:35AM -0500, Rob Clark wrote: > On Tue, Nov 13, 2018 at 1:32 AM Will Deacon wrote: > > On Fri, Nov 09, 2018 at 01:01:55PM -0500, Rob Clark wrote: > > > On Mon, Oct 29, 2018 at 3:09 PM Will Deacon wrote: > > > > On Thu, Sep 27, 2018 at 06:46:07PM -0400, Rob Cl

Re: [Freedreno] [PATCH 1/1] drm: msm: Replace dma_map_sg with dma_sync_sg*

On Thu, Nov 22, 2018 at 03:37:54PM +0530, Vivek Gautam wrote: > Hi Tomasz, Jordan, > > > On 11/21/2018 9:18 AM, Tomasz Figa wrote: > > > >>>+ for_each_sg(msm_obj->sgt->sgl, s, > >>>+ msm_obj->sgt->nents, i) > >>>+ s

Re: [Freedreno] [RESEND PATCH v17 5/5] iommu/arm-smmu: Add support for qcom, smmu-v2 variant

Hi Thor, On 11/26/2018 8:11 PM, Thor Thayer wrote: Hi Vivek, On 11/26/18 4:55 AM, Vivek Gautam wrote: On 11/24/2018 12:04 AM, Will Deacon wrote: On Fri, Nov 23, 2018 at 03:06:29PM +0530, Vivek Gautam wrote: On Fri, Nov 23, 2018 at 2:52 PM Tomasz Figa wrote: On Fri, Nov 23, 2018 at 6:13 P

Re: [Freedreno] [PATCH v2 5/9] drm/msm: add headless gpu device (for imx5)

On Wed, Nov 21, 2018 at 08:52:31PM -0500, Jonathan Marek wrote: > This patch allows using drm/msm without qcom display hardware. This is > especially useful for iMX5 hardware, which has a a2xx GPU but uses the > imx-drm driver for display. > > Signed-off-by: Jonathan Marek > --- > v2: added commi

Re: [Freedreno] [RESEND PATCH v17 5/5] iommu/arm-smmu: Add support for qcom, smmu-v2 variant

Hi Vivek, On 11/26/18 4:55 AM, Vivek Gautam wrote: On 11/24/2018 12:04 AM, Will Deacon wrote: On Fri, Nov 23, 2018 at 03:06:29PM +0530, Vivek Gautam wrote: On Fri, Nov 23, 2018 at 2:52 PM Tomasz Figa wrote: On Fri, Nov 23, 2018 at 6:13 PM Vivek Gautam wrote: On Wed, Nov 21, 2018 at 11:09 P

Re: [Freedreno] [RESEND PATCH v17 2/5] iommu/arm-smmu: Invoke pm_runtime during probe, add/remove device

On 11/26/2018 11:33 AM, Vivek Gautam wrote: On 11/24/2018 12:06 AM, Will Deacon wrote: On Thu, Nov 22, 2018 at 05:32:24PM +0530, Vivek Gautam wrote: Hi Will, On Wed, Nov 21, 2018 at 11:09 PM Will Deacon wrote: On Fri, Nov 16, 2018 at 04:54:27PM +0530, Vivek Gautam wrote: From: Srichara

Re: [Freedreno] [RESEND PATCH v17 5/5] iommu/arm-smmu: Add support for qcom, smmu-v2 variant

On 11/24/2018 12:04 AM, Will Deacon wrote: On Fri, Nov 23, 2018 at 03:06:29PM +0530, Vivek Gautam wrote: On Fri, Nov 23, 2018 at 2:52 PM Tomasz Figa wrote: On Fri, Nov 23, 2018 at 6:13 PM Vivek Gautam wrote: On Wed, Nov 21, 2018 at 11:09 PM Will Deacon wrote: On Fri, Nov 16, 2018 at 04:54