4d=080123475003,
pud=0800000123475003, pmd=
[ 10.790128] Internal error: Oops: 9606 [#1] PREEMPT SMP
[ 10.795856] Modules linked in: ath10k_snoc qmi_helpers ath10k_core ath
mac80211 cfg80211 r8152 mii joydev
[ 10.805705] CPU: 5 PID: 1576 Comm: DrmThread Not tainted
5.1
On Wed, Mar 24, 2021 at 6:49 PM Stephen Boyd wrote:
>
> Quoting Dmitry Baryshkov (2021-03-18 13:05:44)
> > if GPU components have failed to bind, shutdown callback would fail with
> > the following backtrace. Add safeguard check to stop that oops from
> > happening and allow the board to reboot.
Quoting Dmitry Baryshkov (2021-03-18 13:05:44)
> if GPU components have failed to bind, shutdown callback would fail with
> the following backtrace. Add safeguard check to stop that oops from
> happening and allow the board to reboot.
[...]
> diff --git a/drivers/gpu/drm/msm/msm_drv.c
From: Rob Clark
Performance counts, and ALWAYS_ON counters used for capturing GPU
timestamps, lose their state across suspend/resume cycles. Userspace
tooling for performance monitoring needs to be aware of this. For
example, after a suspend userspace needs to recalibrate it's offset
between
From: Rob Clark
They were reading a counter that was configured to ALWAYS_COUNT (ie.
cycles that the GPU is doing something) rather than ALWAYS_ON. This
isn't the thing that userspace is looking for.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 4 ++--
From: Rob Clark
A couple kernel side things I realized I needed in the process of
implementing performance-counter and render-stage support for perfetto,
the first patch fixes the MSM_PARAM_TIMESTAMP query which was just
wrong on a5xx/a6xx (ALWAYS_COUNT vs ALWAYS_ON). The second adds a
way for
Hi Dmitry,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[also build test WARNING on v5.12-rc4 next-20210324]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base
On Sun, 21 Mar 2021 00:55:53 +0530, Bhaskar Chowdhury wrote:
>
> s/Subsytem/Subsystem/
> s/contoller/controller/
>
> Signed-off-by: Bhaskar Chowdhury
> ---
> Documentation/devicetree/bindings/display/msm/dpu.txt | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
Applied, thanks!
On Sun, Mar 21, 2021 at 12:55:53AM +0530, Bhaskar Chowdhury wrote:
>
> s/Subsytem/Subsystem/
> s/contoller/controller/
Rather than worry about trivial fixes, please convert .txt bindings to
DT schema instead.
>
> Signed-off-by: Bhaskar Chowdhury
> ---
>
Hi Dmitry,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[also build test WARNING on v5.12-rc4 next-20210324]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base
Drop duplicate fields pdev and id from dsi_pll_Nnm instances. Reuse
those fields from the provided msm_dsi_phy.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c| 72 +--
drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c| 54 +++---
Phy driver already knows the source PLL id basing on the set usecase and
the current PLL id. Stop passing it to the phy_enable call. As a
reminder, dsi manager will always use DSI 0 as a clock master in a slave
mode, so PLL 0 is always a clocksource for DSI 0 and it is always a
clocksource for DSI
Drop the struct msm_dsi_pll abstraction, by including vco's clk_hw
directly into struct msm_dsi_phy.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/Kconfig | 8 --
drivers/gpu/drm/msm/Makefile | 2 -
drivers/gpu/drm/msm/dsi/phy/dsi_phy.h |
The 7nm, 10nm and 14nm drivers would store interim data used during
VCO/PLL rate setting in the global dsi_pll_Nnm structure. Move this data
structures to the onstack storage. While we are at it, drop
unused/static 'config' data, unused config fields, etc.
Signed-off-by: Dmitry Baryshkov
---
The src_truthtable config is not used for some of phys, which use other
means of configuring the master/slave usecases. Inline this function
with the goal of removing src_pll_id argument in the next commit.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 17
Make save_state/restore callbacks accept struct msm_dsi_phy rather than
struct msm_dsi_pll. This moves them to struct msm_dsi_phy_ops, allowing
us to drop struct msm_dsi_pll_ops.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 12 +++
All PHY drivers would map dsi_pll area. Some PHY drivers would also
map dsi_phy area again (a leftover from old PHY/PLL separation). Move
all ioremaps to the common dsi_phy driver code and drop individual
ioremapped areas from PHY drivers.
Signed-off-by: Dmitry Baryshkov
---
All MSM DSI PHYs provide two clocks: byte and pixel ones.
Register/unregister provided clocks from the generic place, removing
boilerplate code from all MSM DSI PHY drivers.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 23 ++
Replace PLL accessor functions (pll_read/pll_write*) with the DSI PHY
accessors, reducing duplication.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 24 +--
drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c| 124
10nm and 7nm already do not use these helpers, as they handle setting
slave DSI clocks after enabling VCO. Modify the rest of PHY drivers to
remove unnecessary indirection and drop enable_seq/disable_seq PLL
callbacks.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
Use devm_of_clk_add_hw_provider() to register provided clocks. This
allows dropping the remove function alltogether.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 22 +-
1 file changed, 1 insertion(+), 21 deletions(-)
diff --git
Use devres-enabled version of clock registration functions. This lets us
remove dsi_pll destroy callbacks completely.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dsi/dsi.h | 4 -
drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 2 -
Assign DSI clock source parents to DSI PHY clocks.
Signed-off-by: Dmitry Baryshkov
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi
b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 22b832fc62e3..c16ddabb3a92 100644
Assign DSI clock source parents to DSI PHY clocks.
Signed-off-by: Dmitry Baryshkov
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index bcf888381f14..8e0c5dfbd639
There is no reason to set clock parents manually, use device tree to
assign DSI/display clock parents to DSI PHY clocks. Dropping this manual
setup allows us to drop repeating code and to move registration of hw
clock providers to generic place.
Signed-off-by: Dmitry Baryshkov
---
msm_dsi_pll_set_usecase() function is not used outside of individual DSI
PHY drivers, so drop it in favour of calling the the respective
set_usecase functions directly.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dsi/dsi.h | 7 ---
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 3 +++
drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c | 6 --
drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c | 6 --
drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c | 8 ++--
With the current upstream driver the msm_dsi_phy_type enum does not make
much sense: all DSI PHYs are probed using the dt bindings, the phy type
is not passed between drivers. Use quirks in phy individual PHY drivers
to differentiate minor harware differences and drop the enum.
Signed-off-by:
Move all PLL-related callbacks into struct msm_dsi_phy_cfg. This limits
the amount of data in the struct msm_dsi_pll.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dsi/dsi.h | 6 --
drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 14 ++--
The only PLL using multiple enable sequences is the 28nm PLL, which just
does the single step in the loop. Push that support back into the PLL
code.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c| 3 +-
drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c| 23
DSI PHY init callback would either map dsi_phy_regulator or dsi_phy_lane
depending on the PHY type. Replace those callbacks with configuration
options governing mapping those regions.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 42 ---
Add devm_clk_hw_register_divider() - devres version of
clk_hw_register_divider().
Signed-off-by: Dmitry Baryshkov
---
include/linux/clk-provider.h | 17 +
1 file changed, 17 insertions(+)
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index
Add devm_clk_hw_register_mux() - devres-managed version of
clk_hw_register_mux().
Signed-off-by: Dmitry Baryshkov
---
drivers/clk/clk-mux.c| 35 +++
include/linux/clk-provider.h | 13 +
2 files changed, 48 insertions(+)
diff --git
From: Daniel Palmer
Add a devm helper for clk_hw_register_fixed_factor() so that drivers that
internally
register fixed factor clocks for things like dividers don't need to manually
unregister
them on remove or if probe fails.
Signed-off-by: Daniel Palmer
Link:
Restructure MSM DSI PHY drivers. What started as an attempt to grok the
overcomplicated PHY drivers, has lead up to the idea of merging PHY and
PLL code, reducing abstractions, code duplication, dropping dead code,
etc.
The patches were mainly tested on RB5 (sm8250, 7nm) and DB410c (apq8016,
MERGE_3D blocks are not really handled by resource manager, they are
used by corresponding PP blocks directly, each merge_3d is used by two
known PP blocks. So allocate them outside of RM and use them directly.
Signed-off-by: Dmitry Baryshkov
---
.../drm/msm/disp/dpu1/dpu_encoder_phys_vid.c |
Each DSPP block is tied to a single LM. No LMs can share single DSPP
block. So there is no need to handle DSPP blocks through all resource
allocation/deallocation/assignment, just receive DSPP block as a part of
LM hardware instance.
Signed-off-by: Dmitry Baryshkov
---
Replace dpu_hw_intr callbacks with direct functions calls.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c | 27 ++-
.../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 36 ++--
.../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h | 180 +-
3 files
The dpu_hw_blk_destroy() function is empty, so we can drop it now.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.c | 13 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.h | 1 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 2 --
Replace dpu_hw_vbif callbacks with direct functions calls.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c | 30 +---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.h | 159 ++--
drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c| 39 ++---
3 files
Downstream driver uses dpu->caps->smart_dma_rev to update
sspp->cap->features with the bit corresponding to the supported SmartDMA
version. Upstream driver does not do this, resulting in SSPP subdriver
not enbaling setup_multirect callback. Make SSPP subdriver check global
smart_dma_rev to decide
Replace dpu_hw_merge_3d callbacks with direct functions calls.
Signed-off-by: Dmitry Baryshkov
---
.../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c| 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.c | 9 +
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.h | 13
Replace dpu_hw_dspp callbacks with direct functions calls.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c| 6 +++---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c | 15 ++-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.h | 19 ++-
3 files
Replace dpu_hw_intf callbacks with direct functions calls.
Signed-off-by: Dmitry Baryshkov
---
.../drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 28 +++
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 28 ---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h | 49 +--
Replace dpu_hw_lm callbacks with direct functions calls.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 6 +--
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 19 ++--
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h | 59 ++-
3 files changed, 33
Replace dpu_hw_top callbacks with direct functions calls.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 17 +--
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c | 27 +
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.h | 123 +---
SM8250 platform has a 8-Levels VIG QoS setting. This setting was missed
due to bad interaction with b8dab65b5ac3 ("drm/msm/dpu: Move
DPU_SSPP_QOS_8LVL bit to SDM845 and SC7180 masks"), which was applied in
parallel.
Fixes: d21fc5dfc3df ("drm/msm/dpu1: add support for qseed3lite used on sm8250")
All supported hardware instances feature DPU_VBIF_QOS_REMAP option, so
just mark setup_dither as mandatory rather than optional callback.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git
No code uses lm_max_width from resource manager, so drop it.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 12
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 4
2 files changed, 16 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
In the DPU driver each and every component would provide callbacks,
which are mostly static. Other components would use callbacks to receive
functionality instead of calling functions directly. Drop (most) of this
indirection, replacing with direct function calls. CTL and SSPP blocks
are left
Replace dpu_hw_pingpong callbacks with direct functions calls.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 4 +-
.../drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 31 ++---
.../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 36 ++
Drop get_hw_resources() callback, by filling hw resource information
using data from dpu_encoder_phys itself.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 3 +--
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 5 -
All supported hardware instances feature DPU_PINGPONG_DITHER option, so
just mark setup_dither as mandatory rather than optional callback.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 3 ---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 3 +--
2
DPU1 driver supports only hardware with the version of 4.0 and higher
(>= sdm845), so drop the dpu_hw_lm_setup_blend_config() used by previous
hardware generations.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 26 +--
1 file changed, 1
For each LM there is at max 1 peer LM which can be driven by the same
CTL, so there no need to have a mask instead of just an ID of the peer
LM.
Signed-off-by: Dmitry Baryshkov
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 2 +-
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h| 4 +--
Each PINGPONG block is tied to a single LM. No LMs can share single PINGPONG
block. So there is no need to handle PINGPONG blocks through all resource
allocation/deallocation/assignment, just receive PINGPONG block as a part of
LM hardware instance.
Signed-off-by: Dmitry Baryshkov
---
Remove all unused dpu_hw_blk features and functions:
- dpu_hw_blk_get()/_put() and respective refcounting,
- global list of all dpu_hw_blk instances,
- dpu_hw_blk_ops and empty implementation inside each hw_blk subdriver.
This leaves dpu_hw_blk as a placeholder with just type and index.
Daniel,
> MIME-Version: 1.0
> Content-Type: text/plain; charset=UTF-8
> Content-Transfer-Encoding: 8bit
>
> This is a resend of the remaining patches.
>
> All of these patches have been sent before.
Are you still keen to 'hoover these up'?
Just leave the one that requires work and take the
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