On 2/10/2022 3:41 AM, Vinod Koul wrote:
dpu_core_irq_callback_handler() function comments seem to have become
stale and emit a warning:
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c:147:
warning: Function parameter or member 'dpu_kms' not described in
'dpu_core_irq_callback_handler'
driv
On 2/10/2022 3:41 AM, Vinod Koul wrote:
The multi line comment style is wrongly used as kernel-doc comment. This
gives a warning:
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c:17:
warning: This comment starts with '/**', but isn't a kernel-doc comment.
Refer Documentation/doc-guide/kernel
On 2/10/2022 3:41 AM, Vinod Koul wrote:
We get warning:
In function ‘dpu_encoder_virt_enable’:
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c:1145:33:
warning: variable ‘priv’ set but not used [-Wunused-but-set-variable]
1145 | struct msm_drm_private *priv;
In function ‘dpu_encoder_v
On Fri, 11 Feb 2022 at 02:09, Yury Norov wrote:
>
> smp_request_block() in drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c calls
> bitmap_weight() to check if any bit of a given bitmap is set. It's
> better to use bitmap_empty() in that case because bitmap_empty() stops
> traversing the bitmap as soon as
Quoting Daniel Vetter (2022-02-08 04:53:59)
> On Mon, Jan 31, 2022 at 05:34:26PM +0100, Greg Kroah-Hartman wrote:
> > On Mon, Jan 31, 2022 at 04:15:09PM +0100, Daniel Vetter wrote:
> > > On Mon, Jan 31, 2022 at 2:48 PM Greg Kroah-Hartman
> > > wrote:
> > > >
> > > > On Thu, Jan 27, 2022 at 12:01:0
On 10/02/2022 14:41, Vinod Koul wrote:
dpu_core_irq_callback_handler() function comments seem to have become
stale and emit a warning:
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c:147:
warning: Function parameter or member 'dpu_kms' not described in
'dpu_core_irq_callback_handler'
drivers/
On 10/02/2022 14:41, Vinod Koul wrote:
The multi line comment style is wrongly used as kernel-doc comment. This
gives a warning:
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c:17:
warning: This comment starts with '/**', but isn't a kernel-doc comment.
Refer Documentation/doc-guide/kernel-doc
On 10/02/2022 14:41, Vinod Koul wrote:
We get warning:
In function ‘dpu_encoder_virt_enable’:
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c:1145:33:
warning: variable ‘priv’ set but not used [-Wunused-but-set-variable]
1145 | struct msm_drm_private *priv;
In function ‘dpu_encoder_virt_
On 2/3/2022 12:26 AM, Dmitry Baryshkov wrote:
The msm_display_info structure is not used by the rest of msm driver, so
move it into the dpu1 (dpu_encoder.h to be precise).
Signed-off-by: Dmitry Baryshkov
Yes, this is true. Its not used by rest of msm driver.
Reviewed-by: Abhinav Kumar
On Thu 10 Feb 05:57 CST 2022, Sankeerth Billakanti wrote:
> Rename the edp_out label in the sc7280 platform to mdss_edp_out.
Next week, or in the next product, it might not be obvious why we did
this change. So please continue this sentence with something like "so
that the nodes are grouped toget
On Thu 10 Feb 05:57 CST 2022, Sankeerth Billakanti wrote:
> Enable the eDP display panel support without HPD on sc7280 platform.
>
> Signed-off-by: Sankeerth Billakanti
> ---
>
> Changes in v4:
> - Create new patch for name changes
> - Remove output-low
>
> Changes in v3:
> - Sort the no
On 2/10/2022 1:32 AM, Dmitry Baryshkov wrote:
On 10/02/2022 03:25, Abhinav Kumar wrote:
On 1/21/2022 1:06 PM, Dmitry Baryshkov wrote:
INTF blocks are not really handled by resource manager, they are
assigned at dpu_encoder_setup_display using dpu_encoder_get_intf().
Then this allocation is
On Thu 10 Feb 13:12 PST 2022, Dmitry Baryshkov wrote:
> On Thu, 10 Feb 2022 at 23:54, Bjorn Andersson
> wrote:
> >
> > On Tue 08 Feb 02:39 PST 2022, Greg Kroah-Hartman wrote:
> >
> > > On Mon, Feb 07, 2022 at 08:43:27PM -0800, Bjorn Andersson wrote:
> > > > In some implementations, such as the Qu
smp_request_block() in drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c calls
bitmap_weight() to check if any bit of a given bitmap is set. It's
better to use bitmap_empty() in that case because bitmap_empty() stops
traversing the bitmap as soon as it finds first set bit, while
bitmap_weight() counts all b
On Mon 07 Feb 23:40 PST 2022, Greg Kroah-Hartman wrote:
> On Mon, Feb 07, 2022 at 08:43:28PM -0800, Bjorn Andersson wrote:
> > The Qualcomm DisplayPort driver contains traces of the necessary
> > plumbing to hook up USB HPD, in the form of the dp_hpd module and the
> > dp_usbpd_cb struct. Use this
On Thu, 10 Feb 2022 at 23:54, Bjorn Andersson
wrote:
>
> On Tue 08 Feb 02:39 PST 2022, Greg Kroah-Hartman wrote:
>
> > On Mon, Feb 07, 2022 at 08:43:27PM -0800, Bjorn Andersson wrote:
> > > In some implementations, such as the Qualcomm platforms, the display
> > > driver has no way to query the cu
On Tue 08 Feb 02:39 PST 2022, Greg Kroah-Hartman wrote:
> On Mon, Feb 07, 2022 at 08:43:27PM -0800, Bjorn Andersson wrote:
> > In some implementations, such as the Qualcomm platforms, the display
> > driver has no way to query the current HPD state and as such it's
> > impossible to distinguish be
Hi Dmitry,
As discussed over a separate email, we will be exploring using the generic
panel edp and aux bus after implementing the basic PSR feature. We are using a
non-generic compatible string now because we enabled PSR with this. The changes
from aux-bus and generic-edp may be intrusive for
On 09/02/2022 11:55, Sankeerth Billakanti wrote:
Add support for the 14" sharp,lq140m1jw46 eDP panel.
Signed-off-by: Sankeerth Billakanti
Please excuse my ignorance, is there any reason, why we can't use
generic panel-edp here?
---
Changes in v3:
None
drivers/gpu/drm/panel/panel-ed
Add support in the DP driver to utilize the custom eDP panels
from drm/panels.
An eDP panel is always connected to the platform. So, the eDP
connector can be reported as always connected. The display mode
will be sourced from the panel. The panel mode will be set after
the link training is complet
Add support for the 14" sharp,lq140m1jw46 eDP panel.
Signed-off-by: Sankeerth Billakanti
---
00 ff ff ff ff ff ff 00 4d 10 23 15 00 00 00 00
35 1e 01 04 a5 1f 11 78 07 de 50 a3 54 4c 99 26
0f 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01
01 01 01 01 01 01 5a 87 80 a0 70 38 4d 40 30 20
35 00 35 ae
Rename the edp_out label in the sc7280 platform to mdss_edp_out.
Signed-off-by: Sankeerth Billakanti
---
arch/arm64/boot/dts/qcom/sc7280-crd.dts | 10 +-
arch/arm64/boot/dts/qcom/sc7280.dtsi| 2 +-
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/qc
Enable the eDP display panel support without HPD on sc7280 platform.
Signed-off-by: Sankeerth Billakanti
---
Changes in v4:
- Create new patch for name changes
- Remove output-low
Changes in v3:
- Sort the nodes alphabetically
- Use - instead of _ as node names
- Place the backlight a
Add support for sharp LQ140M1JW46 display panel. It is a 14" eDP panel
with 1920x1080 display resolution.
Signed-off-by: Sankeerth Billakanti
Acked-by: Rob Herring
Reviewed-by: Stephen Boyd
---
Changes in v4:
None
Changes in v3:
None
Documentation/devicetree/bindings/display/panel/panel
Add support for the eDP panel on sc7280 CRD platform. The eDP panel does
not need HPD line for connect disconnect. So, this series will report eDP
as always connected. The driver needs to register for IRQ_HPD only for eDP.
This support will be added later.
These changes are dependent on the follow
Hi Stephen,
Will make the changes.
-Original Message-
From: Stephen Boyd
Sent: Thursday, February 10, 2022 6:52 AM
To: Sankeerth Billakanti (QUIC) ; agr...@kernel.org;
airl...@linux.ie; bjorn.anders...@linaro.org; dan...@ffwll.ch;
devicet...@vger.kernel.org; diand...@chromium.org;
dri
Hi Stephen,
Thank you for the review. I will share the new patch.
-Original Message-
From: Stephen Boyd
Sent: Thursday, February 10, 2022 6:47 AM
To: Sankeerth Billakanti (QUIC) ; agr...@kernel.org;
airl...@linux.ie; bjorn.anders...@linaro.org; dan...@ffwll.ch;
devicet...@vger.kernel.o
Hi Stephen,
Will implement all the suggested changes.
Thank you,
Sankeerth
-Original Message-
From: Stephen Boyd
Sent: Thursday, February 10, 2022 6:45 AM
To: Sankeerth Billakanti (QUIC) ; agr...@kernel.org;
airl...@linux.ie; bjorn.anders...@linaro.org; dan...@ffwll.ch;
devicet...@vge
The multi line comment style is wrongly used as kernel-doc comment. This
gives a warning:
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c:17:
warning: This comment starts with '/**', but isn't a kernel-doc comment.
Refer Documentation/doc-guide/kernel-doc.rst
Update the style to fix this.
Sign
dpu_core_irq_callback_handler() function comments seem to have become
stale and emit a warning:
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c:147:
warning: Function parameter or member 'dpu_kms' not described in
'dpu_core_irq_callback_handler'
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
We get warning:
In function ‘dpu_encoder_virt_enable’:
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c:1145:33:
warning: variable ‘priv’ set but not used [-Wunused-but-set-variable]
1145 | struct msm_drm_private *priv;
In function ‘dpu_encoder_virt_disable’:
drivers/gpu/drm/msm/disp/dpu1/d
On 10/02/2022 13:34, Vinod Koul wrote:
We need to configure the encoder for DSC configuration and calculate DSC
parameters for the given timing so this patch adds that support by
adding dpu_encoder_prep_dsc() which is invoked when DSC is enabled.
Signed-off-by: Vinod Koul
Reviewed-by: Dmitry
On 10/02/2022 13:34, Vinod Koul wrote:
Display Stream Compression (DSC) parameters need to be calculated. Add
helpers and struct msm_display_dsc_config in msm_drv for this
msm_display_dsc_config uses drm_dsc_config for DSC parameters.
Signed-off-by: Vinod Koul
Reviewed-by: Dmitry Baryshkov
On 10/02/2022 13:34, Vinod Koul wrote:
We cannot enable mode_3d when we are using the DSC. So pass
configuration to detect DSC is enabled and not enable mode_3d
when we are using DSC
We add a helper dpu_encoder_helper_get_dsc() to detect dsc
enabled and pass this to .setup_intf_cfg()
Signed-off
On 10/02/2022 13:34, Vinod Koul wrote:
For DSC to work we typically need a 2,2,1 configuration. This should
suffice for resolutions up to 4k. For more resolutions like 8k this won't
work.
Also, it is better to use 2 LMs and DSC instances as half width results
in lesser power consumption as compa
On 10/02/2022 13:34, Vinod Koul wrote:
When DSC is enabled, we need to pass the DSC parameters to panel driver
as well, so add a dsc parameter in panel and set it when DSC is enabled
Also, fetch and pass DSC configuration for DSI panels to DPU encoder,
which will enable and configure DSC hardwar
On 10/02/2022 13:34, Vinod Koul wrote:
Somehow documentation for dspp was missed, so add that
Signed-off-by: Vinod Koul
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/msm_drv.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm
When DSC is enabled, we need to configure DSI registers accordingly and
configure the respective stream compression registers.
Add support to calculate the register setting based on DSC params and
timing information and configure these registers.
Signed-off-by: Dmitry Baryshkov
Signed-off-by: Vi
Add a mode valid callback for dsi_mgr for checking mode being valid in
case of DSC. For DSC the height and width needs to be multiple of slice,
so we check that here
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/dsi/dsi.h | 2 ++
drivers/gpu/drm/msm/ds
This add the bits in RM to enable the DSC blocks
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 +
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 56 +
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 1 +
3 files changed, 5
For DSC to work we typically need a 2,2,1 configuration. This should
suffice for resolutions up to 4k. For more resolutions like 8k this won't
work.
Also, it is better to use 2 LMs and DSC instances as half width results
in lesser power consumption as compared to single LM, DSC at full width.
The
Somehow documentation for dspp was missed, so add that
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/msm_drv.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h
index e7a312edfe67..6425a42e997c 100644
--- a/drivers/gpu/drm/msm/m
We cannot enable mode_3d when we are using the DSC. So pass
configuration to detect DSC is enabled and not enable mode_3d
when we are using DSC
We add a helper dpu_encoder_helper_get_dsc() to detect dsc
enabled and pass this to .setup_intf_cfg()
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm
We need to configure the encoder for DSC configuration and calculate DSC
parameters for the given timing so this patch adds that support by
adding dpu_encoder_prep_dsc() which is invoked when DSC is enabled.
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 164 ++
Later gens of hardware have DSC bits moved to hw_ctl, so configure these
bits so that DSC would work there as well
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 11 ++-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h | 2 ++
2 files
This adds SDM845 DSC blocks into hw_catalog
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Vinod Koul
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 20 +++
1 file changed, 20 insertions(+)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
b/drivers/gpu/drm/msm/di
In SDM845, DSC can be enabled by writing to pingpong block registers, so
add support for DSC in hw_pp
Reviewed-by: Abhinav Kumar
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Vinod Koul
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 32 +++
.../gpu/drm/msm/disp/dpu1/dpu_hw_
Display Stream Compression (DSC) is one of the hw blocks in dpu, so add
support by adding hw blocks for DSC
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/Makefile | 1 +
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h| 13 ++
drivers/gpu/drm/
When DSC is enabled, we need to pass the DSC parameters to panel driver
as well, so add a dsc parameter in panel and set it when DSC is enabled
Also, fetch and pass DSC configuration for DSI panels to DPU encoder,
which will enable and configure DSC hardware blocks accordingly.
Signed-off-by: Dmi
Display Stream Compression (DSC) parameters need to be calculated. Add
helpers and struct msm_display_dsc_config in msm_drv for this
msm_display_dsc_config uses drm_dsc_config for DSC parameters.
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 132 +
Display Stream Compression (DSC) compresses the display stream in host which
is later decoded by panel. This series enables this for Qualcomm msm driver.
This was tested on Google Pixel3 phone which use LGE SW43408 panel.
The changes include DSC data and hardware block enabling for DPU1 then
supp
On 08/12/2021 01:29, Dmitry Baryshkov wrote:
Currently the DSI driver has two separate paths: one if the next device
in a chain is a bridge and another one if the panel is connected
directly to the DSI host. Simplify the code path by using panel-bridge
driver (already selected in Kconfig) and dro
On 10/02/2022 01:17, Dmitry Baryshkov wrote:
On 09/02/2022 11:37, Qing Wang wrote:
From: Wang Qing
do_div() does a 64-by-32 division.
When the divisor is u64, do_div() truncates it to 32 bits, this means it
can test non-zero and be truncated to zero for division.
fix do_div.cocci warning:
do_
On 10/02/2022 03:25, Abhinav Kumar wrote:
On 1/21/2022 1:06 PM, Dmitry Baryshkov wrote:
INTF blocks are not really handled by resource manager, they are
assigned at dpu_encoder_setup_display using dpu_encoder_get_intf().
Then this allocation is passed to RM and then returned to then
dpu_encode
Hi,
On Mon, Feb 07, 2022 at 10:27:24PM +0300, Dmitry Baryshkov wrote:
> On Mon, 7 Feb 2022 at 19:56, Maxime Ripard wrote:
> >
> > While the mdp5_plane_install_properties() function calls
> > drm_plane_create_zpos_property() with an initial value of 1,
> > mdp5_plane_reset() will force it to anoth
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