Hi,
On Mon, Sep 12, 2022 at 7:10 PM Dmitry Baryshkov
wrote:
>
> On 12/09/2022 18:40, Johan Hovold wrote:
> > Device-managed resources allocated post component bind must be tied to
> > the lifetime of the aggregate DRM device or they will not necessarily be
> > released when binding of the aggrega
Hi Johan,
I love your patch! Yet something to improve:
[auto build test ERROR on next-20220912]
[also build test ERROR on v6.0-rc5]
[cannot apply to drm-misc/drm-misc-next drm/drm-next drm-intel/for-linux-next
drm-tip/drm-tip linus/master v6.0-rc5 v6.0-rc4 v6.0-rc3]
[If your patch is applied to
Hi Fabien
Thanks for the patch.
I believe this issue should get resolved with
https://patchwork.freedesktop.org/patch/490326/ as this avoids the override.
I have acked that change and will pick it up for the next fixes.
Thanks
Abhinav
On 9/9/2022 8:28 AM, Fabien Parent wrote:
The kernel
On 9/12/22 1:10 PM, Dmitry Baryshkov wrote:
On 12/09/2022 18:40, Johan Hovold wrote:
Device-managed resources allocated post component bind must be tied to
the lifetime of the aggregate DRM device or they will not necessarily be
released when binding of the aggregate device is deferred.
This
On 9/12/2022 11:37 AM, Dmitry Baryshkov wrote:
On 12/09/2022 19:23, Kuogee Hsieh wrote:
Bring sink out of D3 (power down) mode into D0 (normal operation) mode
by setting DP_SET_POWER_D0 bit to DP_SET_POWER dpcd register. This
patch will retry 3 times if written to DP_SET_POWER register failed.
On 12/09/2022 22:21, Kuogee Hsieh wrote:
On 9/12/2022 11:39 AM, Dmitry Baryshkov wrote:
On 12/09/2022 19:23, Kuogee Hsieh wrote:
DOWNSPREAD_CTRL (0x107) shall be cleared to 0 upon power-on reset or an
upstream device disconnect. This patch will enforce this rule by always
cleared DOWNSPREAD_CT
On 9/12/2022 11:39 AM, Dmitry Baryshkov wrote:
On 12/09/2022 19:23, Kuogee Hsieh wrote:
DOWNSPREAD_CTRL (0x107) shall be cleared to 0 upon power-on reset or an
upstream device disconnect. This patch will enforce this rule by always
cleared DOWNSPREAD_CTRL register to 0 before start link traini
On 12/09/2022 19:23, Kuogee Hsieh wrote:
DOWNSPREAD_CTRL (0x107) shall be cleared to 0 upon power-on reset or an
upstream device disconnect. This patch will enforce this rule by always
cleared DOWNSPREAD_CTRL register to 0 before start link training. At rare
case that DP MSA timing parameters may
On 12/09/2022 19:23, Kuogee Hsieh wrote:
Bring sink out of D3 (power down) mode into D0 (normal operation) mode
by setting DP_SET_POWER_D0 bit to DP_SET_POWER dpcd register. This
patch will retry 3 times if written to DP_SET_POWER register failed.
Could you please elaborate this change? Can the
On 12/09/2022 19:23, Kuogee Hsieh wrote:
drm_dp_dpcd_readb() will return 1 to indicate one byte had been read
successfully. This patch replace variable "err" with "len" have more
correct meaning.
changes in v5:
-- split into 3 patches
Signed-off-by: Kuogee Hsieh
Reviewed-by: Dmitry Baryshkov
On 01/09/2022 23:34, Jessica Zhang wrote:
Add support for HDR color formats.
XR30 linear/compressed format has been validated with null_platform_test
on SC7180, and P010 linear has been validated with plane_test (also on
SC7180).
Are they supported on sdm845? On msm8998?
Jessica Zhang (2):
On Thu, Sep 1, 2022 at 1:34 PM Jessica Zhang wrote:
>
> Add support for P010 color format. This adds support for both linear and
> compressed formats.
>
> Signed-off-by: Jessica Zhang
Reviewed-by: Rob Clark
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c| 17 -
> drive
On Thu, Sep 1, 2022 at 1:34 PM Jessica Zhang wrote:
>
> Add support for XR30 color format. This supports both linear and
> compressed formats.
>
> Signed-off-by: Jessica Zhang
Reviewed-by: Rob Clark
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c| 7 +++
> drivers/gpu/drm/msm/disp
On 12/09/2022 18:40, Johan Hovold wrote:
Device-managed resources allocated post component bind must be tied to
the lifetime of the aggregate DRM device or they will not necessarily be
released when binding of the aggregate device is deferred.
This can lead resource leaks or failure to bind the
On 12/09/2022 18:40, Johan Hovold wrote:
Device-managed resources allocated post component bind must be tied to
the lifetime of the aggregate DRM device or they will not necessarily be
released when binding of the aggregate device is deferred.
This can lead resource leaks or failure to bind the
On 12/09/2022 18:40, Johan Hovold wrote:
Device-managed resources allocated post component bind must be tied to
the lifetime of the aggregate DRM device or they will not necessarily be
released when binding of the aggregate device is deferred.
This is specifically true for the DP IRQ, which will
On 12/09/2022 18:40, Johan Hovold wrote:
Drop the overly defensive modeset sanity checks of function parameters
which have already been checked or used by the callers.
Signed-off-by: Johan Hovold
Again, please split into dp and dsi patches. After that:
Reviewed-by: Dmitry Baryshkov
---
On 12/09/2022 20:34, Kuogee Hsieh wrote:
DRM commit_tails() will disable downstream crtc/encoder/bridge if
both disable crtc is required and crtc->active is set before pushing
a new frame downstream.
There is a rare case that user space display manager issue an extra
screen update immediately fo
On 12/09/2022 18:40, Johan Hovold wrote:
Device-managed resources allocated post component bind must be tied to
the lifetime of the aggregate DRM device or they will not necessarily be
released when binding of the aggregate device is deferred.
This is specifically true for the HDMI IRQ, which wi
On 12/09/2022 18:40, Johan Hovold wrote:
Add the missing sanity checks on the bridge counter to avoid corrupting
data beyond the fixed-sized bridge array in case there are ever more
than eight bridges.
a3376e3ec81c ("drm/msm: convert to drm_bridge")
ab5b0107ccf3 ("drm/msm: Initial add eDP suppor
On 12/09/2022 18:40, Johan Hovold wrote:
The bridge counter was never reset when tearing down the DRM device so
that stale pointers to deallocated structures would be accessed on the
next tear down (e.g. after a second late bind deferral).
Given enough bridges and a few probe deferrals this coul
DRM commit_tails() will disable downstream crtc/encoder/bridge if
both disable crtc is required and crtc->active is set before pushing
a new frame downstream.
There is a rare case that user space display manager issue an extra
screen update immediately followed by close DRM device while down
strea
Adding kuogee to this series
Hi Johan
Thanks for posting this.
We will take a look at this, re-validate and give our reviews/tested-bys.
Thanks
Abhinav
On 9/12/2022 8:40 AM, Johan Hovold wrote:
The MSM DRM is currently broken in multiple ways with respect to probe
deferral. Not only does the
On 9/9/2022 10:16 AM, Kuogee Hsieh wrote:
DRM commit_tails() will disable downstream crtc/encoder/bridge if
both disable crtc is required and crtc->active is set before pushing
a new frame downstream.
There is a rare case that user space display manager issue an extra
screen update immediatel
cleared DP_DOWNSPREAD_CTRL register before start link training
Kuogee Hsieh (3):
drm/msm/dp: cleared DP_DOWNSPREAD_CTRL register before start link
training
drm/msm/dp: replace variable err with len at dp_aux_link_power_up()
drm/msm/dp: retry 3 times if set sink to D0 poweer state failed
The MSM DRM is currently broken in multiple ways with respect to probe
deferral. Not only does the driver currently fail to probe again after a
late deferral, but due to a related use-after-free bug this also
triggers NULL-pointer dereferences.
These bugs are not new but have become critical with
Drop the overly defensive modeset sanity checks of function parameters
which have already been checked or used by the callers.
Signed-off-by: Johan Hovold
---
drivers/gpu/drm/msm/dp/dp_display.c | 7 +--
drivers/gpu/drm/msm/dsi/dsi.c | 7 +--
2 files changed, 2 insertions(+), 12 de
Device-managed resources allocated post component bind must be tied to
the lifetime of the aggregate DRM device or they will not necessarily be
released when binding of the aggregate device is deferred.
This can lead resource leaks or failure to bind the aggregate device
when binding is later retr
Device-managed resources allocated post component bind must be tied to
the lifetime of the aggregate DRM device or they will not necessarily be
released when binding of the aggregate device is deferred.
This is specifically true for the DP IRQ, which will otherwise remain
requested so that the nex
The bridge counter was never reset when tearing down the DRM device so
that stale pointers to deallocated structures would be accessed on the
next tear down (e.g. after a second late bind deferral).
Given enough bridges and a few probe deferrals this could currently also
lead to data beyond the br
Device-managed resources allocated post component bind must be tied to
the lifetime of the aggregate DRM device or they will not necessarily be
released when binding of the aggregate device is deferred.
This can lead resource leaks or failure to bind the aggregate device
when binding is later retr
Device-managed resources allocated post component bind must be tied to
the lifetime of the aggregate DRM device or they will not necessarily be
released when binding of the aggregate device is deferred.
This is specifically true for the HDMI IRQ, which will otherwise remain
requested so that the n
Add the missing sanity checks on the bridge counter to avoid corrupting
data beyond the fixed-sized bridge array in case there are ever more
than eight bridges.
a3376e3ec81c ("drm/msm: convert to drm_bridge")
ab5b0107ccf3 ("drm/msm: Initial add eDP support in msm drm driver (v5)")
a689554ba6ed ("d
Bring sink out of D3 (power down) mode into D0 (normal operation) mode
by setting DP_SET_POWER_D0 bit to DP_SET_POWER dpcd register. This
patch will retry 3 times if written to DP_SET_POWER register failed.
Changes in v5:
-- split into two patches
Signed-off-by: Kuogee Hsieh
---
drivers/gpu/drm
drm_dp_dpcd_readb() will return 1 to indicate one byte had been read
successfully. This patch replace variable "err" with "len" have more
correct meaning.
changes in v5:
-- split into 3 patches
Signed-off-by: Kuogee Hsieh
---
drivers/gpu/drm/msm/dp/dp_link.c | 14 +++---
1 file changed,
DOWNSPREAD_CTRL (0x107) shall be cleared to 0 upon power-on reset or an
upstream device disconnect. This patch will enforce this rule by always
cleared DOWNSPREAD_CTRL register to 0 before start link training. At rare
case that DP MSA timing parameters may be mis-interpreted by the sink
which cause
On Mon, 12 Sept 2022 at 11:51, Tomi Valkeinen
wrote:
>
> Hi,
>
> On 29/04/2022 21:51, Dmitry Baryshkov wrote:
> > From all the drivers using drm_bridge_connector only iMX/dcss and OMAP
> > DRM driver do a proper work of calling
> > drm_bridge_connector_en/disable_hpd() in right places. Rather tha
On 29/04/2022 21:51, Dmitry Baryshkov wrote:
Now as all drivers stopped calling drm_bridge_connector_enable_hpd() and
drm_bridge_connector_disable_hpd() it is safe to remove them complelely.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/drm_bridge_connector.c | 25 --
Hi,
On 29/04/2022 21:51, Dmitry Baryshkov wrote:
From all the drivers using drm_bridge_connector only iMX/dcss and OMAP
DRM driver do a proper work of calling
drm_bridge_connector_en/disable_hpd() in right places. Rather than
teaching each and every driver how to properly handle
drm_bridge_conn
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