of_icc_get() alloc resources for path1, we should release it when not
need anymore. Early return when IS_ERR_OR_NULL(path0) may leak path1.
Add icc_put(path1) in the error path to fix this.
Fixes: b9364eed9232 ("drm/msm/dpu: Move min BW request and full BW disable back
to mdss")
Signed-off-by:
As kzalloc may fail and return NULL pointer,
it should be better to check the return value
in order to avoid the NULL pointer dereference.
Fixes: 1cff7440a86e ("drm/msm: Convert to using
__drm_atomic_helper_crtc_reset() for reset.")
Signed-off-by: Jiasheng Jiang
---
As kzalloc may fail and return NULL pointer,
it should be better to check the return value
in order to avoid the NULL pointer dereference.
Fixes: 1cff7440a86e ("drm/msm: Convert to using
__drm_atomic_helper_crtc_reset() for reset.")
Signed-off-by: Jiasheng Jiang
---
6 декабря 2022 г. 02:08:13 GMT+03:00, Kuogee Hsieh
пишет:
>Add capability to parser and retrieve max DP link supported rate from
>link-frequencies property of dp_out endpoint.
>
>Changes in v6:
>-- second patch after split parser patch into two patches
>
>Changes in v7:
>-- without checking cnt
Add capability to parser data-lanes as property of dp_out endpoint.
Also retain the original capability to parser data-lanes as property
of mdss_dp node to handle legacy case.
Changes in v6:
-- first patch after split parser patch into two
Changes in v7:
-- check "data-lanes" from endpoint first
By default, HBR2 (5.4G) is the max link link be supported. This patch uses the
actual limit specified by DT and removes the artificial limitation to 5.4 Gbps.
Supporting HBR3 is a consequence of that.
Changes in v2:
-- add max link rate from dtsi
Changes in v3:
-- parser max_data_lanes and
Add capability to parser and retrieve max DP link supported rate from
link-frequencies property of dp_out endpoint.
Changes in v6:
-- second patch after split parser patch into two patches
Changes in v7:
-- without checking cnt against DP_MAX_NUM_DP_LANES to retrieve link rate
Changes in v9:
--
Add both data-lanes and link-frequencies property into endpoint
Changes in v7:
-- split yaml out of dtsi patch
-- link-frequencies from link rate to symbol rate
-- deprecation of old data-lanes property
Changes in v8:
-- correct Bjorn mail address to kernel.org
Signed-off-by: Kuogee Hsieh `
---
Move data-lanes property from mdss_dp node to dp_out endpoint. Also
add link-frequencies property into dp_out endpoint as well. The last
frequency specified at link-frequencies will be the max link rate
supported by DP.
Changes in v5:
-- revert changes at sc7180.dtsi and sc7280.dtsi
-- add _out
Add DP both data-lanes and link-frequencies property to dp_out endpoint and
support
functions to DP driver.
Kuogee Hsieh (5):
arm64: dts: qcom: add data-lanes and link-freuencies into dp_out
endpoint
dt-bindings: msm/dp: add data-lanes and link-frequencies property
drm/msm/dp: parser
On Thu, Dec 01, 2022 at 11:38:16AM +0100, Krzysztof Kozlowski wrote:
> On 30/11/2022 21:09, Adam Skladowski wrote:
> > Add WCN node to allow using wifi module.
> >
>
> A nit: Drop full stop from commit subject.
>
Done. Thanks for pointing it out :)
Regards,
Bjorn
> Best regards,
> Krzysztof
On Tue, Dec 06, 2022 at 12:29:13AM +0300, Dmitry Baryshkov wrote:
>
>
> On 5 December 2022 20:44:28 GMT+03:00, Bjorn Andersson
> wrote:
> >From: Bjorn Andersson
> >
> >The DisplayPort controller's hot-plug mechanism is based on pinmuxing a
> >physical signal on a GPIO pin into the controller.
On 5 December 2022 22:14:27 GMT+03:00, Kuogee Hsieh
wrote:
>Add both data-lanes and link-frequencies property into endpoint
>
>Changes in v7:
>-- split yaml out of dtsi patch
>-- link-frequencies from link rate to symbol rate
>-- deprecation of old data-lanes property
>
>Changes in v8:
>--
On 5 December 2022 20:44:28 GMT+03:00, Bjorn Andersson
wrote:
>From: Bjorn Andersson
>
>The DisplayPort controller's hot-plug mechanism is based on pinmuxing a
>physical signal on a GPIO pin into the controller. This is not always
>possible, either because there aren't dedicated GPIOs
On 5 December 2022 20:44:32 GMT+03:00, Bjorn Andersson
wrote:
>From: Bjorn Andersson
>
>The SC8280XP CRD has a EDP display on MDSS0 DP3, enable relevant nodes
>and link it together with the backlight control.
>
>Signed-off-by: Bjorn Andersson
>Signed-off-by: Bjorn Andersson
>---
>
>Changes
On 6 December 2022 00:07:12 GMT+03:00, Dmitry Baryshkov
wrote:
>
>
>On 5 December 2022 20:44:29 GMT+03:00, Bjorn Andersson
> wrote:
>>From: Bjorn Andersson
>>
>>Most instances where HPD interrupts are masked and unmasked are guareded
>>by the presence of an EDP panel being connected, but
On 5 December 2022 20:44:30 GMT+03:00, Bjorn Andersson
wrote:
>From: Bjorn Andersson
>
>The DisplayPort controller's internal HPD interrupt handling is used for
>cases where the HPD signal is connected to a GPIO which is pinmuxed into
>the DisplayPort controller. In other configurations the
On Mon, 05 Dec 2022 09:44:21 -0800, Bjorn Andersson wrote:
> From: Bjorn Andersson
>
> Add binding for the display subsystem and display processing unit in the
> Qualcomm SC8280XP platform.
>
> Signed-off-by: Bjorn Andersson
> Signed-off-by: Bjorn Andersson
> ---
>
> Changes since v3:
> -
On Mon, 05 Dec 2022 17:37:45 +0100, Robert Foss wrote:
> Mobile Display Subsystem (MDSS) encapsulates sub-blocks
> like DPU display controller, DSI etc. Add YAML schema for MDSS device
> tree bindings
>
> Signed-off-by: Robert Foss
> ---
> .../display/msm/qcom,sm8350-mdss.yaml | 221
On 5 December 2022 20:44:29 GMT+03:00, Bjorn Andersson
wrote:
>From: Bjorn Andersson
>
>Most instances where HPD interrupts are masked and unmasked are guareded
>by the presence of an EDP panel being connected, but not all. Extend
>this to cover the last few places, as HPD interrupt handling
On Mon, 05 Dec 2022 11:14:27 -0800, Kuogee Hsieh wrote:
> Add both data-lanes and link-frequencies property into endpoint
>
> Changes in v7:
> -- split yaml out of dtsi patch
> -- link-frequencies from link rate to symbol rate
> -- deprecation of old data-lanes property
>
> Changes in v8:
> --
On 5 December 2022 20:44:28 GMT+03:00, Bjorn Andersson
wrote:
>From: Bjorn Andersson
>
>The DisplayPort controller's hot-plug mechanism is based on pinmuxing a
>physical signal on a GPIO pin into the controller. This is not always
>possible, either because there aren't dedicated GPIOs
On 5 December 2022 20:44:23 GMT+03:00, Bjorn Andersson
wrote:
>From: Bjorn Andersson
>
>Add compatible for the SC8280XP Mobile Display Subsystem and
>initialization for version 8.0.0.
>
>Signed-off-by: Bjorn Andersson
>Signed-off-by: Bjorn Andersson
Reviewed-by: Dmitry Baryshkov
>---
On 5 December 2022 22:14:30 GMT+03:00, Kuogee Hsieh
wrote:
>By default, HBR2 (5.4G) is the max link link be supported. This patch add
>the capability to support max link rate at HBR3 (8.1G).
This patch uses the actual limit specified by DT and removes the artificial
limitation to 5.4 Gbps.
On 5 December 2022 22:14:29 GMT+03:00, Kuogee Hsieh
wrote:
>Add capability to parser and retrieve max DP link supported rate from
>link-frequencies property of dp_out endpoint.
>
>Changes in v6:
>-- second patch after split parser patch into two patches
>
>Changes in v7:
>-- without checking
On 5 December 2022 22:14:26 GMT+03:00, Kuogee Hsieh
wrote:
>Move data-lanes property from mdss_dp node to dp_out endpoint. Also
>add link-frequencies property into dp_out endpoint as well. The last
>frequency specified at link-frequencies will be the max link rate
>supported by DP.
>
>Changes
On 5 December 2022 22:14:28 GMT+03:00, Kuogee Hsieh
wrote:
>Add capability to parser data-lanes as property of dp_out endpoint.
>Also retain the original capability to parser data-lanes as property
>of mdss_dp node to handle legacy case.
>
>Changes in v6:
>-- first patch after split parser
On 05/12/2022 21:02, Bjorn Andersson wrote:
On Mon, Dec 05, 2022 at 07:09:45PM +0100, Konrad Dybcio wrote:
On 05/12/2022 18:44, Bjorn Andersson wrote:
diff --git a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
[..]
+_dp2 {
+ status = "okay";
On Mon, Dec 05, 2022 at 07:09:45PM +0100, Konrad Dybcio wrote:
> On 05/12/2022 18:44, Bjorn Andersson wrote:
> > diff --git a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
> > b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
[..]
> > +_dp2 {
> > + status = "okay";
> status should go last.
>
Thanks for
On Fri, 25 Nov 2022 12:36:28 +, Bryan O'Donoghue wrote:
> When converting from .txt to .yaml we didn't include descriptions for the
> existing regulator supplies.
>
> - vdd
> - vdda
> - vddio
>
> Add those descriptions into the yaml now as they were prior to the
> conversion. In the .txt
On Fri, 25 Nov 2022 12:36:27 +, Bryan O'Donoghue wrote:
> When converting from .txt to .yaml dt-binding descriptions we appear to
> have missed some of the previous detail on the number and names of
> permissible clocks.
>
> Fix this by listing the clock descriptions against the clock names
On Fri, 25 Nov 2022 12:36:25 +, Bryan O'Donoghue wrote:
> Each compatible has a different set of clocks which are associated with it.
> Add in the list of clocks for each compatible.
>
> Signed-off-by: Bryan O'Donoghue
> ---
> .../display/msm/dsi-controller-main.yaml | 152
Hi Robert,
On 5.12.22 18:37, Robert Foss wrote:
Use two interconnect cells in order to optionally
support a path tag.
Signed-off-by: Robert Foss
Reviewed-by: Konrad Dybcio
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 28 ++--
1 file changed, 14 insertions(+), 14
By default, HBR2 (5.4G) is the max link link be supported. This patch add
the capability to support max link rate at HBR3 (8.1G).
Changes in v2:
-- add max link rate from dtsi
Changes in v3:
-- parser max_data_lanes and max_dp_link_rate from dp_out endpoint
Changes in v4:
-- delete unnecessary
Add capability to parser and retrieve max DP link supported rate from
link-frequencies property of dp_out endpoint.
Changes in v6:
-- second patch after split parser patch into two patches
Changes in v7:
-- without checking cnt against DP_MAX_NUM_DP_LANES to retrieve link rate
Signed-off-by:
Add capability to parser data-lanes as property of dp_out endpoint.
Also retain the original capability to parser data-lanes as property
of mdss_dp node to handle legacy case.
Changes in v6:
-- first patch after split parser patch into two
Changes in v7:
-- check "data-lanes" from endpoint first
Add both data-lanes and link-frequencies property into endpoint
Changes in v7:
-- split yaml out of dtsi patch
-- link-frequencies from link rate to symbol rate
-- deprecation of old data-lanes property
Changes in v8:
-- correct Bjorn mail address to kernel.org
Signed-off-by: Kuogee Hsieh
---
Move data-lanes property from mdss_dp node to dp_out endpoint. Also
add link-frequencies property into dp_out endpoint as well. The last
frequency specified at link-frequencies will be the max link rate
supported by DP.
Changes in v5:
-- revert changes at sc7180.dtsi and sc7280.dtsi
-- add _out
Add DP both data-lanes and link-frequencies property to dp_out endpoint and
support
functions to DP driver.
Kuogee Hsieh (5):
arm64: dts: qcom: add data-lanes and link-freuencies into dp_out
endpoint
dt-bindings: msm/dp: add data-lanes and link-frequencies property
drm/msm/dp: parser
On 05/12/2022 18:44, Bjorn Andersson wrote:
From: Bjorn Andersson
The SA8295P ADP has, among other interfaces, six MiniDP connectors which
are connected to MDSS0 DP2 and DP3, and MDSS1 DP0 through DP3.
Enable Display Clock controllers, MDSS instanced, MDPs, DP controllers,
DP PHYs and link
By default, HBR2 (5.4G) is the max link link be supported. This patch add
the capability to support max link rate at HBR3 (8.1G).
Changes in v2:
-- add max link rate from dtsi
Changes in v3:
-- parser max_data_lanes and max_dp_link_rate from dp_out endpoint
Changes in v4:
-- delete unnecessary
Add capability to parser and retrieve max DP link supported rate from
link-frequencies property of dp_out endpoint.
Changes in v6:
-- second patch after split parser patch into two patches
Changes in v7:
-- without checking cnt against DP_MAX_NUM_DP_LANES to retrieve link rate
Signed-off-by:
Add capability to parser data-lanes as property of dp_out endpoint.
Also retain the original capability to parser data-lanes as property
of mdss_dp node to handle legacy case.
Changes in v6:
-- first patch after split parser patch into two
Changes in v7:
-- check "data-lanes" from endpoint first
Add both data-lanes and link-frequencies property into endpoint
changes in v7:
-- split yaml out of dtsi patch
-- link-frequencies from link rate to symbol rate
-- deprecation of old data-lanes property
Signed-off-by: Kuogee Hsieh
---
.../bindings/display/msm/dp-controller.yaml| 22
Move data-lanes property from mdss_dp node to dp_out endpoint. Also
add link-frequencies property into dp_out endpoint as well. The last
frequency specified at link-frequencies will be the max link rate
supported by DP.
Changes in v5:
-- revert changes at sc7180.dtsi and sc7280.dtsi
-- add _out
Add DP both data-lanes and link-frequencies property to dp_out endpoint and
support
functions to DP driver.
Kuogee Hsieh (5):
arm64: dts: qcom: add data-lanes and link-freuencies into dp_out
endpoint
dt-bindings: msm/dp: add data-lanes and link-frequencies property
drm/msm/dp: parser
From: Bjorn Andersson
The SA8295P ADP has, among other interfaces, six MiniDP connectors which
are connected to MDSS0 DP2 and DP3, and MDSS1 DP0 through DP3.
Enable Display Clock controllers, MDSS instanced, MDPs, DP controllers,
DP PHYs and link them all together.
Signed-off-by: Bjorn
From: Bjorn Andersson
Define the display clock controllers, the MDSS instances, the DP phys
and connect these together.
Signed-off-by: Bjorn Andersson
Signed-off-by: Bjorn Andersson
---
I did not add the USB-related DP controllers back into this patch. Will send
that separately once I've
From: Bjorn Andersson
The SC8280XP CRD has a EDP display on MDSS0 DP3, enable relevant nodes
and link it together with the backlight control.
Signed-off-by: Bjorn Andersson
Signed-off-by: Bjorn Andersson
---
Changes since v3:
- Added description of the regulator that powers the panel.
From: Bjorn Andersson
Most instances where HPD interrupts are masked and unmasked are guareded
by the presence of an EDP panel being connected, but not all. Extend
this to cover the last few places, as HPD interrupt handling is not used
for the EDP case.
Signed-off-by: Bjorn Andersson
From: Bjorn Andersson
The SC8280XP platform has four DisplayPort controllers, per MDSS
instance, all with widebus support.
The first two are defined to be DisplayPort only, while the latter pair
(of each instance) can be either DisplayPort or Embedded DisplayPort.
The two sets are tied to the
From: Bjorn Andersson
The DisplayPort controller's hot-plug mechanism is based on pinmuxing a
physical signal on a GPIO pin into the controller. This is not always
possible, either because there aren't dedicated GPIOs available or
because the hot-plug signal is a virtual notification, in cases
From: Bjorn Andersson
The Qualcomm SDM845 platform has a single DisplayPort controller, with
the same design as SC7180, so add support for this by reusing the SC7180
definition.
Signed-off-by: Bjorn Andersson
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Bjorn Andersson
---
Changes since v3:
From: Bjorn Andersson
The DisplayPort controller's internal HPD interrupt handling is used for
cases where the HPD signal is connected to a GPIO which is pinmuxed into
the DisplayPort controller. In other configurations the HPD notification
might be delivered by the DRM framework from an
From: Bjorn Andersson
In the SC8280XP platform there are two identical MDSS instances, each
with the same set of DisplayPort instances, at different addresses.
By not relying on the index to define the instance id it's possible to
describe them both in the same table and hence have a single
From: Bjorn Andersson
Add binding for the display subsystem and display processing unit in the
Qualcomm SC8280XP platform.
Signed-off-by: Bjorn Andersson
Signed-off-by: Bjorn Andersson
---
Changes since v3:
- Reworked on top of redesigned common yaml.
.../display/msm/qcom,sc8280xp-dpu.yaml
From: Bjorn Andersson
The Qualcomm SC8280XP platform contains DPU version 8.0.0, has 9
interfaces, 2 DSI controllers and 4 DisplayPort controllers. Extend the
necessary definitions and describe the DPU in the SC8280XP.
Signed-off-by: Bjorn Andersson
Signed-off-by: Bjorn Andersson
---
Changes
From: Bjorn Andersson
Add compatible for the SC8280XP Mobile Display Subsystem and
initialization for version 8.0.0.
Signed-off-by: Bjorn Andersson
Signed-off-by: Bjorn Andersson
---
Changes since v3:
- Split out from DPU patch
drivers/gpu/drm/msm/msm_mdss.c | 4
1 file changed, 4
From: Bjorn Andersson
Add compatibles for the DisplayPort and Embedded DisplayPort blocks in
Qualcomm SDM845 and SC8280XP platforms.
Signed-off-by: Bjorn Andersson
Signed-off-by: Bjorn Andersson
Acked-by: Krzysztof Kozlowski
---
Changes since v3:
- None
This introduces support for the SC8280XP platform in the MDSS, DPU and
DP driver. It reworks the HDP handling in the DP driver to support
external HPD sources - such as the dp-connector, or USB Type-C altmode.
It then introduces the display clock controllers, mdss, dpu and
displayport controllers
On 05/12/2022 17:37, Robert Foss wrote:
Add mdss, mdss_mdp, dsi0, dsi0_phy nodes. With these
nodes the display subsystem is configured to support
one DSI output.
Signed-off-by: Robert Foss
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 199 ++-
1 file changed, 195
On 05/12/2022 17:37, Robert Foss wrote:
> The sm8350-hdk ships with the LT9611 UXC DSI/HDMI bridge chip.
>
> In order to toggle the board to enable the HDMI output,
> switch #7 & #8 on the rightmost multi-switch package have
> to be toggled to On.
>
> Signed-off-by: Robert Foss
Thank you for
On 05/12/2022 17:37, Robert Foss wrote:
> Add mdss, mdss_mdp, dsi0, dsi0_phy nodes. With these
> nodes the display subsystem is configured to support
> one DSI output.
>
> Signed-off-by: Robert Foss
> ---
> arch/arm64/boot/dts/qcom/sm8350.dtsi | 199 ++-
> 1 file
On 05/12/2022 18:37, Robert Foss wrote:
Enable the display subsystem and the dsi0 output for
the sm8350-hdk board.
Signed-off-by: Robert Foss
---
arch/arm64/boot/dts/qcom/sm8350-hdk.dts | 22 ++
1 file changed, 22 insertions(+)
diff --git
On 05/12/2022 17:37, Robert Foss wrote:
Add compatibles string, "qcom,sm8350-mdss", for the multimedia display
subsystem unit used on Qualcomm SM8350 platform.
Signed-off-by: Robert Foss
---
Reviewed-by: Konrad Dybcio
Konrad
drivers/gpu/drm/msm/msm_mdss.c | 4
1 file changed, 4
On 05/12/2022 18:37, Robert Foss wrote:
Add mdss, mdss_mdp, dsi0, dsi0_phy nodes. With these
nodes the display subsystem is configured to support
one DSI output.
Signed-off-by: Robert Foss
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 199 ++-
1 file changed, 195
On 05/12/2022 17:37, Robert Foss wrote:
Add compatibility for SM8350 display subsystem, including
required entries in DPU hw catalog.
Signed-off-by: Robert Foss
---
Reviewed-by: Konrad Dybcio
Konrad
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 196 ++
Enable the display subsystem and the dsi0 output for
the sm8350-hdk board.
Signed-off-by: Robert Foss
---
arch/arm64/boot/dts/qcom/sm8350-hdk.dts | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8350-hdk.dts
Add mdss, mdss_mdp, dsi0, dsi0_phy nodes. With these
nodes the display subsystem is configured to support
one DSI output.
Signed-off-by: Robert Foss
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 199 ++-
1 file changed, 195 insertions(+), 4 deletions(-)
diff --git
The sm8350-hdk ships with the LT9611 UXC DSI/HDMI bridge chip.
In order to toggle the board to enable the HDMI output,
switch #7 & #8 on the rightmost multi-switch package have
to be toggled to On.
Signed-off-by: Robert Foss
---
arch/arm64/boot/dts/qcom/sm8350-hdk.dts | 105
Use two interconnect cells in order to optionally
support a path tag.
Signed-off-by: Robert Foss
Reviewed-by: Konrad Dybcio
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 28 ++--
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git
Add GPIO line names as described by the sm8350-hdk schematic.
Signed-off-by: Robert Foss
---
arch/arm64/boot/dts/qcom/sm8350-hdk.dts | 205
1 file changed, 205 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8350-hdk.dts
b/arch/arm64/boot/dts/qcom/sm8350-hdk.dts
The mmxc power-domain-name is not required, and is not
used by either earlier or later SoC versions (sm8250 / sm8450).
Signed-off-by: Robert Foss
Reviewed-by: Konrad Dybcio
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git
Add compatibles string, "qcom,sm8350-mdss", for the multimedia display
subsystem unit used on Qualcomm SM8350 platform.
Signed-off-by: Robert Foss
---
drivers/gpu/drm/msm/msm_mdss.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/msm/msm_mdss.c
Add compatibles string, "qcom,sm8350-dpu", for the display processing unit
used on Qualcomm SM8350 platform.
Signed-off-by: Robert Foss
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
Add compatibility for SM8350 display subsystem, including
required entries in DPU hw catalog.
Signed-off-by: Robert Foss
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 196 ++
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h| 1 +
2 files changed, 197 insertions(+)
diff
Mobile Display Subsystem (MDSS) encapsulates sub-blocks
like DPU display controller, DSI etc. Add YAML schema for MDSS device
tree bindings
Signed-off-by: Robert Foss
---
.../display/msm/qcom,sm8350-mdss.yaml | 221 ++
1 file changed, 221 insertions(+)
create mode
Mobile Display Subsystem (MDSS) encapsulates sub-blocks
like DPU display controller, DSI etc. Add YAML schema for DPU device
tree bindings
Signed-off-by: Robert Foss
Reviewed-by: Rob Herring
---
.../bindings/display/msm/qcom,sm8350-dpu.yaml | 120 ++
1 file changed, 120
Dependencies:
https://lore.kernel.org/all/20221102231309.583587-1-dmitry.barysh...@linaro.org/
https://lore.kernel.org/all/20221024164225.3236654-1-dmitry.barysh...@linaro.org/
https://lore.kernel.org/all/20221104130324.1024242-5-dmitry.barysh...@linaro.org/
Branch:
On 23/11/2022 22:07, Dmitry Baryshkov wrote:
> From: Vinod Koul
>
> Add the LT9611uxc DSI-HDMI bridge and supplies
>
> Signed-off-by: Vinod Koul
> Reviewed-by: Konrad Dybcio
> Signed-off-by: Dmitry Baryshkov
> ---
> arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 59 +
> 1
On 23/11/2022 22:07, Dmitry Baryshkov wrote:
> Add devices tree nodes describing display hardware on SM8450:
> - Display Clock Controller
> - MDSS
> - MDP
> - two DSI controllers and DSI PHYs
>
> This does not provide support for DP controllers present on SM8450.
>
> Reviewed-by: Konrad Dybcio
On Sun, Dec 04, 2022 at 04:11:41AM +0530, Akhil P Oommen wrote:
> Fix the below kernel panic due to null pointer access:
> [ 18.504431] Unable to handle kernel NULL pointer dereference at virtual
> address 0048
> [ 18.513464] Mem abort info:
> [ 18.516346] ESR =
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