Quoting Dmitry Baryshkov (2022-12-15 13:12:49)
> On 15/12/2022 02:38, Stephen Boyd wrote:
> > Quoting Kuogee Hsieh (2022-12-14 14:56:23)
> >>
> >> Once link training start, then there are no any interactions between
> >> controller and phy during link training session.
> >
> > What do you mean? The
dp_display_irq_handler() is the main isr handler with the helps
of two sub isr, dp_aux_isr and dp_ctrl_isr, to service all DP
interrupts on every irq triggered. Current all three isr does
not return IRQ_HANDLED if there are any interrupts it had
serviced. This patch fix this ambiguity by having all
There are 3 possible interrupt sources are handled by DP controller,
HPDstatus, Controller state changes and Aux read/write transaction.
At every irq, DP controller have to check isr status of every interrupt
sources and service the interrupt if its isr status bits shows interrupts
are pending. The
ignore spuriors isr at dp_aux_isr() to fixed eDP edid read failed
Kuogee Hsieh (2):
drm/msm/dp: do not complete dp_aux_cmd_fifo_tx() if irq is not for aux
transfer
drm/msm/dp: enhance dp controller isr
drivers/gpu/drm/msm/dp/dp_aux.c | 97 ++---
driver
On Fri, 16 Dec 2022 at 00:53, Kuogee Hsieh wrote:
>
> dp_display_irq_handler() is the main isr handler with the helps
> of two sub isr, dp_aux_isr and dp_ctrl_isr, to service all DP
> interrupts on every irq triggered. Current all three isr does
> not return IRQ_HANDLED if there are any interrupts
On Fri, 16 Dec 2022 at 00:53, Kuogee Hsieh wrote:
>
> There are 3 possible interrupt sources are handled by DP controller,
> HPDstatus, Controller state changes and Aux read/write transaction.
> At every irq, DP controller have to check isr status of every interrupt
> sources and service the inter
Hi,
On Thu, Dec 15, 2022 at 1:12 PM Dmitry Baryshkov
wrote:
>
> On 15/12/2022 02:38, Stephen Boyd wrote:
> > Quoting Kuogee Hsieh (2022-12-14 14:56:23)
> >>
> >> On 12/13/2022 3:06 PM, Stephen Boyd wrote:
> >>> Quoting Kuogee Hsieh (2022-12-13 13:44:05)
> Add both data-lanes and link-frequen
On Fri, 16 Dec 2022 at 00:57, Doug Anderson wrote:
>
> Hi,
>
> On Thu, Dec 15, 2022 at 1:12 PM Dmitry Baryshkov
> wrote:
> >
> > On 15/12/2022 02:38, Stephen Boyd wrote:
> > > Quoting Kuogee Hsieh (2022-12-14 14:56:23)
> > >>
> > >> On 12/13/2022 3:06 PM, Stephen Boyd wrote:
> > >>> Quoting Kuoge
ignore spuriors isr at dp_aux_isr() to fixed eDP edid read failed
Kuogee Hsieh (2):
drm/msm/dp: do not complete dp_aux_cmd_fifo_tx() if irq is not for aux
transfer
drm/msm/dp: enhance dp controller isr
drivers/gpu/drm/msm/dp/dp_aux.c | 98 +
driver
dp_display_irq_handler() is the main isr handler with the helps
of two sub isr, dp_aux_isr and dp_ctrl_isr, to service all DP
interrupts on every irq triggered. Current all three isr does
not return IRQ_HANDLED if there are any interrupts it had
serviced. This patch fix this ambiguity by having all
There are 3 possible interrupt sources are handled by DP controller,
HPDstatus, Controller state changes and Aux read/write transaction.
At every irq, DP controller have to check isr status of every interrupt
sources and service the interrupt if its isr status bits shows interrupts
are pending. The
On 12/15/2022 1:15 PM, Dmitry Baryshkov wrote:
On 15/12/2022 22:10, Stephen Boyd wrote:
Quoting Dmitry Baryshkov (2022-12-15 10:46:42)
On 15/12/2022 20:32, Kuogee Hsieh wrote:
if (!aux->cmd_busy)
return;
if (aux->native)
- dp_aux_native_handler(aux,
On 12/15/2022 1:15 PM, Dmitry Baryshkov wrote:
On 15/12/2022 22:10, Stephen Boyd wrote:
Quoting Dmitry Baryshkov (2022-12-15 10:46:42)
On 15/12/2022 20:32, Kuogee Hsieh wrote:
if (!aux->cmd_busy)
return;
if (aux->native)
- dp_aux_native_handler(aux,
On 15/12/2022 22:10, Stephen Boyd wrote:
Quoting Dmitry Baryshkov (2022-12-15 10:46:42)
On 15/12/2022 20:32, Kuogee Hsieh wrote:
if (!aux->cmd_busy)
return;
if (aux->native)
- dp_aux_native_handler(aux, isr);
+ ret = dp_aux_native_handler(au
On 15/12/2022 02:38, Stephen Boyd wrote:
Quoting Kuogee Hsieh (2022-12-14 14:56:23)
On 12/13/2022 3:06 PM, Stephen Boyd wrote:
Quoting Kuogee Hsieh (2022-12-13 13:44:05)
Add both data-lanes and link-frequencies property into endpoint
Why do we care? Please tell us why it's important.
Any r
There are 3 possible interrupt sources are handled by DP controller,
HPDstatus, Controller state changes and Aux read/write transaction.
At every irq, DP controller have to check isr status of every interrupt
sources and service the interrupt if its isr status bits shows interrupts
are pending. The
On 12/15/2022 10:46 AM, Dmitry Baryshkov wrote:
On 15/12/2022 20:32, Kuogee Hsieh wrote:
There are 3 possible interrupt sources are handled by DP controller,
HPDstatus, Controller state changes and Aux read/write transaction.
At every irq, DP controller have to check isr status of every inter
On 12/15/2022 12:10 PM, Stephen Boyd wrote:
Quoting Dmitry Baryshkov (2022-12-15 10:46:42)
On 15/12/2022 20:32, Kuogee Hsieh wrote:
if (!aux->cmd_busy)
return;
if (aux->native)
- dp_aux_native_handler(aux, isr);
+ ret = dp_aux_native_handl
Quoting Kuogee Hsieh (2022-12-15 09:08:04)
>
> On 12/14/2022 4:38 PM, Stephen Boyd wrote:
> > Quoting Kuogee Hsieh (2022-12-14 14:56:23)
> >> On 12/13/2022 3:06 PM, Stephen Boyd wrote:
> >>> Quoting Kuogee Hsieh (2022-12-13 13:44:05)
> >
> >> Therefore I think add data-lanes and link-frequencies pr
Quoting Dmitry Baryshkov (2022-12-15 10:46:42)
> On 15/12/2022 20:32, Kuogee Hsieh wrote:
> > if (!aux->cmd_busy)
> > return;
> >
> > if (aux->native)
> > - dp_aux_native_handler(aux, isr);
> > + ret = dp_aux_native_handler(aux, isr);
> > else
On 15/12/2022 20:32, Kuogee Hsieh wrote:
There are 3 possible interrupt sources are handled by DP controller,
HPDstatus, Controller state changes and Aux read/write transaction.
At every irq, DP controller have to check isr status of every interrupt
sources and service the interrupt if its isr st
There are 3 possible interrupt sources are handled by DP controller,
HPDstatus, Controller state changes and Aux read/write transaction.
At every irq, DP controller have to check isr status of every interrupt
sources and service the interrupt if its isr status bits shows interrupts
are pending. The
On 12/14/2022 6:59 PM, Abhinav Kumar wrote:
Hi Stephen
On 12/14/2022 4:29 PM, Stephen Boyd wrote:
Quoting Doug Anderson (2022-12-14 16:14:42)
Hi,
On Wed, Dec 14, 2022 at 3:46 PM Abhinav Kumar
wrote:
Hi Doug
On 12/14/2022 2:29 PM, Doug Anderson wrote:
Hi,
On Wed, Dec 14, 2022 at 1:21
On 12/14/2022 4:38 PM, Stephen Boyd wrote:
Quoting Kuogee Hsieh (2022-12-14 14:56:23)
On 12/13/2022 3:06 PM, Stephen Boyd wrote:
Quoting Kuogee Hsieh (2022-12-13 13:44:05)
Add both data-lanes and link-frequencies property into endpoint
Why do we care? Please tell us why it's important.
Any
As per the recommended recovery sequence of adreno gpu, cx gdsc should
collapse at hardware before it is turned back ON. This helps to clear
out the stale states in hardware before it is reinitialized. Use the
genpd notifier along with the newly introduced
dev_pm_genpd_synced_poweroff() api to ensu
When a device has multiple power domains, dev->power_domain is left
empty during probe. That didn't cause any issue so far because we are
freeloading on smmu driver's vote on cx gdsc. Instead of that, create
a device_link between cx genpd device and gmu device to keep a vote from
gpu driver.
Befor
Remove the unused 'reset' interface which was supposed to help to ensure
that cx gdsc has collapsed during gpu recovery. This is was not enabled
so far due to missing gpucc driver support. Similar functionality using
genpd framework will be implemented in the upcoming patch.
Signed-off-by: Akhil P
Add support for the newly added 'synced_poweroff' genpd flag. This allows
some clients (like adreno gpu driver) to request gdsc driver to ensure
a votable gdsc (like gpucc cx gdsc) has collapsed at hardware.
Signed-off-by: Akhil P Oommen
---
drivers/clk/qcom/gdsc.c | 11 ++-
1 file chan
From: Ulf Hansson
Some genpd providers doesn't ensure that it has turned off at hardware.
This is fine until the consumer really requires during some special
scenarios that the power domain collapse at hardware before it is
turned ON again.
An example is the reset sequence of Adreno GPU which re
s rebased on top of linux-next (20221215) since the changes span
multiple drivers.
[1] https://patchwork.freedesktop.org/series/107507/
Akhil P Oommen (4):
clk: qcom: gdsc: Support 'synced_poweroff' genpd flag
drm/msm/a6xx: Vote for cx gdsc from gpu driver
drm/msm/a6xx: Remove cx g
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