On 1/31/2023 2:18 PM, Douglas Anderson wrote:
In commit 7d8e9a90509f ("drm/msm/dsi: move DSI host powerup to modeset
time"), we moved powering up DSI hosts to modeset time. This wasn't
because it was an elegant design, but there were no better options.
That commit actually ended up breaking
On Wed, 25 Jan 2023 16:13:56 -0600, Rob Herring wrote:
> 'memory-region' is a common property and already has a type.
>
> Signed-off-by: Rob Herring
> ---
> Documentation/devicetree/bindings/display/msm/gpu.yaml | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Applied, thanks!
In commit 7d8e9a90509f ("drm/msm/dsi: move DSI host powerup to modeset
time") the error handling with regards to dsi_mgr_bridge_power_on()
got a bit worse. Specifically if we failed to power the bridge on then
nothing would really notice. The modeset function couldn't return an
error and thus we'd
In commit 7d8e9a90509f ("drm/msm/dsi: move DSI host powerup to modeset
time"), we moved powering up DSI hosts to modeset time. This wasn't
because it was an elegant design, but there were no better options.
That commit actually ended up breaking ps8640, and thus was born
commit ec7981e6c614
Set the "pre_enable_prev_first" as provided by commit 4fb912e5e190
("drm/bridge: Introduce pre_enable_prev_first to alter bridge init
order"). This should allow us to revert commit ec7981e6c614
("drm/msm/dsi: don't powerup at modeset time for parade-ps8640") and
commit 7d8e9a90509f ("drm/msm/dsi:
+Suraj
On Tue, Jan 31, 2023 at 12:16:44PM -0500, Rodrigo Vivi wrote:
>
> +Suraj who is also working on HDCP related code that even can conflict
> wit this.
>
> On Wed, Jan 18, 2023 at 07:30:12PM +, Mark Yacoub wrote:
> > From: Sean Paul
>
> First of all, Sean, please accept my public
+Suraj who is also working on HDCP related code that even can conflict
wit this.
On Wed, Jan 18, 2023 at 07:30:12PM +, Mark Yacoub wrote:
> From: Sean Paul
First of all, Sean, please accept my public apologies here. I just noticed
now that you had pinged me 9 *months* ago!
I noticed while
On 30/01/2023 17:11, Vinod Polimera wrote:
Enable PSR on eDP interface using drm self-refresh librabry.
This patch uses a trigger from self-refresh library to enter/exit
into PSR, when there are no updates from framework.
Signed-off-by: Kalyan Thota
Signed-off-by: Vinod Polimera
Reviewed-by:
On Tue, 31 Jan 2023 11:21:18 +
Simon Ser wrote:
> On Tuesday, January 31st, 2023 at 12:13, Pekka Paalanen
> wrote:
>
> > On Tue, 31 Jan 2023 10:06:39 +
> > Simon Ser wrote:
> >
> > > On Tuesday, January 31st, 2023 at 10:25, Pekka Paalanen
> > > wrote:
> > >
> > > > indeed,
On 30/01/2023 17:11, Vinod Polimera wrote:
From: Sankeerth Billakanti
Updated frames get queued if self_refresh_aware is set when the
sink is in psr. To support bridge enable and avoid queuing of update
frames, reset the self_refresh_aware state after entering psr.
Signed-off-by: Sankeerth
On 30/01/2023 17:11, Vinod Polimera wrote:
Changes in v2:
- Use dp bridge to set psr entry/exit instead of dpu_enocder.
- Don't modify whitespaces.
- Set self refresh aware from atomic_check.
- Set self refresh aware only if psr is supported.
- Provide a stub for
On 30/01/2023 17:11, Vinod Polimera wrote:
Recommended way of reading the interface timing gen status is via
status register. Timing gen status register will give a reliable status
of the interface especially during ON/OFF transitions. This support was
added from DPU version 5.0.0.
On 31/01/2023 14:10, Dmitry Baryshkov wrote:
On 31/01/2023 07:13, Abhinav Kumar wrote:
On 12/29/2022 11:18 AM, Dmitry Baryshkov wrote:
There is no need to pass full dpu_hw_pipe_cfg instance to
_dpu_hw_sspp_setup_scaler3, pass just struct dpu_format pointer.
Signed-off-by: Dmitry Baryshkov
On 31/01/2023 07:13, Abhinav Kumar wrote:
On 12/29/2022 11:18 AM, Dmitry Baryshkov wrote:
There is no need to pass full dpu_hw_pipe_cfg instance to
_dpu_hw_sspp_setup_scaler3, pass just struct dpu_format pointer.
Signed-off-by: Dmitry Baryshkov
---
On 30/01/2023 23:51, Abhinav Kumar wrote:
On 12/29/2022 11:18 AM, Dmitry Baryshkov wrote:
In preparation to adding fully virtualized planes, move struct
dpu_hw_sspp instance from struct dpu_plane to struct dpu_plane_state, as
it will become a part of state (allocated during atomic check)
On Tuesday, January 31st, 2023 at 12:13, Pekka Paalanen
wrote:
> On Tue, 31 Jan 2023 10:06:39 +
> Simon Ser wrote:
>
> > On Tuesday, January 31st, 2023 at 10:25, Pekka Paalanen
> > wrote:
> >
> > > indeed, what about simply using a 1x1 framebuffer for real? Why was that
> > > approach
On 27/01/2023 00:55, Abhinav Kumar wrote:
On 12/29/2022 11:18 AM, Dmitry Baryshkov wrote:
For all hardware blocks except SSPP the corresponding struct is named
after the block. Rename dpu_hw_pipe (SSPP structure) to dpu_hw_sspp.
Signed-off-by: Dmitry Baryshkov
Idea seems okay but then we
On Tue, 31 Jan 2023 10:06:39 +
Simon Ser wrote:
> On Tuesday, January 31st, 2023 at 10:25, Pekka Paalanen
> wrote:
>
> > indeed, what about simply using a 1x1 framebuffer for real? Why was that
> > approach rejected?
>
> Ideally we don't want to allocate any GPU memory for the
On Tuesday, January 31st, 2023 at 10:25, Pekka Paalanen
wrote:
> indeed, what about simply using a 1x1 framebuffer for real? Why was that
> approach rejected?
Ideally we don't want to allocate any GPU memory for the solid-fill
stuff. And if we special-case 1x1 FB creation to not be backed by
On Fri, 6 Jan 2023 23:49:34 +0200
Dmitry Baryshkov wrote:
> On Fri, 6 Jan 2023 at 20:41, Daniel Vetter wrote:
> >
> > On Fri, Jan 06, 2023 at 05:43:23AM +0200, Dmitry Baryshkov wrote:
> > > On Fri, 6 Jan 2023 at 02:38, Jessica Zhang
> > > wrote:
> > > >
> > > >
> > > >
> > > > On 1/5/2023
20 matches
Mail list logo
