To ease review and reuse rename MIXER feature masks to contain base DPU
version since which this mask is used.
Signed-off-by: Dmitry Baryshkov
---
.../gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h | 12 ++--
.../gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h | 12 ++--
drive
To ease review and reuse rename MERGE_3D feature masks to contain base
DPU version since which this mask is used.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dp
To ease review and reuse rename INTF feature masks to contain base DPU
version since which this mask is used.
Signed-off-by: Dmitry Baryshkov
---
.../msm/disp/dpu1/catalog/dpu_3_0_msm8998.h| 8
.../drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h | 8
.../drm/msm/disp/dpu1/cata
To ease review and reuse rename VIG and DMA feature masks to contain
base DPU version since which this mask is used.
Signed-off-by: Dmitry Baryshkov
---
.../msm/disp/dpu1/catalog/dpu_3_0_msm8998.h | 16 ++---
.../msm/disp/dpu1/catalog/dpu_4_0_sdm845.h| 16 ++---
.../gpu/drm
Remove duplicate between sc8280xp and sm8450, which belong to the same
DPU major revision.
Signed-off-by: Dmitry Baryshkov
---
.../msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h | 131 ++---
.../msm/disp/dpu1/catalog/dpu_8_1_sm8450.h| 135 ++
.../gpu/drm/msm/disp/dpu1/
IRQ masks are rarely shared between different DPU revisions. Inline them
to the dpu_mdss_cfg intances and drop them from the dpu_hw_catalog.c
Signed-off-by: Dmitry Baryshkov
---
.../msm/disp/dpu1/catalog/dpu_3_0_msm8998.h | 9 ++-
.../msm/disp/dpu1/catalog/dpu_4_0_sdm845.h| 10 ++-
.../ms
Drop the version comparison macros from dpu_hw_catalog.h, they are
unused.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 16
1 file changed, 16 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
b/drivers/gpu/drm/msm
To ease review and reuse rename CTL feature masks to contain base DPU
version since which this mask is used.
Signed-off-by: Dmitry Baryshkov
---
.../gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h | 10 +-
.../gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h | 10 +-
drivers/gpu
Remove duplicate between sm6115 and qcm2290, which belong to the same
DPU major revision.
Signed-off-by: Dmitry Baryshkov
---
.../msm/disp/dpu1/catalog/dpu_6_3_sm6115.h| 36 --
.../msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h | 66 ---
.../gpu/drm/msm/disp/dpu1/catalog/d
Use defined name DEFAULT_DPU_OUTPUT_LINE_WIDTH instead of open coding
the value.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp
Remove duplicate between sc8180x and sm8150, which belong to the same
DPU major revision. The merged file is named using the DPU major version
and the amount of LM units.
Signed-off-by: Dmitry Baryshkov
---
.../msm/disp/dpu1/catalog/dpu_5_0_sm8150.h| 172 ++
.../msm/disp/dpu1
Enable DSPP blocks on sc8180x platform, basing on the vendor dtsi.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
b/drivers/gpu/drm/msm/disp
Duplicate some of sm8350 catalog entries to remove dependencies between
DPU major generations.
Signed-off-by: Dmitry Baryshkov
---
.../gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/c
Duplicate some of sm8150 catalog entries to remove dependencies between
DPU major generations.
Signed-off-by: Dmitry Baryshkov
---
.../msm/disp/dpu1/catalog/dpu_6_0_sm8250.h| 134 --
.../msm/disp/dpu1/catalog/dpu_7_0_sm8350.h| 34 -
.../msm/disp/dpu1/catalog/dpu_8_0_
Mark DSPP_2 and DSPP_3 as used for LM_2 and LM_3
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h
b/drivers/gpu/drm/msm/disp/d
Duplicate some of sc7180 catalog entries to remove dependencies between
DPU major generations.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/cat
Theoretically since sm8150 we should be using a single CTL for the
source split case, but since we do not support it for now, fallback to
DPU_CTL_SPLIT_DISPLAY.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h | 4 ++--
1 file changed, 2 insertions(+),
After fixing scaler version we are sure that sm8450 and sc8280xp vig
sblk's are duplicates of sm8250_vig_sblk and thus can be dropped.
Signed-off-by: Dmitry Baryshkov
---
.../msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h | 8
.../drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h | 8
d
Signed-off-by: Dmitry Baryshkov
---
.../msm/disp/dpu1/catalog/dpu_4_0_sdm845.h| 203 +
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 208 +-
2 files changed, 204 insertions(+), 207 deletions(-)
create mode 100644 drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0
Duplicate some of sm8250 catalog entries to remove dependencies between
DPU major generations.
Signed-off-by: Dmitry Baryshkov
---
.../msm/disp/dpu1/catalog/dpu_7_0_sm8350.h| 23 +--
1 file changed, 21 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/
Signed-off-by: Dmitry Baryshkov
---
.../msm/disp/dpu1/catalog/dpu_5_0_sm8150.h| 194 ++
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 187 +
2 files changed, 195 insertions(+), 186 deletions(-)
create mode 100644 drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0
Duplicate some of sdm845 catalog entries to remove dependencies between
DPU major generations.
Signed-off-by: Dmitry Baryshkov
---
.../msm/disp/dpu1/catalog/dpu_3_0_msm8998.h | 19 +++-
.../msm/disp/dpu1/catalog/dpu_5_0_sm8150.h| 43 +--
.../msm/disp/dpu1/catalog/dpu_5_
Signed-off-by: Dmitry Baryshkov
---
.../msm/disp/dpu1/catalog/dpu_6_0_sm8250.h| 131 +
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 132 +-
2 files changed, 132 insertions(+), 131 deletions(-)
create mode 100644 drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0
Signed-off-by: Dmitry Baryshkov
---
.../msm/disp/dpu1/catalog/dpu_7_2_sc7280.h| 149 ++
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 145 +
2 files changed, 151 insertions(+), 143 deletions(-)
create mode 100644 drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2
Signed-off-by: Dmitry Baryshkov
---
.../msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h | 116 ++
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 108 +---
2 files changed, 117 insertions(+), 107 deletions(-)
create mode 100644 drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_
Signed-off-by: Dmitry Baryshkov
---
.../msm/disp/dpu1/catalog/dpu_3_0_msm8998.h | 189 +
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 191 +-
2 files changed, 191 insertions(+), 189 deletions(-)
create mode 100644 drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0
Signed-off-by: Dmitry Baryshkov
---
.../msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h | 108 ++
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 106 +
2 files changed, 109 insertions(+), 105 deletions(-)
create mode 100644 drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1
Signed-off-by: Dmitry Baryshkov
---
.../msm/disp/dpu1/catalog/dpu_6_3_sm6115.h| 96 +++
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 90 +
2 files changed, 98 insertions(+), 88 deletions(-)
create mode 100644 drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm
Signed-off-by: Dmitry Baryshkov
---
.../msm/disp/dpu1/catalog/dpu_6_2_sc7180.h| 148 ++
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 144 +
2 files changed, 149 insertions(+), 143 deletions(-)
create mode 100644 drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2
Signed-off-by: Dmitry Baryshkov
---
.../msm/disp/dpu1/catalog/dpu_7_0_sm8350.h| 175 ++
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 175 +-
2 files changed, 176 insertions(+), 174 deletions(-)
create mode 100644 drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_
Signed-off-by: Dmitry Baryshkov
---
.../msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h | 196 ++
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 189 +
2 files changed, 197 insertions(+), 188 deletions(-)
create mode 100644 drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0
Signed-off-by: Dmitry Baryshkov
---
.../msm/disp/dpu1/catalog/dpu_8_1_sm8450.h| 203 +
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 204 +-
2 files changed, 205 insertions(+), 202 deletions(-)
create mode 100644 drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1
Signed-off-by: Dmitry Baryshkov
---
.../msm/disp/dpu1/catalog/dpu_9_0_sm8550.h| 178 +
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 181 +-
2 files changed, 180 insertions(+), 179 deletions(-)
create mode 100644 drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0
UBWC and highest bank settings differ slightly between different DPU
units of the same generation, while the dpu_caps and dpu_mdp_cfg are
much more stable. To ease configuration reuse move ubwc_swizzle and
highest_bank_bit data to separate structure.
Signed-off-by: Dmitry Baryshkov
---
.../gpu/d
Fix several leftover _pp strutures and mark them as const, making all hw
catalog fit into the rodata section.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1
QSEED4 is a newer variant of QSEED3LITE, which should be used on
sm8250 and sm8350. Fix the DPU caps structure and used feature masks.
Fixes: d21fc5dfc3df ("drm/msm/dpu1: add support for qseed3lite used on sm8250")
Fixes: 0e91bcbb0016 ("drm/msm/dpu: Add SM8350 to hw catalog")
Signed-off-by: Dmitry
DMA2 and DMA3 planes on msm8998 should use corresponding DMA2 and DMA3
clocks rather than CURSOR0/1 clocks (which are used for the CURSOR
planes). Correct corresponding SSPP declarations.
Fixes: 94391a14fc27 ("drm/msm/dpu1: Add MSM8998 to hw catalog")
Cc: AngeloGioacchino Del Regno
Cc: Jami Kettu
DPU driver has been using the DPU_CLK_CTRL_CURSOR prefix for the DMA
SSPP blocks used for the cursor planes. This has lead to the confusion
at least for the MSM8998 platform. In preparation to supporting the
cursor SSPP blocks, use proper enum values to index DMA SSPP clock
controls.
Reviewed-by:
The msm8998 doesn't seem to support DIM_LAYER, so drop it from
the supported features mask.
Fixes: 2d8a4edb672d ("drm/msm/dpu: use feature bit for LM combined alpha check")
Fixes: 94391a14fc27 ("drm/msm/dpu1: Add MSM8998 to hw catalog")
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dis
From: Konrad Dybcio
These blocks are of variable length on different SoCs. Set the
correct values where I was able to retrieve it from downstream
DTs and leave the old defaults (0x1c8 for sspp and 0x280 for
intf) otherwise.
Signed-off-by: Konrad Dybcio
[DB: fixed some of lengths]
Signed-off-by:
Fix typo if the name of the sblk structure for the sm8550's dma_sblk_5.
Fixes: efcd0107727c ("drm/msm/dpu: add support for SM8550")
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/g
DSC hw catalog data is not supposed to be changed, so mark it as const
data.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 4 ++--
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c | 4 ++--
3 files change
QSEED4 is a newer variant of QSEED3LITE, which should be used on
sm6115. Fix the used feature masks.
Fixes: 100d7ef6995d ("drm/msm/dpu: add support for SM8450")
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 9 +++--
1 file changed, 3 insertions(+), 6 de
QSEED4 is a newer variant of QSEED3LITE, which should be used on
sm8550. Fix the DPU caps structure and used feature masks.
Fixes: efcd0107727c ("drm/msm/dpu: add support for SM8550")
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 10 +-
1 file chang
According to vendor DTS files both sm6116 and qcm2290 should have
max_mixer_width set to 2048 (DEFAULT_DPU_LINE_WIDTH). Correct it.
Fixes: 3581b7062cec ("drm/msm/disp/dpu1: add support for display on SM6115")
Fixes: 5334087ee743 ("drm/msm: add support for QCM2290 MDSS")
Signed-off-by: Dmitry Barys
QSEED4 is a newer variant of QSEED3LITE, which should be used on
sc8280xp. Fix the DPU caps structure and used feature masks.
Fixes: 4a352c2fc15a ("drm/msm/dpu: Introduce SC8280XP")
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 18 +-
1 file
Change sc7180's ctl block len to 0x1dc.
Fixes: 7bdc0c4b8126 ("msm:disp:dpu1: add support for display for SC7180 target")
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/ms
QSEED4 is a newer variant of QSEED3LITE, which should be used on
sm8450. Fix the used feature masks.
Fixes: 100d7ef6995d ("drm/msm/dpu: add support for SM8450")
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 8
1 file changed, 4 insertions(+), 4 del
QCM2290 doesn't seem to support reg-dma, UBWC and CSC. Drop
corresponding features being incorrectly enabled for qcm2290.
Cc: Loic Poulain
Fixes: 5334087ee743 ("drm/msm: add support for QCM2290 MDSS")
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/
This huge series attempts to restructure the DPU HW catalog into a
manageable and reviewable data set. In order to ease review and testing
I merged all the necessary fixes into this series. Also I cherry-picked
& slightly fixed Konrad's patch adding size to the SSPP and INTF macros.
First 12 patch
The SC8280XP also has a black hole at the top of MDP_TOP region. Set
corresponding bit to disable access to that region.
Fixes: 4a352c2fc15a ("drm/msm/dpu: Introduce SC8280XP")
Reviewed-by: Abhinav Kumar
Reviewed-by: Neil Armstrong
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/d
On 11/02/2023 14:26, Konrad Dybcio wrote:
These blocks are of variable length on different SoCs. Set the
correct values where I was able to retrieve it from downstream
DTs and leave the old defaults (0x1c8 for sspp and 0x280 for
intf) otherwise.
Could you please add FIXMEs close to the values w
On 11/02/2023 14:26, Konrad Dybcio wrote:
Add basic SM6375 support to the DPU1 driver to enable display output.
Signed-off-by: Konrad Dybcio
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 120 ++
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h| 1 +
drivers/gpu/drm/msm
On 11/02/2023 14:26, Konrad Dybcio wrote:
Document 6350 DPU and MDSS.
Signed-off-by: Konrad Dybcio
---
.../bindings/display/msm/qcom,sm6350-dpu.yaml | 94
.../display/msm/qcom,sm6350-mdss.yaml | 213 ++
2 files changed, 307 insertions(+)
create mode 10064
On 11/02/2023 14:26, Konrad Dybcio wrote:
Add SM6350 support to the DPU1 driver to enable display output.
Signed-off-by: Konrad Dybcio
Signed-off-by: Konrad Dybcio
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 187 ++
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h| 3
On 11/02/2023 13:51, Konrad Dybcio wrote:
Now that the only user is handled by common code, remove the option to
specify custom handlers through match data.
This is effectively a revert of commit:
5ae15e76271 ("drm/msm/dsi: Allow to specify dsi config as pdata")
Signed-off-by: Konrad Dybcio
On 11/02/2023 13:51, Konrad Dybcio wrote:
The configs are identical, other than the number of *maximum* DSI
hosts allowed. This isn't an issue, unless somebody deliberately
tries to access the inexistent host by adding a dt node for it.
Remove the SC7180 struct and point the hw revision match to
On 11/02/2023 13:51, Konrad Dybcio wrote:
Some structs were defined multiple times for no apparent reason.
Deduplicate them.
Fixes: 3f3c8aff1f8f ("drm/msm/dsi: Add configuration for 8x76")
Fixes: 3a3ff88a0fc1 ("drm/msm/dsi: Add 8x96 info in dsi_cfg")
Fixes: 6125bd327e16 ("drm/msm: add DSI suppor
On 11/02/2023 13:51, Konrad Dybcio wrote:
Now that msm_dsi_config is ready to accept multiple sets of registers
(where array[n][idx] holds the base registers of DSI(idx) for the nth
entry), loop through all available configs to resolve hw version
clashes.
Fixes: 32280d66fd44 ("drm/msm/dsi: Don't
On 11/02/2023 13:51, Konrad Dybcio wrote:
In preparation for supporting multiple sets of possible base registers,
Zero-terminate the array that contains them to remove the need of
specifying num_dsi for each set.
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/dsi/dsi_cfg.c | 39 +++
On 11/02/2023 13:51, Konrad Dybcio wrote:
Currently, we allow for MAX_DSI entries in io_start to facilitate for
MAX_DSI number of DSI hosts at different addresses. The configuration
is matched against the DSI CTRL hardware revision read back from the
component. We need a way to resolve situations
Hi,
On Sat, 11 Feb 2023 at 13:38, Krzysztof Kozlowski
wrote:
>
> On 10/02/2023 16:27, Neil Armstrong wrote:
> > On 10/02/2023 16:16, Dmitry Baryshkov wrote:
> >> On 10/02/2023 16:44, Neil Armstrong wrote:
> >>> The SM8450 & SM350 shares the same DT TX IP version, use the
> >>> SM8350 compatible a
Add basic SM6375 support to the DPU1 driver to enable display output.
Signed-off-by: Konrad Dybcio
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 120 ++
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h| 1 +
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 1 +
drivers/gpu
These blocks are of variable length on different SoCs. Set the
correct values where I was able to retrieve it from downstream
DTs and leave the old defaults (0x1c8 for sspp and 0x280 for
intf) otherwise.
Signed-off-by: Konrad Dybcio
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 242 +++
Add SM6350 support to the DPU1 driver to enable display output.
Signed-off-by: Konrad Dybcio
Signed-off-by: Konrad Dybcio
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 187 ++
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h| 3 +
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
Document SM6375 DPU and MDSS.
Signed-off-by: Konrad Dybcio
---
.../bindings/display/msm/qcom,sm6375-dpu.yaml | 106 +
.../display/msm/qcom,sm6375-mdss.yaml | 216 ++
2 files changed, 322 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/
Document 6350 DPU and MDSS.
Signed-off-by: Konrad Dybcio
---
.../bindings/display/msm/qcom,sm6350-dpu.yaml | 94
.../display/msm/qcom,sm6350-mdss.yaml | 213 ++
2 files changed, 307 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/msm
Add the DSI host found on SM6350.
Signed-off-by: Konrad Dybcio
---
.../devicetree/bindings/display/msm/dsi-controller-main.yaml| 2 ++
1 file changed, 2 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
b/Documentation/devicetree/bindings/di
Add the DSI host found on SM6375.
Signed-off-by: Konrad Dybcio
---
.../devicetree/bindings/display/msm/dsi-controller-main.yaml| 2 ++
1 file changed, 2 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
b/Documentation/devicetree/bindings/di
Add a compatible for the DSI on SM6115.
Signed-off-by: Konrad Dybcio
---
.../devicetree/bindings/display/msm/dsi-controller-main.yaml| 2 ++
1 file changed, 2 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
b/Documentation/devicetree/bindi
Now that the only user is handled by common code, remove the option to
specify custom handlers through match data.
This is effectively a revert of commit:
5ae15e76271 ("drm/msm/dsi: Allow to specify dsi config as pdata")
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/dsi/dsi.c | 4 ++
Now that the logic can handle multiple sets of registers, move
the QCM2290 to the common logic and mark it deprecated. This allows us
to remove a couple of structs, saving some memory.
Fixes: ee1f09678f14 ("drm/msm/dsi: Add support for qcm2290 dsi controller")
Signed-off-by: Konrad Dybcio
---
dr
The configs are identical, other than the number of *maximum* DSI
hosts allowed. This isn't an issue, unless somebody deliberately
tries to access the inexistent host by adding a dt node for it.
Remove the SC7180 struct and point the hw revision match to the
SDM845's one. On a note, this could hav
In preparation for supporting multiple sets of possible base registers,
Zero-terminate the array that contains them to remove the need of
specifying num_dsi for each set.
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/dsi/dsi_cfg.c | 39 ++
drivers/gpu/drm/msm/
Some structs were defined multiple times for no apparent reason.
Deduplicate them.
Fixes: 3f3c8aff1f8f ("drm/msm/dsi: Add configuration for 8x76")
Fixes: 3a3ff88a0fc1 ("drm/msm/dsi: Add 8x96 info in dsi_cfg")
Fixes: 6125bd327e16 ("drm/msm: add DSI support for sc7180")
Fixes: 65c391b31994 ("drm/msm
Now that msm_dsi_config is ready to accept multiple sets of registers
(where array[n][idx] holds the base registers of DSI(idx) for the nth
entry), loop through all available configs to resolve hw version
clashes.
Fixes: 32280d66fd44 ("drm/msm/dsi: Don't get DSI index from DT")
Signed-off-by: Konr
Currently, we allow for MAX_DSI entries in io_start to facilitate for
MAX_DSI number of DSI hosts at different addresses. The configuration
is matched against the DSI CTRL hardware revision read back from the
component. We need a way to resolve situations where multiple SoCs
with different register
The qcom, prefix was missed previously. Fix it.
Fixes: 0c0f65c6dd44 ("dt-bindings: msm: dsi-controller-main: Add compatible
strings for every current SoC")
Signed-off-by: Konrad Dybcio
---
.../devicetree/bindings/display/msm/dsi-controller-main.yaml| 2 +-
1 file changed, 1 insertion(+), 1
On 10/02/2023 16:27, Neil Armstrong wrote:
> On 10/02/2023 16:16, Dmitry Baryshkov wrote:
>> On 10/02/2023 16:44, Neil Armstrong wrote:
>>> The SM8450 & SM350 shares the same DT TX IP version, use the
>>> SM8350 compatible as fallback for SM8450.
>>>
>>> Reviewed-by: Krzysztof Kozlowski
>>> Signed
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