Re: [Freedreno] [PATCH v2 2/2] drm/msm/a690: Fix reg values for a690

On 25.11.2023 20:11, Rob Clark wrote: > From: Danylo Piliaiev > > KGSL doesn't support a690 so all reg values were the same as > on a660. Now we know the values and they are different from the > windows driver. > > This fixes hangs on D3D12 games and some CTS tests. > > Signed-off-by: Danylo Pi

Re: [Freedreno] [PATCH v2 1/2] drm/msm/a6xx: Add missing BIT(7) to REG_A6XX_UCHE_CLIENT_PF

On 25.11.2023 20:11, Rob Clark wrote: > From: Danylo Piliaiev > > Downstream always set BIT(7) > > Signed-off-by: Danylo Piliaiev > Signed-off-by: Rob Clark > --- FWIW this was only introduced in: https://git.codelinaro.org/clo/la/platform/vendor/qcom/opensource/graphics-kernel/-/commit/70457

[Freedreno] [PATCH v2 2/2] drm/msm/a690: Fix reg values for a690

From: Danylo Piliaiev KGSL doesn't support a690 so all reg values were the same as on a660. Now we know the values and they are different from the windows driver. This fixes hangs on D3D12 games and some CTS tests. Signed-off-by: Danylo Piliaiev Signed-off-by: Rob Clark --- drivers/gpu/drm/m

[Freedreno] [PATCH v2 1/2] drm/msm/a6xx: Add missing BIT(7) to REG_A6XX_UCHE_CLIENT_PF

From: Danylo Piliaiev Downstream always set BIT(7) Signed-off-by: Danylo Piliaiev Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu

[Freedreno] [PATCH 10/12] arm64: dts: qcom: qrb2210-rb1: Set up HDMI

Add the required nodes to support display output via the HDMI port. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/qrb2210-rb1.dts | 86 1 file changed, 86 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts b/arch/arm64/boot/dts/qcom

[Freedreno] [PATCH 12/12] arm64: dts: qcom: qrb2210-rb1: add wifi variant property

From: Dmitry Baryshkov The RB1 platform doesn't have board-specific board-id programmed, it uses generic 0xff. Thus add the property with the 'variant' of the calibration data. Note: the driver will check for the calibration data for the following IDs, so existing board-2.bin files will continue

[Freedreno] [PATCH 11/12] arm64: dts: qcom: qrb2210-rb1: Enable CAN bus controller

Enable the Microchip mcp2518fd hosted on the SPI5 bus. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/qrb2210-rb1.dts | 22 ++ 1 file changed, 22 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts index

[Freedreno] [PATCH 04/12] dt-bindings: display: msm: sm8450-mdss: Allow 3 interconnects

In addition to MDP01, the cpu-cfg interconnect is also necessary. Allow it. Signed-off-by: Konrad Dybcio --- Documentation/devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/

[Freedreno] [PATCH 09/12] arm64: dts: qcom: qcm2290: Hook up interconnects

Add interconnect provider nodes and hook up interconnects to consumer devices, including bwmon. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/qcm2290.dtsi | 248 ++ 1 file changed, 248 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qcm2290.dtsi

[Freedreno] [PATCH 02/12] dt-bindings: display: msm: Add reg bus and rotator interconnects

Apart from the already handled data bus (MAS_MDP_Pn<->DDR), there are other connection paths: - a path that connects rotator block to the DDR. - a path that needs to be handled to ensure MDSS register access functions properly, namely the "reg bus", a.k.a the CPU-MDSS CFG interconnect. Describ

[Freedreno] [PATCH 03/12] dt-bindings: display: msm: qcm2290-mdss: Allow 2 interconnects

In addition to MDP0, the cpu-cfg interconnect is also necessary. Allow it. Signed-off-by: Konrad Dybcio --- Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/

[Freedreno] [PATCH 06/12] dt-bindings: firmware: qcom, scm: Allow interconnect for everyone

Every Qualcomm SoC physically has a "CRYPTO0<->DDR" interconnect lane. Allow this property to be present, no matter the SoC. Signed-off-by: Konrad Dybcio --- Documentation/devicetree/bindings/firmware/qcom,scm.yaml | 15 --- 1 file changed, 15 deletions(-) diff --git a/Documentation

[Freedreno] [PATCH 05/12] dt-bindings: interconnect: qcom, msm8998-bwmon: Add QCM2290 bwmon instance

QCM2290 has a single BWMONv4 intance for CPU. Document it. Signed-off-by: Konrad Dybcio --- Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml b/Docume

[Freedreno] [PATCH 08/12] arm64: dts: qcom: qcm2290: Add display nodes

Add the required nodes to support display on QCM2290. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/qcm2290.dtsi | 214 ++ 1 file changed, 214 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qcm2290.dtsi b/arch/arm64/boot/dts/qcom/qcm2290.dtsi in

[Freedreno] [PATCH 07/12] iommu/arm-smmu-qcom: Add QCM2290 DPU compatible

Add the QCM2290 DPU compatible to clients compatible list, as it also needs the workarounds. Signed-off-by: Konrad Dybcio --- drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/ar

[Freedreno] [PATCH 01/12] dt-bindings: display: msm: qcm2290-mdss: Use the non-deprecated DSI compat

The "qcom,dsi-ctrl-6g-qcm2290" has been deprecated in commit 0c0f65c6dd44 ("dt-bindings: msm: dsi-controller-main: Add compatible strings for every current SoC"), but the example hasn't been updated to reflect that. Fix that. Fixes: 0c0f65c6dd44 ("dt-bindings: msm: dsi-controller-main: Add compat

[Freedreno] [PATCH 00/12] RB1/QCM2290 features

| 462 + arch/arm64/boot/dts/qcom/qrb2210-rb1.dts | 109 + drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 1 + 8 files changed, 594 insertions(+), 24 deletions(-) --- base-commit: 8c9660f6515396aba78d1168d2e17951d653ebf2 change-id: 20231125