On Mon, Feb 19, 2024 at 06:48:30PM +0100, Markus Elfring wrote:
> > The two device node references taken during allocation need to be
> > dropped when the auxiliary device is freed.
> …
> > +++ b/drivers/gpu/drm/bridge/aux-hpd-bridge.c
> …
> > @@ -74,6 +75,8 @@ struct device *drm_dp_hpd_bridge_regi
On Mon, 19 Feb 2024 at 23:37, Konrad Dybcio wrote:
>
> On 19.02.2024 15:49, Dmitry Baryshkov wrote:
> > On Mon, 19 Feb 2024 at 15:36, Konrad Dybcio
> > wrote:
> >>
> >> Enable the A702 GPU (also marketed as "3D accelerator by qcom [1], lol).
> >
> > Is it not?
>
> Sure, every electronic device i
On 19.02.2024 15:49, Dmitry Baryshkov wrote:
> On Mon, 19 Feb 2024 at 15:36, Konrad Dybcio wrote:
>>
>> Enable the A702 GPU (also marketed as "3D accelerator by qcom [1], lol).
>
> Is it not?
Sure, every electronic device is also a heater, I suppose.. I found
this wording extremely funny though
On 19/02/2024 17:25, Helen Koike wrote:
On 18/02/2024 01:12, Dmitry Baryshkov wrote:
The test kms_universal_plane@universal-plane-sanity fails on both SC7180
platforms. The drm/msm returns -ERANGE as it can not handle passet
scaling range, however the test is not ready to handle that. Mark
On 19/02/2024 17:26, Helen Koike wrote:
On 18/02/2024 01:12, Dmitry Baryshkov wrote:
Mark two tests as passing on the APQ8096 / db820c platform.
Signed-off-by: Dmitry Baryshkov
Acked-by: Helen Koike
Applied to drm-misc/drm-misc-next
Thanks
Helen
---
drivers/gpu/drm/ci/xfails/
On 19/02/2024 17:25, Helen Koike wrote:
On 19/02/2024 14:42, Dmitry Baryshkov wrote:
On Mon, 19 Feb 2024 at 18:48, Helen Koike
wrote:
On 19/02/2024 11:33, Dmitry Baryshkov wrote:
On Mon, 19 Feb 2024 at 15:21, Helen Koike
wrote:
Hi Dmitry,
On 18/02/2024 01:12, Dmitry Baryshkov wro
On 18/02/2024 01:12, Dmitry Baryshkov wrote:
Mark two tests as passing on the APQ8096 / db820c platform.
Signed-off-by: Dmitry Baryshkov
Acked-by: Helen Koike
---
drivers/gpu/drm/ci/xfails/msm-apq8096-fails.txt | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/ci/x
On 18/02/2024 01:12, Dmitry Baryshkov wrote:
The test kms_universal_plane@universal-plane-sanity fails on both SC7180
platforms. The drm/msm returns -ERANGE as it can not handle passet
scaling range, however the test is not ready to handle that. Mark the
test as failing until it is fixed.
ERR
On 19/02/2024 14:42, Dmitry Baryshkov wrote:
On Mon, 19 Feb 2024 at 18:48, Helen Koike wrote:
On 19/02/2024 11:33, Dmitry Baryshkov wrote:
On Mon, 19 Feb 2024 at 15:21, Helen Koike wrote:
Hi Dmitry,
On 18/02/2024 01:12, Dmitry Baryshkov wrote:
Since the addition of testlist.txt the
Hi DRM maintainers
Gentle ping for reviews on this one.
Since the dependent series is mostly complete, would like to get your
reviews on this one to land it.
Thanks
Abhinav
On 2/15/2024 11:15 AM, Abhinav Kumar wrote:
From: Paloma Arellano
YUV420 format is supported only in the VSC SDP pa
On Mon, 19 Feb 2024 at 18:48, Helen Koike wrote:
>
>
>
> On 19/02/2024 11:33, Dmitry Baryshkov wrote:
> > On Mon, 19 Feb 2024 at 15:21, Helen Koike wrote:
> >>
> >> Hi Dmitry,
> >>
> >>
> >> On 18/02/2024 01:12, Dmitry Baryshkov wrote:
> >>> Since the addition of testlist.txt the IGT has changed
On 19/02/2024 11:47, Vignesh Raman wrote:
On 17/02/24 02:26, Dmitry Baryshkov wrote:
The commit ea489a3d983b ("drm/ci: add sc7180-trogdor-kingoftown")
dropped the msm-sc7180-skips.txt file, which disabled suspend-to-RAM
tests. However testing shows that STR tests still can fail. Restore the
On 19/02/2024 11:33, Dmitry Baryshkov wrote:
On Mon, 19 Feb 2024 at 15:21, Helen Koike wrote:
Hi Dmitry,
On 18/02/2024 01:12, Dmitry Baryshkov wrote:
Since the addition of testlist.txt the IGT has changed some of test
names. Some test names were changed to use '-' instead of '_'. In othe
On Mon, 19 Feb 2024 at 17:01, Konrad Dybcio wrote:
>
> On 19.02.2024 15:54, Andrew Halaney wrote:
> > On Mon, Feb 19, 2024 at 02:35:48PM +0100, Konrad Dybcio wrote:
> >> Commit 134b55b7e19f ("clk: qcom: support Huayra type Alpha PLL")
> >> introduced an entry to the alpha offsets array, but diving
On 19.02.2024 15:53, Dmitry Baryshkov wrote:
> On Mon, 19 Feb 2024 at 15:36, Konrad Dybcio wrote:
>>
>> Commit 134b55b7e19f ("clk: qcom: support Huayra type Alpha PLL")
>> introduced an entry to the alpha offsets array, but diving into QCM2290
>> downstream and some documentation, it turned out th
On 19.02.2024 15:54, Andrew Halaney wrote:
> On Mon, Feb 19, 2024 at 02:35:48PM +0100, Konrad Dybcio wrote:
>> Commit 134b55b7e19f ("clk: qcom: support Huayra type Alpha PLL")
>> introduced an entry to the alpha offsets array, but diving into QCM2290
>> downstream and some documentation, it turned
On Mon, 19 Feb 2024 at 15:36, Konrad Dybcio wrote:
>
> Describe the GPU hardware on the QCM2290.
>
> Signed-off-by: Konrad Dybcio
> ---
> arch/arm64/boot/dts/qcom/qcm2290.dtsi | 154
> ++
> 1 file changed, 154 insertions(+)
>
Reviewed-by: Dmitry Baryshkov
--
On Mon, 19 Feb 2024 at 15:36, Konrad Dybcio wrote:
>
> Add a driver for the GPU clock controller block found on the QCM2290 SoC.
>
> Signed-off-by: Konrad Dybcio
> ---
> drivers/clk/qcom/Kconfig | 9 +
> drivers/clk/qcom/Makefile| 1 +
> drivers/clk/qcom/gpucc-qcm2290.c | 423
On Mon, 19 Feb 2024 at 15:36, Konrad Dybcio wrote:
>
> Commit 134b55b7e19f ("clk: qcom: support Huayra type Alpha PLL")
> introduced an entry to the alpha offsets array, but diving into QCM2290
> downstream and some documentation, it turned out that the name Huayra
> apparently has been used quite
On Mon, 19 Feb 2024 at 15:36, Konrad Dybcio wrote:
>
> Enable the A702 GPU (also marketed as "3D accelerator by qcom [1], lol).
Is it not?
>
> [1]
> https://docs.qualcomm.com/bundle/publicresource/87-61720-1_REV_A_QUALCOMM_ROBOTICS_RB1_PLATFORM__QUALCOMM_QRB2210__PRODUCT_BRIEF.pdf
> Signed-off-
On 17/02/24 02:26, Dmitry Baryshkov wrote:
The commit ea489a3d983b ("drm/ci: add sc7180-trogdor-kingoftown")
dropped the msm-sc7180-skips.txt file, which disabled suspend-to-RAM
tests. However testing shows that STR tests still can fail. Restore the
skiplist, applying it to both limozeen and ki
On Mon, 19 Feb 2024 at 15:21, Helen Koike wrote:
>
> Hi Dmitry,
>
>
> On 18/02/2024 01:12, Dmitry Baryshkov wrote:
> > Since the addition of testlist.txt the IGT has changed some of test
> > names. Some test names were changed to use '-' instead of '_'. In other
> > cases tests were just renamed.
@599: failed to match any schema with
compatible: ['qcom,qcm2290-gpucc']
doc reference errors (make refcheckdocs):
See
https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20240219-topic-rb1_gpu-v1-2-d260fa854...@linaro.org
The base for the series is generally the latest
id,
enum dpu_hw_blk_type type, struct dpu_hw_blk **blks, int blks_size);
+/**
+ * dpu_rm_print_state - output the RM private state
+ * @p: DRM printer
+ * @global_state: global state
+ */
+void dpu_rm_print_state(struct drm_printer *p,
+ const struct dpu_global_state *global_state);
+
/**
* dpu_rm_get_intf - Return a struct dpu_hw_intf instance given it's index.
* @rm: DPU Resource Manager handle
---
base-commit: 41c177cf354126a22443b5c80cec9fdd313e67e1
change-id: 20240219-fd-rm-state-bd1218954b78
Best regards,
--
Dmitry Baryshkov
On Mon, Feb 19, 2024 at 11:41:41AM +0100, Johan Hovold wrote:
> It seems my initial suspicion that at least some of these regressions
> were related to the runtime PM work was correct. The hard resets happens
> when the DP controller is runtime suspended after being probed:
> [ 17.074925] bus:
Enable the A702 GPU (also marketed as "3D accelerator by qcom [1], lol).
[1]
https://docs.qualcomm.com/bundle/publicresource/87-61720-1_REV_A_QUALCOMM_ROBOTICS_RB1_PLATFORM__QUALCOMM_QRB2210__PRODUCT_BRIEF.pdf
Signed-off-by: Konrad Dybcio
---
arch/arm64/boot/dts/qcom/qrb2210-rb1.dts | 8 +++
Add some defines required for A702. Can be substituted with a header
sync after merging mesa!27665 [1].
[1] https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27665
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a6xx.xml.h | 18 ++
1 file changed, 18 insertion
Describe the GPU hardware on the QCM2290.
Signed-off-by: Konrad Dybcio
---
arch/arm64/boot/dts/qcom/qcm2290.dtsi | 154 ++
1 file changed, 154 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcm2290.dtsi
b/arch/arm64/boot/dts/qcom/qcm2290.dtsi
index 89beac83
The A702 is a weird mix of 600 and 700 series.. Perhaps even a
testing ground for some A7xx features with good ol' A6xx silicon.
It's basically A610 that's been beefed up with some new registers
and hw features (like APRIV!), that was then cut back in size,
memory bus and some other ways.
Add supp
Commit 134b55b7e19f ("clk: qcom: support Huayra type Alpha PLL")
introduced an entry to the alpha offsets array, but diving into QCM2290
downstream and some documentation, it turned out that the name Huayra
apparently has been used quite liberally across many chips, even with
noticeably different h
Add a driver for the GPU clock controller block found on the QCM2290 SoC.
Signed-off-by: Konrad Dybcio
---
drivers/clk/qcom/Kconfig | 9 +
drivers/clk/qcom/Makefile| 1 +
drivers/clk/qcom/gpucc-qcm2290.c | 423 +++
3 files changed, 433 inse
The GPU SMMU on QCM2290 nicely fits into the description we already have
for SM61[12]5. Add it.
Signed-off-by: Konrad Dybcio
---
Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/iommu/arm
Add device tree bindings for graphics clock controller for Qualcomm
Technology Inc's QCM2290 SoCs.
Signed-off-by: Konrad Dybcio
---
.../bindings/clock/qcom,qcm2290-gpucc.yaml | 76 ++
include/dt-bindings/clock/qcom,qcm2290-gpucc.h | 32 +
2 files changed,
u/drm/msm/adreno/adreno_device.c | 18 +
drivers/gpu/drm/msm/adreno/adreno_gpu.h| 16 +-
include/dt-bindings/clock/qcom,qcm2290-gpucc.h | 32 ++
14 files changed, 888 insertions(+), 10 deletions(-)
---
base-commit: 26d7d52b6253574d5b6fec16a93e1110d1489cef
change-id: 20240219-
Hi Dmitry,
On 18/02/2024 01:12, Dmitry Baryshkov wrote:
Since the addition of testlist.txt the IGT has changed some of test
names. Some test names were changed to use '-' instead of '_'. In other
cases tests were just renamed. Follow those changes.
Signed-off-by: Dmitry Baryshkov
Thanks for
On Fri, 02 Feb 2024 16:23:37 -0600, Rob Herring wrote:
> In order to check schemas for missing additionalProperties or
> unevaluatedProperties, cases allowing extra properties must be explicit.
>
>
Applied, thanks!
[1/1] dt-bindings: display: msm: sm8650-mdss: Add missing explicit
"additiona
On Thu, 11 Jan 2024 09:14:15 -0800, Kuogee Hsieh wrote:
> mdss_dp_test_bit_depth_to_bpc() can be replace by
> mdss_dp_test_bit_depth_to_bpp() / 3. Hence remove it.
>
>
Applied, thanks!
[1/1] drm/msm/dp: remove mdss_dp_test_bit_depth_to_bpc()
https://gitlab.freedesktop.org/lumag/msm/-/co
On Sun, 04 Feb 2024 18:04:39 +0100, Marijn Suijten wrote:
> drm_mipi_dsi.h already provides a conversion function from MIPI_DSI_FMT_
> to bpp, named mipi_dsi_pixel_format_to_bpp().
>
>
Applied, thanks!
[1/1] drm/msm/dsi: Replace dsi_get_bpp() with mipi_dsi header function
https://gitlab
On Thu, 14 Dec 2023 10:56:12 -0800, Kuogee Hsieh wrote:
> At DSC V1.1 DCE (Display Compression Engine) contains a DSC encoder.
> However, at DSC V1.2 DCE consists of two DSC encoders, one has an odd
> index and another one has an even index. Each encoder can work
> independently. But only two DSC
On Wed, 31 Jan 2024 16:47:36 -0800, Abhinav Kumar wrote:
> Currently INTF_CFG2_DATA_HCTL_EN is coupled with the enablement
> of widebus but this is incorrect because we should be enabling
> this bit independent of widebus except for cases where compression
> is enabled in one pixel per clock mode
On Thu, 08 Feb 2024 17:23:08 +0200, Dmitry Baryshkov wrote:
> Provide actual documentation for the pclk and hdisplay calculations in
> the case of DSC compression being used.
>
>
Applied, thanks!
[1/1] drm/msm/dsi: Document DSC related pclk_rate and hdisplay calculations
https://gitlab.
On Thu, 08 Feb 2024 17:01:07 +0200, Dmitry Baryshkov wrote:
> Over the last several years the DPU driver has been actively developed,
> while the MDP5 is mostly in the maintenance mode. This results in some
> features being available only in the DPU driver. For example, bandwidth
> scaling, write
On Sun, 04 Feb 2024 18:45:27 +0100, Marijn Suijten wrote:
> When the topology calls for two interfaces on the current fixed topology
> of 2 DSC blocks, or uses 1 DSC block for a single interface (e.g. SC7280
> with only one DSC block), there should be no merging of DSC output.
>
> This is alread
On Thu, 08 Feb 2024 17:20:40 +0200, Dmitry Baryshkov wrote:
> The dpu_encoder_phys_ops::atomic_mode_set() callback is mostly
> redundant. Implementations only set the IRQ indices there. Move
> statically allocated IRQs to dpu_encoder_phys_*_init() and set
> dynamically allocated IRQs in the irq_e
On Fri, 26 Jan 2024 20:26:19 +0200, Dmitry Baryshkov wrote:
> Reshuffle code in the DP driver, cleaning up clocks and DT parsing and
> dropping the dp_power and dp_parser submodules.
>
> Initially I started by looking onto stream_pixel clock handling only to
> find several wrapping layers around
On Mon, 12 Feb 2024 09:16:39 +, Colin Ian King wrote:
> There is a spelling mistake in a drm_dbg_dp message. Fix it.
>
>
Applied, thanks!
[1/1] drm/msm/dp: Fix spelling mistake "enale" -> "enable"
https://gitlab.freedesktop.org/lumag/msm/-/commit/fb750eefc492
Best regards,
--
Dmit
On Sun, 03 Dec 2023 03:05:27 +0300, Dmitry Baryshkov wrote:
> Note: I'm resending this patch series as I haven't got any feedback from
> the drm core maintainers to the first patch.
>
> While debugging one of the features in DRM/MSM I noticed that MSM
> subdrivers still wrap private object acces
On Mon, 09 Oct 2023 23:57:22 +0300, Dmitry Baryshkov wrote:
> As a followup to [1], as suggested by Abhinav drop unused fields from
> struct msm_dsi.
>
> [1] https://patchwork.freedesktop.org/series/120125/
>
> Dmitry Baryshkov (5):
> drm/msm/dsi: do not store internal bridge pointer
> drm/
On Sun, 21 Jan 2024 20:40:58 +0100, Adam Skladowski wrote:
> This patch series provide support for display subsystem, gpu
> and also adds wireless connectivity subsystem support.
>
> Adam Skladowski (8):
> arm64: dts: qcom: msm8976: Add IOMMU nodes
> dt-bindings: dsi-controller-main: Documen
On Wed, 14 Feb 2024 at 22:36, Abhinav Kumar wrote:
>
>
>
> On 2/14/2024 11:20 AM, Dmitry Baryshkov wrote:
> > On Wed, 14 Feb 2024 at 20:02, Abhinav Kumar
> > wrote:
> >>
> >>
> >>
> >> On 2/8/2024 6:50 AM, Dmitry Baryshkov wrote:
> >>> We have several reports of vblank timeout messages. However
On Fri, 9 Feb 2024 at 20:58, Dmitry Baryshkov
wrote:
>
> On Fri, 9 Feb 2024 at 20:44, Abhinav Kumar wrote:
> >
> >
> >
> > On 2/8/2024 7:01 AM, Dmitry Baryshkov wrote:
> > > Existing MDP5 devices have slightly different bindings. The main
> > > register region is called `mdp_phys' instead of `mdp
On 24-02-18 15:06:45, Dmitry Baryshkov wrote:
> On Sat, 17 Feb 2024 at 13:39, Abel Vesa wrote:
> >
> > On 24-02-16 12:32:02, Rob Herring wrote:
> > >
> > > On Fri, 16 Feb 2024 19:01:06 +0200, Abel Vesa wrote:
> > > > Document the MDSS hardware found on the Qualcomm X1E80100 platform.
> > > >
> > >
On 18.02.2024 20:50, Danila Tikhonov wrote:
> SM7150 has 5 power levels which correspond to 5 speed-bin values: 0,
> 128, 146, 167, 172. Speed-bin value is calulated as FMAX/4.8MHz round up
> to zero decimal places.
>
> Also a618 on SM7150 uses a615 zapfw. Add a squashed version (.mbn).
>
> Add t
On Sat, Feb 17, 2024 at 04:14:58PM +0100, Johan Hovold wrote:
> On Wed, Feb 14, 2024 at 02:52:06PM +0100, Johan Hovold wrote:
> > On Tue, Feb 13, 2024 at 10:00:13AM -0800, Abhinav Kumar wrote:
> Since Dmitry had trouble reproducing this issue I took a closer look at
> the DRM aux bridge series tha
On 17/02/2024 16:02, Johan Hovold wrote:
Due to a long-standing issue in driver core, drivers may not probe defer
after having registered child devices to avoid triggering a probe
deferral loop (see fbc35b45f9f6 ("Add documentation on meaning of
-EPROBE_DEFER")).
This could potentially also trig
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