On 27/05/2024 14:11, Dmitry Baryshkov wrote:
On Thu, 23 May 2024 at 18:14, Marc Gonzalez wrote:
From: Arnaud Vrac
Ported from the downstream driver.
Signed-off-by: Arnaud Vrac
Signed-off-by: Marc Gonzalez
---
drivers/gpu/drm/msm/Makefile | 1 +
drivers/gpu/drm/msm/hdmi
Le sam. 20 mai 2023 à 22:49, Dmitry Baryshkov
a écrit :
>
> On 20/04/2023 20:47, Jeykumar Sankaran wrote:
> >
> >
> > On 4/19/2023 3:23 PM, Dmitry Baryshkov wrote:
> >> On 19/04/2023 17:41, Arnaud Vrac wrote:
> >>> This avoids using two LMs i
mm did later
on.
> On 4/18/23 20:10, Arnaud Vrac wrote:
> > Some Qualcomm SoCs that support HDMI also support CEC, including MSM8996
> > and MSM8998. The hardware block can handle a single CEC logical address
> > and broadcast messages.
> >
> > Port the CEC driver from
Le jeu. 20 avr. 2023 à 00:43, Dmitry Baryshkov
a écrit :
>
> On 19/04/2023 17:41, Arnaud Vrac wrote:
> > The dpu backend already handles applying alpha to the base stage, so we
> > can use it to render the bottom plane in all cases. This allows mixing
> > one additional
Le jeu. 20 avr. 2023 à 02:20, Dmitry Baryshkov
a écrit :
>
> On 18/04/2023 21:10, Arnaud Vrac wrote:
> > Some Qualcomm SoCs that support HDMI also support CEC, including MSM8996
> > and MSM8998. The hardware block can handle a single CEC logical address
> > and broadcas
Le jeu. 20 avr. 2023 à 01:18, Dmitry Baryshkov
a écrit :
>
> On 19/04/2023 17:41, Arnaud Vrac wrote:
> > This avoids using lm blocks that support DSPP when not needed, to
> > keep those resources available.
>
> This will break some of the platforms. Consider qcm2290
Le jeu. 20 avr. 2023 à 01:10, Dmitry Baryshkov
a écrit :
>
> On 19/04/2023 17:41, Arnaud Vrac wrote:
> > Now that cursor sspp blocks can be used for cursor planes, enable them
> > on msm8998. The dma sspp blocks that were assigned to cursor planes can
> > now be used fo
On 4/19/2023 5:11 PM, Dmitry Baryshkov wrote:
> >>>> On 20/04/2023 03:10, Abhinav Kumar wrote:
> >>>>>
> >>>>>
> >>>>> On 4/19/2023 4:53 PM, Dmitry Baryshkov wrote:
> >>>>>> On 18/04/2023 21:10, Arnaud Vrac
This avoids using lm blocks that support DSPP when not needed, to
keep those resources available.
Signed-off-by: Arnaud Vrac
---
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
b/drivers/gpu/drm
the
reservation code could never find an lm pair without a matching feature
set.
Signed-off-by: Arnaud Vrac
---
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h
b
Cursor SSPP must be assigned to the last mixer stage, so we assign an
immutable zpos property with a value higher than primary/overlay planes,
to ensure it will always be on top.
Signed-off-by: Arnaud Vrac
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 19 ++-
drivers/gpu/drm
The dpu backend already handles applying alpha to the base stage, so we
can use it to render the bottom plane in all cases. This allows mixing
one additional plane with the hardware mixer.
Signed-off-by: Arnaud Vrac
---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 2 +-
1 file changed, 1
on the vertical resolution, instead of using the actual
mode polarities.
Signed-off-by: Arnaud Vrac
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 16 +++-
1 file changed, 3 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
b/drivers/gpu/drm/msm
Override the default max cursor size reported to userspace of 64x64.
MSM8998 hw cursor planes support 512x512 size, and other chips use DMA
SSPPs.
Signed-off-by: Arnaud Vrac
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/msm
This matches the value for both fbdev and sde implementations in the
downstream msm-4.4 repository.
Signed-off-by: Arnaud Vrac
---
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1
The max_mixer_blendstages hw catalog property represents the number of
planes that can be blended by the lm mixer, excluding the base stage, so
adjust the check for the number of currently assigned planes accordingly.
Signed-off-by: Arnaud Vrac
---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 6
Match the values found in the downstream msm-4.4 kernel sde driver.
Signed-off-by: Arnaud Vrac
---
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h | 8
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 15 +--
2 files changed, 9 insertions(+), 14 deletions
Now that cursor sspp blocks can be used for cursor planes, enable them
on msm8998. The dma sspp blocks that were assigned to cursor planes can
now be used for overlay planes instead.
Signed-off-by: Arnaud Vrac
---
.../drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h| 8 +++--
drivers/gpu/drm
This avoids using two LMs instead of one when the display width is lower
than the maximum supported value. For example on MSM8996/MSM8998, the
actual maxwidth is 2560, so we would use two LMs for 1280x720 or
1920x1080 resolutions, while one is enough.
Signed-off-by: Arnaud Vrac
---
drivers/gpu
\
-P 45@87:200x200+200+500@AR24 \
-P 51@87:200x200+300+400@AR24 \
-P 57@87:200x200+400+300@AR24 \
-P 63@87:200x200+500+200@AR24 \
-P 69@87:200x200+600+100@AR24 \
-P 81@87:200x200+700+000@AR24
Signed-off-by: Arnaud Vrac
---
Arnaud Vrac (11):
drm/msm/dpu: tweak msm8998 hw
The register names and bitfields were determined from the downstream
msm-4.4 driver.
Signed-off-by: Arnaud Vrac
---
drivers/gpu/drm/msm/hdmi/hdmi.xml.h | 62 -
1 file changed, 61 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/hdmi/hdmi.xml.h
.
Signed-off-by: Arnaud Vrac
---
drivers/gpu/drm/msm/Kconfig | 8 ++
drivers/gpu/drm/msm/Makefile| 1 +
drivers/gpu/drm/msm/hdmi/hdmi.c | 15 ++
drivers/gpu/drm/msm/hdmi/hdmi.h | 18 +++
drivers/gpu/drm/msm/hdmi/hdmi_cec.c | 280
5
When edid has been read after hpd, pass it to the cec adapter so that it
can extract the physical address of the device on the cec bus.
Invalidate the physical address when hpd is low.
Signed-off-by: Arnaud Vrac
---
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c | 2 ++
drivers/gpu/drm/msm/hdmi
HDMI is not enabled yet on msm8998 so the pinctrl nodes are not
used.
Signed-off-by: Arnaud Vrac
---
arch/arm64/boot/dts/qcom/msm8998.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi
b/arch/arm64/boot/dts/qcom/msm8998.dtsi
index
HDMI support is not yet included upstream for MSM8998, I would
appreciate if someone can verify this driver at least works on MSM8996,
for which adding the pinctrl nodes for CEC should be sufficient.
Signed-off-by: Arnaud Vrac
---
Arnaud Vrac (4):
drm/msm: add some cec register bitfield
drm_encoder_cleanup(encoder);
+ return rc;
+ }
+
+ info.num_of_h_tiles = 1;
+ info.h_tile_instance[0] = i;
i is uninitialized here, the line can be removed.
With the above changes:
Reviewed-by: Arnaud Vrac
Tested-by: Arnaud Vrac # on msm8998
-Arnau
code can not make a difference
between HDMI and DP outputs.
Reviewed-by: Bjorn Andersson
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Arnaud Vrac
Tested-by: Arnaud Vrac
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 39 +++--
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h | 4
Hi Dmitry,
Le dim. 16 mai 2021 à 00:58, Dmitry Baryshkov
a écrit :
>
> No code uses lm_max_width from resource manager, so drop it.
I have a pending patch which uses this value to properly determine the
number of LMs to use in the topology. Currently the code uses a
hardcoded value of
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