On Mon, Sep 28, 2020 at 05:56:55PM +0530, Sai Prakash Ranjan wrote:
> Hi Jordan,
>
> On 2020-09-23 20:33, Jordan Crouse wrote:
> >On Tue, Sep 22, 2020 at 11:48:17AM +0530, Sai Prakash Ranjan wrote:
> >>From: Sharat Masetty
> >>
> >>The last level syste
On Sat, Sep 26, 2020 at 02:51:44PM +0200, khol...@gmail.com wrote:
> From: Konrad Dybcio
>
> The upstream API for some reason uses logbase2 instead of
> just passing the argument as-is, whereas downstream CAF
> kernel does the latter.
>
> Hence, a mistake has been made when porting:
> 4 is the v
o the PC_DBG_ECO_CNTL
> register in order to retain the wanted configuration for the
> target GPU.
This was probably inherited from downstream which doesn't mind RMWing the same
register multiple times.
Reviewed-by: Jordan Crouse
> Signed-off-by: AngeloGioacchino Del Regno
>
TL
> register programming because this has logical similarity
> differences from all the others.
>
> A later commit will show the entire sense of this.
With that
Reviewed-by: Jordan Crouse
> Signed-off-by: AngeloGioacchino Del Regno
> ---
> drivers/gpu/drm/msm/adreno
ovided with ZAP firmwares,
> but they have no available GPMU.
Reviewed-by: Jordan Crouse
> Signed-off-by: AngeloGioacchino Del Regno
> ---
> drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 172 ++---
> drivers/gpu/drm/msm/adreno/a5xx_power.c| 4 +-
> drivers/g
ng on at least Adreno 508/509/512.
Reviewed-by: Jordan Crouse
> Signed-off-by: AngeloGioacchino Del Regno
> ---
> drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 8 +---
> 1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
On Wed, Sep 30, 2020 at 08:27:05PM -0400, Jonathan Marek wrote:
> This makes it possible to use the non-coherent cached MSM_BO_CACHED mode,
> which otherwise doesn't provide any method for cleaning/invalidating the
> cache to sync with the device.
>
> Signed-off-by: Jonathan Marek
> ---
> driver
On Wed, Sep 30, 2020 at 08:27:04PM -0400, Jonathan Marek wrote:
> Add a new cache mode for creating coherent host-cached BOs.
Reviewed-by: Jordan Crouse
> Signed-off-by: Jonathan Marek
> ---
> drivers/gpu/drm/msm/adreno/adreno_device.c | 1 +
> drivers/gpu/drm/msm/msm_drv.h
On Sun, Oct 04, 2020 at 12:21:34PM -0700, Rob Clark wrote:
> From: Rob Clark
>
> It is somewhat redundant with the gpu tracepoints, and anyways not too
> useful to justify spamming the log when debug traces are enabled.
Reviewed-by: Jordan Crouse
> Signed-off-by: Rob Clark
&
On Sun, Oct 04, 2020 at 12:21:35PM -0700, Rob Clark wrote:
> From: Rob Clark
>
> Small cleanup, update_fences() is used in the hangcheck path, but also
> in the normal retire path.
Reviewed-by: Jordan Crouse
> Signed-off-by: Rob Clark
> ---
> drivers/gpu/d
On Sun, Oct 04, 2020 at 12:21:36PM -0700, Rob Clark wrote:
> From: Rob Clark
>
> Rather than relying on the big dev->struct_mutex hammer, introduce a
> more specific lock for protecting the bo lists.
Most excellent.
Reviewed-by: Jordan Crouse
> Signed-off-by: Rob Clark
&g
On Sun, Oct 04, 2020 at 12:21:37PM -0700, Rob Clark wrote:
> From: Rob Clark
>
> Before adding another lock, give ring->lock a more descriptive name.
Reviewed-by: Jordan Crouse
> Signed-off-by: Rob Clark
> ---
> drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 4 ++--
&
On Sun, Oct 04, 2020 at 12:21:38PM -0700, Rob Clark wrote:
> From: Rob Clark
>
> One less place to rely on dev->struct_mutex.
>
Reviewed-by: Jordan Crouse
> Signed-off-by: Rob Clark
> ---
> drivers/gpu/drm/msm/msm_gem_submit.c | 2 ++
> drivers/gpu/dr
e completed fence is corrupted, and retire_worker mistakenly
> believes the submit is done too early.
Reviewed-by: Jordan Crouse
> Signed-off-by: Rob Clark
> ---
> drivers/gpu/drm/msm/msm_drv.h| 1 -
> drivers/gpu/drm/msm/msm_gem.h| 13 +
> drivers/gp
coming submits via
> struct_mutex)
Somebody will prove me wrong but the longer we go without 2D the less likely it
is that we'll ever see it.
Reviewed-by: Jordan Crouse
> Signed-off-by: Rob Clark
> ---
> drivers/gpu/drm/msm/msm_gem.c | 2 --
> drivers/gpu/drm/msm/msm_gem.h | 1
On Sun, Oct 04, 2020 at 12:21:41PM -0700, Rob Clark wrote:
> From: Rob Clark
>
> Now that we are not relying on dev->struct_mutex to protect the
> ring->submits lists, drop the struct_mutex lock.
Reviewed-by: Jordan Crouse
> Signed-off-by: Rob Clark
> ---
> dr
On Mon, Oct 19, 2020 at 02:04:22PM +0800, Tian Tao wrote:
> clk_prepare_enable() and clk_disable_unprepare() will check
> NULL clock parameter, so It is not necessary to add additional checks.
Reviewed-by: Jordan Crouse
> Signed-off-by: Tian Tao
> ---
> drivers/gpu/drm/ms
On Mon, Oct 19, 2020 at 06:49:18PM +0530, Akhil P Oommen wrote:
> On targets with a6xx gpu, there is a duplicate gpu icc node listed in
> the interconnect summary. On these targets, calling
This first sentence is confusing to me. I think the following few sentences do
a better job of explaining wh
this new function.
>
> Signed-off-by: Sharat Masetty
> Reviewed-by: Jordan Crouse
> Signed-off-by: Sai Prakash Ranjan
Rob - this should be safe to pull with msm-next regardless of the merge status
of the iommu side of things. Hopefully everything will be pulled for 5.11 but if
it isn&
On Mon, Oct 26, 2020 at 05:24:03PM +0530, Sai Prakash Ranjan wrote:
> From: Sharat Masetty
>
> The last level system cache can be partitioned to 32 different
> slices of which GPU has two slices preallocated. One slice is
> used for caching GPU buffers and the other slice is used for
> caching th
programming sequence
accordingly.
[1] https://patchwork.freedesktop.org/series/83037/
Signed-off-by: Jordan Crouse
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 46 +--
drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 1 +
2 files changed, 37 insertions(+), 10 deletions(-)
diff --git a
On Tue, Oct 27, 2020 at 12:38:02PM +0530, Sai Prakash Ranjan wrote:
> On 2020-10-27 00:24, Jordan Crouse wrote:
> >This is an extension to the series [1] to enable the System Cache (LLC)
> >for
> >Adreno a6xx targets.
> >
> >GPU targets with an MMU-500 attached
;
> Fixes: 8907afb476ac ("drm/msm: Allow a5xx to mark the RPTR shadow as
> privileged")
> Signed-off-by: Marijn Suijten
> Tested-by: AngeloGioacchino Del Regno
>
Way better. Thanks for doing this.
Reviewed-by: Jordan Crouse
> ---
> drivers/gpu/drm/msm/adreno
later for even more
extensive GPU side page fault debugging capabilities.
Jordan Crouse (3):
iommu/arm-smmu: Add support for driver IOMMU fault handlers
drm/msm: Add an adreno-smmu-priv callback to get pagefault info
drm/msm: Improve the a6xx page fault handler
drivers/gpu/drm/msm/adreno
Use the new adreno-smmu-priv fault info function to get more SMMU
debug registers and print the current TTBR0 to debug per-instance
pagetables and figure out which GPU block generated the request.
Signed-off-by: Jordan Crouse
---
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 4 +-
drivers/gpu/drm
*ERROR* timeout waiting for space in
> ringbuffer 0
>
> in the resume path.
>
> Fixes: d3a569fccfa0 ("drm/msm: a6xx: Use WHERE_AM_I for eligible targets")
> Signed-off-by: Rob Clark
Reviewed-by: Jordan Crouse
> ---
> drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 11 ++
ged")
> Signed-off-by: Rob Clark
Reviewed-by: Jordan Crouse
> ---
> drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 12 +++-
> 1 file changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
> b/drivers/gpu/drm/msm/adreno/
On Thu, Nov 12, 2020 at 09:19:04PM +0530, Akhil P Oommen wrote:
> So far a530v2 gpu has support for detecting its supported opps
> based on a fuse value called speed-bin. This patch makes this
> support generic across gpu families. This is in preparation to
> extend speed-bin support to a6x family.
; Cc: David Airlie
> Cc: Daniel Vetter
> Cc: linux-arm-...@vger.kernel.org
> Cc: dri-de...@lists.freedesktop.org
> Cc: freedreno@lists.freedesktop.org
> Signed-off-by: Lee Jones
Reviewed-by: Jordan Crouse
> ---
> drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 +-
> 1 file change
On Mon, Nov 16, 2020 at 07:40:03PM +0530, Akhil P Oommen wrote:
> On 11/12/2020 10:05 PM, Jordan Crouse wrote:
> >On Thu, Nov 12, 2020 at 09:19:04PM +0530, Akhil P Oommen wrote:
> >>So far a530v2 gpu has support for detecting its supported opps
> >>based on a fuse v
On Sat, Nov 14, 2020 at 11:30:10AM -0800, Rob Clark wrote:
> From: Rob Clark
>
> In situations where the GPU is mostly idle, all or nearly all buffer
> objects will be in the inactive list. But if the system is under memory
> pressure (from something other than GPU), we could still get a lot of
On Sat, Nov 14, 2020 at 10:17:12AM -0500, Jonathan Marek wrote:
> This makes it possible to use the non-coherent cached MSM_BO_CACHED mode,
> which otherwise doesn't provide any method for cleaning/invalidating the
> cache to sync with the device.
>
> Signed-off-by: Jonathan Marek
> ---
> driver
On Sat, Nov 14, 2020 at 11:39:45AM -0800, Rob Clark wrote:
> On Sat, Nov 14, 2020 at 10:58 AM Jonathan Marek wrote:
> >
> > On 11/14/20 1:46 PM, Rob Clark wrote:
> > > On Sat, Nov 14, 2020 at 8:24 AM Christoph Hellwig wrote:
> > >>
> > >> On Sat, Nov 14, 2020 at 10:17:12AM -0500, Jonathan Marek w
later for even more
extensive GPU side page fault debugging capabilities.
v2: Fix comment wording and function pointer check per Rob Clark
Jordan Crouse (3):
iommu/arm-smmu: Add support for driver IOMMU fault handlers
drm/msm: Add an adreno-smmu-priv callback to get pagefault info
drm/msm
Use the new adreno-smmu-priv fault info function to get more SMMU
debug registers and print the current TTBR0 to debug per-instance
pagetables and figure out which GPU block generated the request.
Signed-off-by: Jordan Crouse
---
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 4 +-
drivers/gpu/drm
On Fri, Nov 27, 2020 at 06:19:44PM +0530, Akhil P Oommen wrote:
> So far a530v2 gpu has support for detecting its supported opps
> based on a fuse value called speed-bin. This patch makes this
> support generic across gpu families. This is in preparation to
> extend speed-bin support to a6x family.
On Wed, Dec 02, 2020 at 08:53:51PM +0530, Akhil P Oommen wrote:
> On 11/30/2020 10:32 PM, Jordan Crouse wrote:
> >On Fri, Nov 27, 2020 at 06:19:44PM +0530, Akhil P Oommen wrote:
> >>So far a530v2 gpu has support for detecting its supported opps
> >>based on a fuse v
On Mon, Dec 07, 2020 at 04:12:07PM +0530, Akhil P Oommen wrote:
> Some GPUs support different max frequencies depending on the platform.
> To identify the correct variant, we should check the gpu speedbin
> fuse value. Add support for this speedbin detection to a6xx family
> along with the required
ioacchino Del Regno
>
Yep, I can see how this would be not ideal.
Reviewed-by: Jordan Crouse
> ---
> drivers/gpu/drm/msm/adreno/adreno_gpu.c | 21 -
> drivers/gpu/drm/msm/adreno/adreno_gpu.h | 5 +
> 2 files changed, 17 insertions(+), 9 deletions(-)
&
On Mon, Jan 11, 2021 at 09:54:12AM +0530, Sai Prakash Ranjan wrote:
> Hi Rob,
>
> On 2021-01-08 22:16, Rob Clark wrote:
> >On Fri, Jan 8, 2021 at 6:05 AM Sai Prakash Ranjan
> > wrote:
> >>
> >>On 2021-01-08 19:09, Konrad Dybcio wrote:
> Konrad, can you please test this below change without yo
ong with the required fuse details for a618 gpu.
Reviewed-by: Jordan Crouse
> Signed-off-by: Akhil P Oommen
> ---
> Changes from v2:
> 1. Made the changes a6xx specific to save space.
> Changes from v1:
> 1. Added the changes to support a618 sku to the series.
>
een made when porting:
> 4 is the value that's supposed to be passed, but
> log2(4) = 2. Changing the value to 16 (= 2^4) fixes
> the issue.
I like keeping it in human readable values because its easier to visually
identify how many registers are saved without doing math.
Reviewed-
On Wed, Jan 13, 2021 at 07:33:38PM +0100, AngeloGioacchino Del Regno wrote:
> From: Konrad Dybcio
>
> Port over the command from downstream to prevent undefined
> behaviour.
Reviewed-by: Jordan Crouse
> Signed-off-by: Konrad Dybcio
> Signed-off-by: AngeloGi
On Wed, Jan 13, 2021 at 07:33:39PM +0100, AngeloGioacchino Del Regno wrote:
> From: Konrad Dybcio
>
> Port over the command from downstream to prevent undefined
> behaviour.
Reviewed-by: Jordan Crouse
> Signed-off-by: Konrad Dybcio
> Signed-off-by: AngeloGi
65ca5a2cb ("drm/msm: Add A6XX device support")
Because that was my ugly.
Reviewed-by: Jordan Crouse
> ---
> drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 25 ++---
> drivers/gpu/drm/msm/adreno/a6xx_gmu.h | 8
> drivers/gpu/drm/msm/adreno/a6xx_g
> Cc: sta...@vger.kernel.org # v5.9
The joys of not having a global mutex locking everything.
Reviewed-by: Jordan Crouse
> ---
> drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> b/
On Wed, Jan 27, 2021 at 03:39:46PM -0800, Eric Anholt wrote:
> Now that the bug is fixed in the minimal way for stable, go make the
> code table-driven.
>
> Signed-off-by: Eric Anholt
There shouldn't be too many more OOB bits, but this is a good cleanup
regardless.
Reviewed-
On Thu, Jan 28, 2021 at 11:17:16AM -0800, Eric Anholt wrote:
> On Thu, Jan 28, 2021 at 10:52 AM Jordan Crouse wrote:
> >
> > On Wed, Jan 27, 2021 at 03:39:44PM -0800, Eric Anholt wrote:
> > > We were using the same force-poweron bit in the two codepaths, so they
> &g
On Mon, Feb 01, 2021 at 08:20:44AM -0800, Rob Clark wrote:
> On Mon, Feb 1, 2021 at 3:16 AM Will Deacon wrote:
> >
> > On Fri, Jan 29, 2021 at 03:12:59PM +0530, Sai Prakash Ranjan wrote:
> > > On 2021-01-29 14:35, Will Deacon wrote:
> > > > On Mon, Jan 11, 2021 at 07:45:04PM +0530, Sai Prakash Ran
Most a6xx targets have security issues that were fixed with new versions
of the microcode(s). Make sure that we are booting with a safe version of
the microcode for the target and print a message and error if not.
Signed-off-by: Jordan Crouse
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 67
Most a6xx targets have security issues that were fixed with new versions
of the microcode(s). Make sure that we are booting with a safe version of
the microcode for the target and print a message and error if not.
v2: Add more informative error messages and fix typos
Signed-off-by: Jordan Crouse
nks. I feel silly that I missed that.
Reviewed-by: Jordan Crouse
> ---
> drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
> b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
> i
On Thu, Feb 11, 2021 at 06:50:28PM +0530, Akhil P Oommen wrote:
> On 2/10/2021 6:22 AM, Jordan Crouse wrote:
> >Most a6xx targets have security issues that were fixed with new versions
> >of the microcode(s). Make sure that we are booting with a safe version of
> >the microco
On Wed, Feb 17, 2021 at 07:14:16PM +0530, Akhil P Oommen wrote:
> On 2/17/2021 8:36 AM, Rob Clark wrote:
> >On Tue, Feb 16, 2021 at 12:10 PM Jonathan Marek wrote:
> >>
> >>Ignore nvmem_cell_get() EOPNOTSUPP error in the same way as a ENOENT error,
> >>to fix the case where the kernel was compiled
solid base that we can expand on later for even more
extensive GPU side page fault debugging capabilities.
v3: Always clear FSR even if the target driver is going to handle resume
v2: Fix comment wording and function pointer check per Rob Clark
Jordan Crouse (3):
iommu/arm-smmu: Add support for
Use the new adreno-smmu-priv fault info function to get more SMMU
debug registers and print the current TTBR0 to debug per-instance
pagetables and figure out which GPU block generated the request.
Signed-off-by: Jordan Crouse
---
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 4 +-
drivers/gpu/drm
On Fri, Jun 22, 2018 at 09:51:28AM -0400, Sean Paul wrote:
> On Wed, May 30, 2018 at 10:50 AM Rajesh Yadav wrote:
> >
> > From: Jordan Crouse
> >
> > Remove unused code from dpu_io_util.c. The functions are only
> > used inside of the msm driver so remove the EX
On Thu, Jun 28, 2018 at 02:28:55PM -0400, Sean Paul wrote:
> This time the iomap/iounmap helper functions. Move map into dpu and
> refactor it to reflect their actual use. iounmap wasn't useful, so
> delete it and call iounmap directly.
>
> Signed-off-by: Sean Paul
> ---
> drivers/gpu/drm/msm/di
printf call.
Signed-off-by: Jordan Crouse
---
drivers/gpu/drm/drm_print.c | 9 +
include/drm/drm_print.h | 2 ++
2 files changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/drm_print.c b/drivers/gpu/drm/drm_print.c
index 03d1f98e5ac7..8fd489248a50 100644
--- a/drivers/gpu/drm
be cleaner for the caller as suggested by Chris Wilson
Signed-off-by: Jordan Crouse
---
drivers/gpu/drm/i915/i915_gpu_error.c | 34 +++
include/linux/ascii85.h | 39 +++
2 files changed, 43 insertions(+), 30 deletions(-)
create mode 100
Add support for drm_puts() to use seq_puts() to help speed up
up print time for constant strings.
Signed-off-by: Jordan Crouse
---
drivers/gpu/drm/drm_print.c | 6 ++
include/drm/drm_print.h | 2 ++
2 files changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/drm_print.c b/drivers/gpu
Do a bit of cleanup to prepare for upcoming changes to pass the
hanging task comm and cmdline to the crash dump function.
Signed-off-by: Jordan Crouse
---
drivers/gpu/drm/msm/msm_gpu.c | 18 ++
1 file changed, 10 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/msm
Add a drm printer suitable for use with the read callback for
devcoredump or other suitable buffer based output format that
isn't otherwise covered by seq_file.
Signed-off-by: Jordan Crouse
---
drivers/gpu/drm/drm_print.c | 74 +
include/drm/drm_pr
#x27;crash' debugfs node.
Add documentation for the crash dump output.
v2: Convert output to yaml, use ascii85 to dump ringbuffer contents.
Jordan Crouse (13):
include: Move ascii85 functions from i915 to linux/ascii85.h
drm: drm_printer: Add printer for devcoredump
drm: Add drm_puts(
a previously captured state from a GPU hang.
Signed-off-by: Jordan Crouse
---
drivers/gpu/drm/msm/adreno/a3xx_gpu.c | 11 +--
drivers/gpu/drm/msm/adreno/a4xx_gpu.c | 12 +---
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 18 +
drivers/gpu/drm/msm/adreno/adreno_gpu.c | 30
drivers
ger set of GPU information.
Signed-off-by: Jordan Crouse
---
drivers/gpu/drm/msm/adreno/a3xx_gpu.c | 15 +++
drivers/gpu/drm/msm/adreno/a4xx_gpu.c | 14 +++
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 22 ++
drivers/gpu/drm/msm/adreno/adreno_gpu.c | 54
Add a put function for the coredump printer to bypass printf()
for constant strings for a speed boost.
Signed-off-by: Jordan Crouse
---
drivers/gpu/drm/drm_print.c | 42 +
include/drm/drm_print.h | 2 ++
2 files changed, 44 insertions(+)
diff --git a
captured on the next hang.
Signed-off-by: Jordan Crouse
---
drivers/gpu/drm/msm/Kconfig | 1 +
drivers/gpu/drm/msm/adreno/a3xx_gpu.c | 2 +-
drivers/gpu/drm/msm/adreno/a4xx_gpu.c | 2 +-
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 4 +-
drivers/gpu/drm/msm/adreno/adreno_gpu.c | 36
For hangs, dump copy out the contents of the buffer objects attached to the
guilty submission and print them in the crash dump report.
Signed-off-by: Jordan Crouse
---
Documentation/gpu/drm-msm-crash-dump.txt | 7 +++
drivers/gpu/drm/msm/adreno/adreno_gpu.c | 58
Add the contents of each ringbuffer to the GPU state and dump the
data in the crash file encoded with ascii85. To save space only
the used portions of the ringbuffer are dumped.
Signed-off-by: Jordan Crouse
---
Documentation/gpu/drm-msm-crash-dump.txt | 5 +++
drivers/gpu/drm/msm/adreno
ff-by: Jordan Crouse
---
drivers/gpu/drm/msm/adreno/a3xx_gpu.c | 8 +-
drivers/gpu/drm/msm/adreno/a4xx_gpu.c | 8 +-
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 236 ++--
drivers/gpu/drm/msm/adreno/adreno_gpu.c | 23 +--
drivers/gpu/drm/msm/adreno/adreno_gpu.h | 4
Convert the format of the 'show' debugfs file and the crash
dump to a format resembling YAML. This should be easier to
parse and be more flexible for future changes and expansions.
Signed-off-by: Jordan Crouse
---
Documentation/gpu/drm-msm-crash-dump.txt | 46 +++
On Fri, Jun 29, 2018 at 10:47:31PM +0200, Arnd Bergmann wrote:
> On Fri, Jun 29, 2018 at 8:48 PM, Kees Cook wrote:
> > In the quest to remove all stack VLA usage from the kernel[1], this
> > switches to using a kasprintf()ed buffer. Return paths are updated
> > to free the allocation.
> >
> > [1]
4A2FQpadafLfEzK6CC=qpxydaacu1rq...@mail.gmail.com
Thanks for doing this.
Acked-by: Jordan Crouse
> Signed-off-by: Kees Cook
> ---
> drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 7 +--
> drivers/gpu/drm/msm/adreno/adreno_gpu.c | 28 +
> 2 files change
On Tue, Jul 03, 2018 at 03:48:12PM -0400, Sean Paul wrote:
> Signed-off-by: Sean Paul
> ---
> arch/arm64/boot/dts/qcom/sdm845.dtsi | 182 +++
> 1 file changed, 182 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> b/arch/arm64/boot/dts/qcom/sdm845.dts
ested by Bjorn Andersson and add a new drm_print
facility to facilitate that. Remove the now obsolete 'crash' debugfs node.
Add documentation for the crash dump output.
v2: Convert output to yaml, use ascii85 to dump ringbuffer contents.
Jordan Crouse (13):
include: Move ascii85 functio
Add a put function for the coredump printer to bypass printf()
for constant strings for a speed boost.
v2: Add EXPORT_SYMBOL for _drm_puts_coredump
Signed-off-by: Jordan Crouse
---
drivers/gpu/drm/drm_print.c | 43 +
include/drm/drm_print.h | 2 ++
2
a previously captured state from a GPU hang.
Signed-off-by: Jordan Crouse
---
drivers/gpu/drm/msm/adreno/a3xx_gpu.c | 11 +--
drivers/gpu/drm/msm/adreno/a4xx_gpu.c | 12 +---
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 18 +
drivers/gpu/drm/msm/adreno/adreno_gpu.c | 30
drivers
Convert the format of the 'show' debugfs file and the crash
dump to a format resembling YAML. This should be easier to
parse and be more flexible for future changes and expansions.
Signed-off-by: Jordan Crouse
---
Documentation/gpu/drm-msm-crash-dump.txt | 46 +++
Do a bit of cleanup to prepare for upcoming changes to pass the
hanging task comm and cmdline to the crash dump function.
Signed-off-by: Jordan Crouse
---
drivers/gpu/drm/msm/msm_gpu.c | 18 ++
1 file changed, 10 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/msm
be cleaner for the caller as suggested by Chris Wilson
Signed-off-by: Jordan Crouse
---
drivers/gpu/drm/i915/i915_gpu_error.c | 34 +++
include/linux/ascii85.h | 39 +++
2 files changed, 43 insertions(+), 30 deletions(-)
create mode 100
Add a drm printer suitable for use with the read callback for
devcoredump or other suitable buffer based output format that
isn't otherwise covered by seq_file.
Signed-off-by: Jordan Crouse
---
drivers/gpu/drm/drm_print.c | 74 +
include/drm/drm_pr
Add a puts() function to use seq_puts() to help speed up
up print time for constant strings.
Signed-off-by: Jordan Crouse
---
drivers/gpu/drm/drm_print.c | 6 ++
include/drm/drm_print.h | 2 ++
2 files changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/drm_print.c b/drivers/gpu/drm
printf call.
Signed-off-by: Jordan Crouse
---
drivers/gpu/drm/drm_print.c | 9 +
include/drm/drm_print.h | 2 ++
2 files changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/drm_print.c b/drivers/gpu/drm/drm_print.c
index 03d1f98e5ac7..8fd489248a50 100644
--- a/drivers/gpu/drm
Add the contents of each ringbuffer to the GPU state and dump the
data in the crash file encoded with ascii85. To save space only
the used portions of the ringbuffer are dumped.
Signed-off-by: Jordan Crouse
---
Documentation/gpu/drm-msm-crash-dump.txt | 5 +++
drivers/gpu/drm/msm/adreno
ger set of GPU information.
Signed-off-by: Jordan Crouse
---
drivers/gpu/drm/msm/adreno/a3xx_gpu.c | 15 +++
drivers/gpu/drm/msm/adreno/a4xx_gpu.c | 14 +++
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 22 ++
drivers/gpu/drm/msm/adreno/adreno_gpu.c | 54
For hangs, dump copy out the contents of the buffer objects attached to the
guilty submission and print them in the crash dump report.
v2: Use %zd to print the size of the buffer correctly
Signed-off-by: Jordan Crouse
---
Documentation/gpu/drm-msm-crash-dump.txt | 7 +++
drivers/gpu/drm/msm
captured on the next hang.
Signed-off-by: Jordan Crouse
---
drivers/gpu/drm/msm/Kconfig | 1 +
drivers/gpu/drm/msm/adreno/a3xx_gpu.c | 2 +-
drivers/gpu/drm/msm/adreno/a4xx_gpu.c | 2 +-
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 4 +-
drivers/gpu/drm/msm/adreno/adreno_gpu.c | 36
ff-by: Jordan Crouse
---
drivers/gpu/drm/msm/adreno/a3xx_gpu.c | 8 +-
drivers/gpu/drm/msm/adreno/a4xx_gpu.c | 8 +-
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 236 ++--
drivers/gpu/drm/msm/adreno/adreno_gpu.c | 23 +--
drivers/gpu/drm/msm/adreno/adreno_gpu.h | 4
On Thu, Jul 12, 2018 at 08:40:55PM +0100, Chris Wilson wrote:
> Quoting Jordan Crouse (2018-07-12 19:59:19)
> > Add a drm printer suitable for use with the read callback for
> > devcoredump or other suitable buffer based output format that
> > isn't otherwise covered by
On Thu, Jul 12, 2018 at 09:46:58PM +0200, Daniel Vetter wrote:
> On Thu, Jul 12, 2018 at 12:59:19PM -0600, Jordan Crouse wrote:
> > Add a drm printer suitable for use with the read callback for
> > devcoredump or other suitable buffer based output format that
> > isn&#
On Tue, Jul 17, 2018 at 12:21:03PM +0100, Jean-Philippe Brucker wrote:
> Hi Jordan,
>
> Thanks for the patches, I finally got around testing them with SMMUv3.
> It's an important feature, arguably more than SVA itself. I could pick
> this one as part of the SVA series, what do you think?
I'm good
On Thu, Jul 12, 2018 at 08:40:55PM +0100, Chris Wilson wrote:
> Quoting Jordan Crouse (2018-07-12 19:59:19)
> > Add a drm printer suitable for use with the read callback for
> > devcoredump or other suitable buffer based output format that
> > isn't otherwise covered by
ger set of GPU information.
Signed-off-by: Jordan Crouse
---
drivers/gpu/drm/msm/adreno/a3xx_gpu.c | 15 +++
drivers/gpu/drm/msm/adreno/a4xx_gpu.c | 14 +++
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 22 ++
drivers/gpu/drm/msm/adreno/adreno_gpu.c | 55
olete 'crash' debugfs node.
Add documentation for the crash dump output.
v2: Convert output to yaml, use ascii85 to dump ringbuffer contents.
Jordan Crouse (13):
include: Move ascii85 functions from i915 to linux/ascii85.h
drm: drm_printer: Add printer for devcoredump
drm: Add drm_puts(
-> err_puts pointed out by the 01.org bot
v2: Update API to be cleaner for the caller as suggested by Chris Wilson
Reviewed-by: Chris Wilson
Signed-off-by: Jordan Crouse
---
drivers/gpu/drm/i915/i915_gpu_error.c | 34 +++-
include/linux/ascii85.h |
Add a drm printer suitable for use with the read callback for
devcoredump or other suitable buffer based output format that
isn't otherwise covered by seq_file.
v2: Add improved documentation per Daniel Vetter
Signed-off-by: Jordan Crouse
---
drivers/gpu/drm/drm_print.c
Add a puts function for the coredump printer to bypass printf()
for constant strings for a speed boost. Reorganize the
coredump printf callback to share as much code as possible.
v2: Try to reuse code between print and puts as suggested by
Chris Wilson
Signed-off-by: Jordan Crouse
Add a puts() function to use seq_puts() to help speed up
up print time for constant strings.
Reviewed-by: Daniel Vetter
Signed-off-by: Jordan Crouse
---
drivers/gpu/drm/drm_print.c | 6 ++
include/drm/drm_print.h | 2 ++
2 files changed, 8 insertions(+)
diff --git a/drivers/gpu/drm
Add the contents of each ringbuffer to the GPU state and dump the
data in the crash file encoded with ascii85. To save space only
the used portions of the ringbuffer are dumped.
Signed-off-by: Jordan Crouse
---
Documentation/gpu/msm-crash-dump.rst| 7 +
drivers/gpu/drm/msm/adreno
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