On 26/07/2024 13:18, Konrad Dybcio wrote:
> Use my @kernel.org address everywhere.
>
> Signed-off-by: Konrad Dybcio
> ---
FWIW:
Acked-by: Krzysztof Kozlowski
Rob, will you take it directly?
Best regards,
Krzysztof
On 28/06/2024 10:23, Danila Tikhonov wrote:
> Add the DSI host found on SM7150.
>
> Signed-off-by: Danila Tikhonov
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On 26/06/2024 06:31, Dmitry Baryshkov wrote:
> On Tue, Jun 25, 2024 at 04:51:27PM GMT, Rob Herring wrote:
>> On Sun, Jun 23, 2024 at 02:59:30PM +0200, Krzysztof Kozlowski wrote:
>>> dtschema v2024.4, v2024.5 and maybe earlier do not select device nodes for
>>
>
On 24/06/2024 16:06, Konrad Dybcio wrote:
>
>
> On 6/23/24 21:34, Krzysztof Kozlowski wrote:
>> Commit f30ac26def18 ("arm64: dts: qcom: add sm8150 GPU nodes") re-used
>> amd,imageon compatible for the SM8150 just to enable headless mode due
>> to missing
On 24/06/2024 08:21, Akhil P Oommen wrote:
> On Sun, Jun 23, 2024 at 01:11:48PM +0200, Krzysztof Kozlowski wrote:
>> On 23/06/2024 13:06, Akhil P Oommen wrote:
>>> This series adds support for the Adreno X1-85 GPU found in Qualcomm's
>>> compute series chipset, Sn
On 23/06/2024 17:16, Akhil P Oommen wrote:
> On Sun, Jun 23, 2024 at 02:53:17PM +0200, Krzysztof Kozlowski wrote:
>> On 23/06/2024 14:28, Akhil P Oommen wrote:
>>> On Sun, Jun 23, 2024 at 01:17:16PM +0200, Krzysztof Kozlowski wrote:
>>>> On 23/06/2024 13:06, A
a work-around do the binding can be used against DTS validation.
Signed-off-by: Krzysztof Kozlowski
---
This will uncover issues with DTS, which is expected and fixed in:
1. Incorrect AMD compatible:
https://lore.kernel.org/linux-arm-msm/20240623193420.333735-1-krzysztof.kozlow...@linaro.org/T
All devices should (and actually do) have same order of entries, if
possible. That's the case for reg/reg-names, so define the reg-names in
top-level to enforce that.
Acked-by: Conor Dooley
Signed-off-by: Krzysztof Kozlowski
---
Documentation/devicetree/bindings/display/msm/gpu.yaml | 5
Regex for newer Adreno compatibles can be simpler.
Suggested-by: Conor Dooley
Signed-off-by: Krzysztof Kozlowski
---
Documentation/devicetree/bindings/display/msm/gpu.yaml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/display/msm/gpu.yaml
We expect each schema with variable number of clocks, to have the widest
constrains in top-level "properties:". This is more readable and also
makes binding stricter, if there is no "if:then:" block for given
variant.
Acked-by: Conor Dooley
Signed-off-by: Krzysztof Kozlowski
devicetree/bindings/display/msm/gpu.yaml | 27 ++
1 file changed, 23 insertions(+), 4 deletions(-)
---
base-commit: d47fa80a484f97ea51991c9547636a799c264652
change-id: 20240623-qcom-adreno-dts-bindings-driver-87521a145260
Best regards,
--
Krzysztof Kozlowski
the SM8150 and later moved
to the SM8150 MTP board in commit 1642ab96efa4 ("arm64: dts: qcom:
sm8150: Don't start Adreno in headless mode") with an intention to allow
headless mode. This should be solved via proper driver quirks, not fake
compatibles.
Signed-off-by: Krzysztof Kozlowsk
ect
way.
Signed-off-by: Krzysztof Kozlowski
---
drivers/gpu/drm/msm/adreno/adreno_device.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c
b/drivers/gpu/drm/msm/adreno/adreno_device.c
index c3703a51287b..a8afe0b6429b 100644
--- a/driver
On 23/06/2024 16:13, Conor Dooley wrote:
> On Sun, Jun 23, 2024 at 02:00:26PM +0200, Krzysztof Kozlowski wrote:
>> MMIO address space is known per each variant of Adreno GPU, so we can
>> constrain the reg/reg-names entries for each variant. There is no DTS
>> f
a work-around do the binding can be used against DTS validation.
Signed-off-by: Krzysztof Kozlowski
---
Cc: Akhil P Oommen
---
.../devicetree/bindings/display/msm/gmu.yaml | 12
1 file changed, 12 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/msm
On 23/06/2024 14:28, Akhil P Oommen wrote:
> On Sun, Jun 23, 2024 at 01:17:16PM +0200, Krzysztof Kozlowski wrote:
>> On 23/06/2024 13:06, Akhil P Oommen wrote:
>>> Add the necessary dt nodes for gpu support in X1E80100.
>>>
>>> Signed-off-by: Akhil P Oomm
On 23/06/2024 13:06, Akhil P Oommen wrote:
> Document Adreno X185 GMU in the dt-binding specification.
>
> Signed-off-by: Akhil P Oommen
> ---
>
> Documentation/devicetree/bindings/display/msm/gmu.yaml | 4
> 1 file changed, 4 insertions(+)
>
> diff --git
MMIO address space is known per each variant of Adreno GPU, so we can
constrain the reg/reg-names entries for each variant. There is no DTS
for A619, so that part is not accurate but could be corrected later.
Signed-off-by: Krzysztof Kozlowski
---
.../devicetree/bindings/display/msm/gpu.yaml
All devices should (and actually do) have same order of entries, if
possible. That's the case for reg/reg-names, so define the reg-names in
top-level to enforce that.
Signed-off-by: Krzysztof Kozlowski
---
Documentation/devicetree/bindings/display/msm/gpu.yaml | 5 -
1 file changed, 4
We expect each schema with variable number of clocks, to have the widest
constrains in top-level "properties:". This is more readable and also
makes binding stricter, if there is no "if:then:" block for given
variant.
Signed-off-by: Krzysztof Kozlowski
---
Documentation
On 23/06/2024 13:06, Akhil P Oommen wrote:
> Add the necessary dt nodes for gpu support in X1E80100.
>
> Signed-off-by: Akhil P Oommen
> ---
> + gmu: gmu@3d6a000 {
> + compatible = "qcom,adreno-gmu-x185.1",
> "qcom,adreno-gmu";
> + reg = <0x0
On 23/06/2024 13:06, Akhil P Oommen wrote:
> Document Adreno X185 GMU in the dt-binding specification.
>
> Signed-off-by: Akhil P Oommen
> ---
>
> Documentation/devicetree/bindings/display/msm/gmu.yaml | 4 ++++
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On 23/06/2024 13:06, Akhil P Oommen wrote:
> This series adds support for the Adreno X1-85 GPU found in Qualcomm's
> compute series chipset, Snapdragon X1 Elite (x1e80100). In this new
> naming scheme for Adreno GPU, 'X' stands for compute series, '1' denotes
> 1st generation and '8' & '5' denotes
On 23/06/2024 01:25, Barnabás Czémán wrote:
> The MSM8937 SoC uses a slightly different 28nm dsi phy. Add a new
> compatible for it.
>
> Signed-off-by: Barnabás Czémán
> ---
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On 23/06/2024 01:25, Barnabás Czémán wrote:
> Add the compatible for the MDP5 found on MSM8937.
>
> Signed-off-by: Barnabás Czémán
> ---
Reviewed-by: Krzysztof Kozlowski
---
This is an automated instruction, just in case, because many review tags
are being ignored. If you know
On 13/06/2024 12:13, Dmitry Baryshkov wrote:
> On Thu, Jun 13, 2024 at 11:23:50AM +0200, Krzysztof Kozlowski wrote:
>> On 12/06/2024 20:43, Danila Tikhonov wrote:
>>> Document the DPU hardware found on the Qualcomm SM7150 platform.
>>
>> In general, this should be b
On 12/06/2024 20:43, Danila Tikhonov wrote:
> Document the MDSS hardware found on the Qualcomm SM7150 platform.
>
> Signed-off-by: Danila Tikhonov
> ---
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
lcomm SM7150 Display DPU
What is DPU? Such acronyms should be explained in description or
expanded here, if there is space.
Reviewed-by: Krzysztof Kozlowski
> +
> +maintainers:
> + - Danila Tikhonov
> +
> +$ref: /schemas/display/msm/dpu-common.yaml#
> +
> +properties:
> + compatible:
> +const: qcom,sm7150-dpu
> +
Best regards,
Krzysztof
On 04/06/2024 19:52, Abhinav Kumar wrote:
>
>
> On 6/4/2024 8:36 AM, Krzysztof Kozlowski wrote:
>> On 04/06/2024 17:32, Dmitry Baryshkov wrote:
>>> On Tue, Jun 04, 2024 at 05:22:03PM +0200, Krzysztof Kozlowski wrote:
>>>> On 04/06/2024 17:14, Dmitry Baryshkov
the default. In such case the property can
> be skipped.
>
> Signed-off-by: Dmitry Baryshkov
Maybe we need third DT maintainer review/ack...
Acked-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On 04/06/2024 17:32, Dmitry Baryshkov wrote:
> On Tue, Jun 04, 2024 at 05:22:03PM +0200, Krzysztof Kozlowski wrote:
>> On 04/06/2024 17:14, Dmitry Baryshkov wrote:
>>>>>>>>
>>>>>>>> I didnt follow why this is a link
On 04/06/2024 17:14, Dmitry Baryshkov wrote:
>>
>> I didnt follow why this is a link property. Sorry , I didnt follow the
>> split part.
>
> There is a link between the DSI host and the panel. I don't want to
> end up in a situation when the properties of the link are split
On 27/03/2024 11:11, Krzysztof Kozlowski wrote:
> On 26/03/2024 21:02, Dmitry Baryshkov wrote:
>> As Qualcomm SM8150 got support for the DisplayPort, add displayport@
>> node as a valid child to the MDSS node.
>>
>> Signed-off-by: Dmitry Baryshkov
>> ---
>
On 29/03/2024 08:45, Luca Weiss wrote:
> Document the displayport controller subnode of the SM6350 MDSS.
>
> Signed-off-by: Luca Weiss
> ---
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On 28/03/2024 12:11, Jun Nie wrote:
> Add DSI mode property and compression mode property
>
> Signed-off-by: Jun Nie
> ---
> .../bindings/display/panel/visionox,vtdr6130.yaml | 8
> 1 file changed, 8 insertions(+)
>
Please use scripts/get_maintainers.pl to get a list of
On 26/03/2024 21:02, Dmitry Baryshkov wrote:
> As Qualcomm SM8150 got support for the DisplayPort, add displayport@
> node as a valid child to the MDSS node.
>
> Signed-off-by: Dmitry Baryshkov
> ---
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On 27/03/2024 09:52, Dmitry Baryshkov wrote:
> On Wed, 27 Mar 2024 at 10:45, Krzysztof Kozlowski
> wrote:
>>
>> On 26/03/2024 21:02, Dmitry Baryshkov wrote:
>>> diff --git
>>> a/Documentation/devicetree/bindings/display/msm/qcom,sm8150-mdss.yaml
>>>
On 26/03/2024 21:05, Adam Skladowski wrote:
> Split shared schema into per-gen and group adrenos by clocks used.
>
> Signed-off-by: Adam Skladowski
> ---
> .../devicetree/bindings/display/msm/gpu.yaml | 317 ++
> .../bindings/display/msm/qcom,adreno-306.yaml | 115 +++
>
On 26/03/2024 21:02, Dmitry Baryshkov wrote:
> diff --git
> a/Documentation/devicetree/bindings/display/msm/qcom,sm8150-mdss.yaml
> b/Documentation/devicetree/bindings/display/msm/qcom,sm8150-mdss.yaml
> index c0d6a4fdff97..40b077fb20aa 100644
> ---
On 22/02/2024 16:55, Abel Vesa wrote:
> Add the X1E80100 to the list of compatibles and document the is-edp
> flag. The controllers are expected to operate in DP mode by default,
> and this flag can be used to select eDP mode.
>
> Signed-off-by: Abel Vesa
> ---
>
On 24/02/2024 23:34, Dmitry Baryshkov wrote:
> On Thu, 22 Feb 2024 at 17:55, Abel Vesa wrote:
>>
>> Add the X1E80100 to the list of compatibles and document the is-edp
>> flag. The controllers are expected to operate in DP mode by default,
>> and this flag can be used to select eDP mode.
>>
>>
On 23/02/2024 22:21, Konrad Dybcio wrote:
> Add device tree bindings for graphics clock controller for Qualcomm
> Technology Inc's QCM2290 SoCs.
>
> Signed-off-by: Konrad Dybcio
> ---
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On 16/02/2024 12:03, Neil Armstrong wrote:
> Document the GPU SMMU found on the SM8650 platform.
>
> Signed-off-by: Neil Armstrong
> ---
> Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 6 --
> 1 file changed, 4 insertions(+), 2 deletions(-)
Reviewed-by: Krzyszto
U SMMU")
> Suggested-by: Dmitry Baryshkov
> Signed-off-by: Neil Armstrong
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On 20/02/2024 22:23, Konrad Dybcio wrote:
> On 20.02.2024 18:31, Dmitry Baryshkov wrote:
>> The patch adding Type-C support for sm6115 was misapplied. All the
>> orientation switch configuration ended up at the UFS PHY node instead of
>> the USB PHY node. Move the data bits to the correct place.
On 16/02/2024 18:01, Abel Vesa wrote:
> Document the DPU for Qualcomm X1E80100 platform in the SM8650 schema, as
> they are similar.
>
> Signed-off-by: Abel Vesa
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On 21/01/2024 20:41, Adam Skladowski wrote:
> During conversion 28nm-hpm-fam-b compat got lost, add it.
>
> Signed-off-by: Adam Skladowski
> ---
Acked-by: Krzysztof Kozlowski
Best regards,
Krzysztof
| 4
> 1 file changed, 4 insertions(+)
>
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
es some note.
> .../bindings/display/msm/qcom,x1e80100-mdss.yaml | 249
> +
> 1 file changed, 249 insertions(+)
>
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On 29/01/2024 14:18, Abel Vesa wrote:
> Document the DPU for Qualcomm X1E80100 platform in the SM8650 schema, as
> they are similar.
>
> Signed-off-by: Abel Vesa
> ---
> Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml | 5 -
> 1 file changed, 4 insertions(+), 1
On 21/01/2024 20:41, Adam Skladowski wrote:
> Adreno 506(MSM8953) and Adreno 510(MSM8976) require
> Always-on branch clock to be enabled, describe it.
>
> Signed-off-by: Adam Skladowski
> ---
> Documentation/devicetree/bindings/display/msm/gpu.yaml | 6 --
> 1 file changed, 4 insertions(+),
On 21/01/2024 20:41, Adam Skladowski wrote:
> During conversion 28nm-hpm-fam-b compat got lost, add it.
Please add Fixes tag and put this commit as first in your patchset or
even as separate one.
Best regards,
Krzysztof
On 21/01/2024 20:41, Adam Skladowski wrote:
> When all dsi-ctrl compats were added msm8976 was missed, include it too.
>
> Signed-off-by: Adam Skladowski
> ---
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On 11/12/2023 16:44, Dmitry Baryshkov wrote:
> Add compatible string for the DisplayPort controller found on the
> Qualcomm SM8150 platform.
>
> Signed-off-by: Dmitry Baryshkov
> ---
DT list...
Best regards,
Krzysztof
On 10/12/2023 00:21, Dmitry Baryshkov wrote:
> Add compatible string for the DisplayPort controller found on the
> Qualcomm SM8150 platform.
>
> Signed-off-by: Dmitry Baryshkov
> ---
Acked-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On 10/12/2023 00:21, Dmitry Baryshkov wrote:
> Add compatible string for the DisplayPort controller found on the
> Qualcomm SM8150 platform.
>
> Signed-off-by: Dmitry Baryshkov
> ---
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On 07/12/2023 17:37, Neil Armstrong wrote:
> Document the DisplayPort controller found in the Qualcomm SM8650 SoC,
> the Controller base addresses and layout differ and thus cannot use
> the SM8350 compatible as fallback.
>
> Signed-off-by: Neil Armstrong
> ---
Reviewed-by: K
On 30/11/2023 21:35, Luca Weiss wrote:
> Some GPUs like the Adreno A305B has a patchid higher than 9, in this
> case 18. Make sure the regexes can account for that.
>
> Signed-off-by: Luca Weiss
> ---
Acked-by: Krzysztof Kozlowski
Best regards,
Krzysztof
y: Konrad Dybcio
> ---
Thanks, looks good.
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
hat.
>
> Fix that.
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On 25/11/2023 15:17, Konrad Dybcio wrote:
> Every Qualcomm SoC physically has a "CRYPTO0<->DDR" interconnect lane.
> Allow this property to be present, no matter the SoC.
>
> Signed-off-by: Konrad Dybcio
> ---
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On 25/11/2023 15:17, Konrad Dybcio wrote:
> QCM2290 has a single BWMONv4 intance for CPU. Document it.
>
> Signed-off-by: Konrad Dybcio
> ---
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On 25/11/2023 15:17, Konrad Dybcio wrote:
> In addition to MDP0, the cpu-cfg interconnect is also necessary.
> Allow it.
>
> Signed-off-by: Konrad Dybcio
> ---
> Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
>
erly, namely the "reg bus", a.k.a the CPU-MDSS CFG
> interconnect.
>
> Describe these paths bindings to allow using them in device trees and in
> the driver
>
> Signed-off-by: Dmitry Baryshkov
> [Konrad: rework for one vs two MDP paths]
> Signed-off-by: Konrad
On 25/11/2023 15:17, Konrad Dybcio wrote:
> The "qcom,dsi-ctrl-6g-qcm2290" has been deprecated in commit 0c0f65c6dd44
> ("dt-bindings: msm: dsi-controller-main: Add compatible strings for every
> current SoC"), but the example hasn't been updated to reflect that.
>
> Fix that.
>
> Fixes:
Qualcomm SM8150 MDSS comes with a bit different 7nm DSI PHY with its own
compatible. DTS already use it:
sa8155p-adp.dtb: display-subsystem@ae0: phy@ae94400:compatible:0:
'qcom,dsi-phy-7nm' was expected
Signed-off-by: Krzysztof Kozlowski
---
.../devicetree/bindings/display/msm/qcom
Document the DisplayPort controller node in MDSS binding, already used
in DTS:
sm8250-xiaomi-elish-boe.dtb: display-subsystem@ae0: Unevaluated
properties are not allowed ('displayport-controller@ae9' was unexpected)
Signed-off-by: Krzysztof Kozlowski
---
.../bindings/display/msm
tions(+)
>
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On 25/10/2023 09:35, Neil Armstrong wrote:
> Document the DPU Display Controller on the SM8650 Platform.
>
> Signed-off-by: Neil Armstrong
> ---
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On 25/10/2023 09:35, Neil Armstrong wrote:
> Document the DSI Controller on the SM8650 Platform.
>
> Signed-off-by: Neil Armstrong
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On 25/10/2023 09:34, Neil Armstrong wrote:
> Document the DSI PHY on the SM8650 Platform.
>
> Signed-off-by: Neil Armstrong
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On 03/10/2023 12:31, Dmitry Baryshkov wrote:
>>> +patternProperties:
>>> + "^display-controller@[0-9a-f]+$":
>>> +type: object
>>> +additionalProperties: true
>>> +
>>> +properties:
>>> + compatible:
>>> +const: qcom,sdm670-dpu
>>> +
>>> +
On 03/10/2023 03:21, Richard Acayan wrote:
> Add documentation for the SDM670 display subsystem, adapted from the
> SDM845 and SM6125 documentation.
>
> Signed-off-by: Richard Acayan
> ---
> .../display/msm/qcom,sdm670-mdss.yaml | 287 ++
> 1 file changed, 287
Simple 'opp-table:true' accepts a boolean property as opp-table, so
restrict it to object to properly enforce real OPP table nodes.
Signed-off-by: Krzysztof Kozlowski
---
.../devicetree/bindings/display/msm/dp-controller.yaml | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff
# on SM8550-QRD
> Tested-by: Dmitry Baryshkov # sm8450
> Signed-off-by: Konrad Dybcio
> ---
> Documentation/devicetree/bindings/display/msm/gmu.yaml | 7 +++
> 1 file changed, 7 insertions(+)
Acked-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On 27/07/2023 23:20, Rob Clark wrote:
> From: Rob Clark
>
> Upcoming GPUs use an opaque chip-id for identifying the GPU.
Examples?
Anyway, I think we should insist here of using something human-readable,
even if Qualcomm/Adreno internally use some weird numbers.
>
> Signed-off-by: Rob Clark
On 27/07/2023 14:21, Rohit Agarwal wrote:
>>> https://lore.kernel.org/all/1689744162-9421-1-git-send-email-quic_rohia...@quicinc.com/
>> Please mention the dependency in patch changelog ---, so it is obvious
>> for people applying it and also for the bot.
> Sure. Will send a cover letter for this
On 27/07/2023 13:19, Rohit Agarwal wrote:
>
> On 7/27/2023 4:46 PM, Rob Herring wrote:
>> On Thu, 27 Jul 2023 14:39:13 +0530, Rohit Agarwal wrote:
>>> Update the RPMHPD references with new bindings defined in rpmhpd.h
>>> for Qualcomm SoCs SM8[2345]50.
>>>
>>> Signed-off-by: Rohit Agarwal
>>>
nning
> v5.10.y.
>
> Cc: sta...@vger.kernel.org # v5.10+
> Reviewed-by: Caleb Connolly
> Signed-off-by: Amit Pundir
> ---
Acked-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On 13/07/2023 18:52, Amit Pundir wrote:
> Adding a reserved memory region for the framebuffer memory
> (the splash memory region set up by the bootloader).
>
> Signed-off-by: Amit Pundir
> ---
I think your commit msg misses describing the actual problem, impact to
users and finally cc-stable.
Pundir
> ---
Acked-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On 26/07/2023 09:27, Krzysztof Kozlowski wrote:
> On 25/07/2023 13:46, Marijn Suijten wrote:
>> On 2023-07-25 12:16:10, Krzysztof Kozlowski wrote:
>>> Example DTS should not have 'status' property.
>>>
>>> Signed-off-by: Krzysztof Kozlowski
>>> ---
On 25/07/2023 13:46, Marijn Suijten wrote:
> On 2023-07-25 12:16:10, Krzysztof Kozlowski wrote:
>> Example DTS should not have 'status' property.
>>
>> Signed-off-by: Krzysztof Kozlowski
>> ---
>> .../devicetree/bindings/display/msm/qcom,sm6125-mdss.yaml |
Example DTS should not have 'status' property.
Signed-off-by: Krzysztof Kozlowski
---
.../devicetree/bindings/display/msm/qcom,sm6125-mdss.yaml | 6 --
1 file changed, 6 deletions(-)
diff --git
a/Documentation/devicetree/bindings/display/msm/qcom,sm6125-mdss.yaml
b/Documentation
On 12/07/2023 20:31, Sean Paul wrote:
>>> 216 struct drm_device *ddev
>>> 234 struct drm_device *drm_dev
>>> 611 struct drm_device *drm
>>>4190 struct drm_device *dev
>>>
>>> This series starts with renaming struct drm_crtc::dev to drm_dev. If
>>> it's not only me and others like
ure MDSS register access
> functions properly, namely the "reg bus", a.k.a the CPU-MDSS CFG
> interconnect.
>
> Describe these paths bindings to allow using them in device trees and in
> the driver
>
> Signed-off-by: Konrad Dybcio
> Signed-off-by: Dmitry Baryshkov
Acked-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On 12/07/2023 15:02, Amit Pundir wrote:
> Add and document the reserved memory region property
> in the qcom,sdm845-mdss schema.
>
> Signed-off-by: Amit Pundir
Please keep consistent versioning, so this is new patch in v4.
> ---
> .../devicetree/bindings/display/msm/qcom,sdm845-mdss.yaml|
On 09/07/2023 06:19, Dmitry Baryshkov wrote:
> It looks like DP controlled on SM8250 is the same as DP controller on
> SM8350. Use the SM8350 compatible as fallback for SM8250.
>
> Signed-off-by: Dmitry Baryshkov
> ---
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On 06/07/2023 23:10, Rob Clark wrote:
> From: Rob Clark
>
> Upcoming GPUs use an opaque chip-id for identifying the GPU.
Please use scripts/get_maintainers.pl to get a list of necessary people
and lists to CC. It might happen, that command when run on an older
kernel, gives you outdated
On 28/06/2023 22:35, Konrad Dybcio wrote:
> Allow A7xx SKUs, such as the A730 GPU found on SM8450 and friends.
> They use GMU for all things DVFS, just like most A6xx GPUs.
>
> Signed-off-by: Konrad Dybcio
> ---
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On 28/06/2023 22:35, Konrad Dybcio wrote:
> When booting the GMU, the QMP mailbox should be pinged about some tunables
> (e.g. adaptive clock distribution state). To achieve that, a reference to
> it is necessary. Allow it and require it with A730.
>
> Signed-off-by: Konrad Dybcio
> ---
>
il and HFI would hang after the first submitted OOB).
>
> Describe the A730 and A740 GMU.
>
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
The DTS code coding style expects spaces around '=' sign.
Signed-off-by: Krzysztof Kozlowski
---
Rob,
Maybe this could go via your tree? Rebased on your for-next:
v6.4-rc2-45-gf0ac35049606
---
.../bindings/arm/arm,coresight-cti.yaml| 18 +-
.../bindings/arm/keystone
On 27/06/2023 11:02, Marijn Suijten wrote:
> So deleting a new item at the end does not matter. But what if I respin
> this patch to add the new clock _at the end_, which will then be at the
> same index as the previous GCC_DISP_AHB_CLK?
I think you know the answer, right?
On 27/06/2023 09:49, Marijn Suijten wrote:
> On 2023-06-27 09:29:53, Krzysztof Kozlowski wrote:
>> On 27/06/2023 08:54, Marijn Suijten wrote:
>>> On 2023-06-27 08:24:41, Krzysztof Kozlowski wrote:
>>>> On 26/06/2023 20:53, Marijn Suijten wrote:
>>>>>
On 27/06/2023 08:54, Marijn Suijten wrote:
> On 2023-06-27 08:24:41, Krzysztof Kozlowski wrote:
>> On 26/06/2023 20:53, Marijn Suijten wrote:
>>> On 2023-06-26 20:51:38, Marijn Suijten wrote:
>>>
>>>>> Not really, binding also defines the list of clock
On 26/06/2023 20:53, Marijn Suijten wrote:
> On 2023-06-26 20:51:38, Marijn Suijten wrote:
>
>>> Not really, binding also defines the list of clocks - their order and
>>> specific entries. This changes.
>>
>> And so it does in "dt-bindings: clock: qcom,dispcc-sm6125: Remove unused
>>
On 26/06/2023 19:49, Marijn Suijten wrote:
> On 2023-06-26 18:10:44, Krzysztof Kozlowski wrote:
>> On 25/06/2023 21:48, Marijn Suijten wrote:
>>> On 2023-06-24 11:08:54, Krzysztof Kozlowski wrote:
>>>> On 24/06/2023 03:45, Konrad Dybcio wrote:
>>>>&
On 25/06/2023 21:52, Marijn Suijten wrote:
> On 2023-06-24 11:12:52, Krzysztof Kozlowski wrote:
>> On 24/06/2023 02:41, Marijn Suijten wrote:
>>> SM6125 is identical to SM6375 except that while downstream also defines
>>> a throttle clock, its presence results
On 26/06/2023 16:26, Marijn Suijten wrote:
> On 2023-06-26 11:43:39, Konrad Dybcio wrote:
>> On 25.06.2023 21:48, Marijn Suijten wrote:
>>> On 2023-06-24 03:45:02, Konrad Dybcio wrote:
On 24.06.2023 02:41, Marijn Suijten wrote:
> The "gcc_disp_gpll0_div_clk_src" clock is consumed by the
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