Re: [PATCH v4 1/2] iommu/io-pgtable-arm: Add way to debug pgtable walk

On 23/05/2024 6:52 pm, Rob Clark wrote: From: Rob Clark Add an io-pgtable method to walk the pgtable returning the raw PTEs that would be traversed for a given iova access. Have to say I'm a little torn here - with my iommu-dma hat on I'm not super enthusiastic about adding any more

Re: [PATCH v2] iommu/arm-smmu-qcom: Add missing GMU entry to match table

, at least) in the SMMU getting wedged and the GPU stuck without memory access. Reviewed-by: Robin Murphy Cc: sta...@vger.kernel.org Signed-off-by: Rob Clark --- I didn't add a fixes tag because really this issue has been there all along, but either didn't matter with other firmware or we didn't

Re: [PATCH] iommu/arm-smmu-qcom: Add missing GMU entry to match table

On 07/12/2023 9:24 pm, Rob Clark wrote: From: Rob Clark We also want the default domain for the GMU to be an identy domain, so it does not get a context bank assigned. Without this, both of_dma_configure() and drm/msm's iommu_domain_attach() will trigger allocating and configuring a context

Re: [PATCH 1/3] iommu/msm-iommu: don't limit the driver too much

On 07/12/2023 12:54 pm, Dmitry Baryshkov wrote: In preparation of dropping most of ARCH_QCOM subtypes, stop limiting the driver just to those machines. Allow it to be built for any 32-bit Qualcomm platform (ARCH_QCOM). Acked-by: Robin Murphy Unless Joerg disagrees, I think it should be fine

Re: [Freedreno] [PATCH] drm/msm/a6xx: don't set IO_PGTABLE_QUIRK_ARM_OUTER_WBWA with coherent SMMU

On 29/09/2023 4:45 pm, Will Deacon wrote: On Mon, Sep 25, 2023 at 06:54:42PM +0100, Robin Murphy wrote: On 2023-04-10 19:52, Dmitry Baryshkov wrote: If the Adreno SMMU is dma-coherent, allocation will fail unless we disable IO_PGTABLE_QUIRK_ARM_OUTER_WBWA. Skip setting this quirk

Re: [Freedreno] [PATCH] drm/msm/a6xx: don't set IO_PGTABLE_QUIRK_ARM_OUTER_WBWA with coherent SMMU

On 2023-04-10 19:52, Dmitry Baryshkov wrote: If the Adreno SMMU is dma-coherent, allocation will fail unless we disable IO_PGTABLE_QUIRK_ARM_OUTER_WBWA. Skip setting this quirk for the coherent SMMUs (like we have on sm8350 platform). Hmm, but is it right that it should fail in the first

Re: [Freedreno] [PATCH] iommu: Remove the device_lock_assert() from __iommu_probe_device()

On 2023-08-18 22:32, Jason Gunthorpe wrote: It turns out several drivers are calling of_dma_configure() outside the expected bus_type.dma_configure op. This ends up being mis-locked and triggers a lockdep assertion, or instance: iommu_probe_device_locked+0xd4/0xe4

Re: [Freedreno] [PATCH 0/2] drm: Add component_match_add_of and convert users of drm_of_component_match_add

On 2022-12-16 17:08, Sean Anderson wrote: On 11/3/22 14:22, Sean Anderson wrote: This series adds a new function component_match_add_of to simplify the common case of calling component_match_add_release with component_release_of and component_compare_of. There is already

Re: [Freedreno] [PATCH 4/5] drm/msm: Use separate ASID for each set of pgtables

On 2022-08-22 14:52, Robin Murphy wrote: On 2022-08-21 19:19, Rob Clark wrote: From: Rob Clark Optimize TLB invalidation by using different ASID for each set of pgtables.  There can be scenarios where multiple processes end up with the same ASID (such as >256 processes using the

Re: [Freedreno] [PATCH 4/5] drm/msm: Use separate ASID for each set of pgtables

On 2022-08-21 19:19, Rob Clark wrote: From: Rob Clark Optimize TLB invalidation by using different ASID for each set of pgtables. There can be scenarios where multiple processes end up with the same ASID (such as >256 processes using the GPU), but this is harmless, it will only result in some

Re: [Freedreno] [PATCH v2 5/5] drm/msm: switch msm_kms_init_aspace() to use device_iommu_mapped()

, I'd have squashed these changes across the previous patches, such that the dodgy fwspec calls are never introduced in the first place, but it's your driver, and if that's the way you want to work it and Rob's happy with it too, then fine by me. For the end result, Reviewed-by: Robin Murphy I'm

Re: [Freedreno] [PATCH 2/3] drm/msm/mdp5: move iommu_domain_alloc() call close to its usage

On 2022-05-03 14:30, Dmitry Baryshkov wrote: On Tue, 3 May 2022 at 13:57, Robin Murphy wrote: On 2022-05-01 11:10, Dmitry Baryshkov wrote: Move iommu_domain_alloc() in front of adress space/IOMMU initialization. This allows us to drop final bits of struct mdp5_cfg_platform which remained

Re: [Freedreno] [PATCH 2/3] drm/msm/mdp5: move iommu_domain_alloc() call close to its usage

On 2022-05-01 11:10, Dmitry Baryshkov wrote: Move iommu_domain_alloc() in front of adress space/IOMMU initialization. This allows us to drop final bits of struct mdp5_cfg_platform which remained from the pre-DT days. Signed-off-by: Dmitry Baryshkov ---

Re: [Freedreno] [PATCH] drm/msm: Revert "drm/msm: Stop using iommu_present()"

On 2022-04-19 22:08, Dmitry Baryshkov wrote: On 20/04/2022 00:04, Robin Murphy wrote: On 2022-04-19 14:04, Dmitry Baryshkov wrote: This reverts commit e2a88eabb02410267519b838fb9b79f5206769be. The commit in question makes msm_use_mmu() check whether the DRM 'component master' device

Re: [Freedreno] [PATCH] drm/msm: Revert "drm/msm: Stop using iommu_present()"

On 2022-04-19 14:04, Dmitry Baryshkov wrote: This reverts commit e2a88eabb02410267519b838fb9b79f5206769be. The commit in question makes msm_use_mmu() check whether the DRM 'component master' device is translated by the IOMMU. At this moment it is the 'mdss' device. However on platforms using the

[Freedreno] [PATCH] drm/msm: Stop using iommu_present()

Even if some IOMMU has registered itself on the platform "bus", that doesn't necessarily mean it provides translation for the device we care about. Replace iommu_present() with a more appropriate check. Signed-off-by: Robin Murphy --- drivers/gpu/drm/msm/msm_drv.c | 2 +- 1 file

Re: [Freedreno] [PATCH] drm/msm: use orig_nents to iterate over scatterlist with per-process tables

On 2022-03-28 13:55, Jonathan Marek wrote: This matches the implementation of iommu_map_sgtable() used for the non-per-process page tables path. This works around the dma_map_sgtable() call (used to invalidate cache) overwriting sgt->nents with 1 (which is probably a separate issue). FWIW

Re: [Freedreno] [PATCH 16/18] iommu: remove DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE

On 2021-03-16 15:38, Christoph Hellwig wrote: [...] diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index f1e38526d5bd40..996dfdf9d375dd 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++

Re: [Freedreno] [PATCH 16/18] iommu: remove DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE

On 2021-03-31 16:32, Will Deacon wrote: On Wed, Mar 31, 2021 at 02:09:37PM +0100, Robin Murphy wrote: On 2021-03-31 12:49, Will Deacon wrote: On Tue, Mar 30, 2021 at 05:28:19PM +0100, Robin Murphy wrote: On 2021-03-30 14:58, Will Deacon wrote: On Tue, Mar 30, 2021 at 02:19:38PM +0100, Robin

Re: [Freedreno] [PATCH 16/18] iommu: remove DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE

On 2021-03-31 12:49, Will Deacon wrote: On Tue, Mar 30, 2021 at 05:28:19PM +0100, Robin Murphy wrote: On 2021-03-30 14:58, Will Deacon wrote: On Tue, Mar 30, 2021 at 02:19:38PM +0100, Robin Murphy wrote: On 2021-03-30 14:11, Will Deacon wrote: On Tue, Mar 16, 2021 at 04:38:22PM +0100

Re: [Freedreno] [PATCH 16/18] iommu: remove DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE

On 2021-03-30 14:58, Will Deacon wrote: On Tue, Mar 30, 2021 at 02:19:38PM +0100, Robin Murphy wrote: On 2021-03-30 14:11, Will Deacon wrote: On Tue, Mar 16, 2021 at 04:38:22PM +0100, Christoph Hellwig wrote: From: Robin Murphy Instead make the global iommu_dma_strict paramete in iommu.c

Re: [Freedreno] [PATCH 16/18] iommu: remove DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE

On 2021-03-30 14:11, Will Deacon wrote: On Tue, Mar 16, 2021 at 04:38:22PM +0100, Christoph Hellwig wrote: From: Robin Murphy Instead make the global iommu_dma_strict paramete in iommu.c canonical by exporting helpers to get and set it and use those directly in the drivers. This make sure

Re: [Freedreno] [PATCH 14/17] iommu: remove DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE

On 2021-03-15 08:33, Christoph Hellwig wrote: On Fri, Mar 12, 2021 at 04:18:24PM +, Robin Murphy wrote: Let me know what you think of the version here: http://git.infradead.org/users/hch/misc.git/shortlog/refs/heads/iommu-cleanup I'll happily switch the patch to you as the author

Re: [Freedreno] [PATCH 14/17] iommu: remove DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE

On 2021-03-11 08:26, Christoph Hellwig wrote: On Wed, Mar 10, 2021 at 06:39:57PM +, Robin Murphy wrote: Actually... Just mirroring the iommu_dma_strict value into struct iommu_domain should solve all of that with very little boilerplate code. Yes, my initial thought was to directly

Re: [Freedreno] [PATCH 14/17] iommu: remove DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE

On 2021-03-10 09:25, Christoph Hellwig wrote: On Wed, Mar 10, 2021 at 10:15:01AM +0100, Christoph Hellwig wrote: On Thu, Mar 04, 2021 at 03:25:27PM +, Robin Murphy wrote: On 2021-03-01 08:42, Christoph Hellwig wrote: Use explicit methods for setting and querying the information instead

Re: [Freedreno] [PATCH 16/17] iommu: remove DOMAIN_ATTR_IO_PGTABLE_CFG

On 2021-03-01 08:42, Christoph Hellwig wrote: Signed-off-by: Christoph Hellwig Moreso than the previous patch, where the feature is at least relatively generic (note that there's a bunch of in-flight development around DOMAIN_ATTR_NESTING), I'm really not convinced that it's beneficial to

Re: [Freedreno] [PATCH 14/17] iommu: remove DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE

On 2021-03-01 08:42, Christoph Hellwig wrote: Use explicit methods for setting and querying the information instead. Now that everyone's using iommu-dma, is there any point in bouncing this through the drivers at all? Seems like it would make more sense for the x86 drivers to reflect their

Re: [Freedreno] [PATCH v2 1/7] iommu/io-pgtable: Introduce dynamic io-pgtable fmt registration

On 2020-12-22 19:54, isa...@codeaurora.org wrote: On 2020-12-22 11:27, Robin Murphy wrote: On 2020-12-22 00:44, Isaac J. Manjarres wrote: The io-pgtable code constructs an array of init functions for each page table format at compile time. This is not ideal, as this increases the footprint

Re: [Freedreno] [PATCH v2 3/7] iommu/arm-smmu: Add dependency on io-pgtable format modules

On 2020-12-22 19:49, isa...@codeaurora.org wrote: On 2020-12-22 11:27, Robin Murphy wrote: On 2020-12-22 00:44, Isaac J. Manjarres wrote: The SMMU driver depends on the availability of the ARM LPAE and ARM V7S io-pgtable format code to work properly. In preparation Nit: we don't really

Re: [Freedreno] [PATCH v2 3/7] iommu/arm-smmu: Add dependency on io-pgtable format modules

On 2020-12-22 00:44, Isaac J. Manjarres wrote: The SMMU driver depends on the availability of the ARM LPAE and ARM V7S io-pgtable format code to work properly. In preparation Nit: we don't really depend on v7s - we *can* use it if it's available, address constraints are suitable, and the SMMU

Re: [Freedreno] [PATCH] drm/msm/a6xx: Add support for using system cache on MMU500 based targets

On 2020-10-26 18:54, Jordan Crouse wrote: This is an extension to the series [1] to enable the System Cache (LLC) for Adreno a6xx targets. GPU targets with an MMU-500 attached have a slightly different process for enabling system cache. Use the compatible string on the IOMMU phandle to see if

[Freedreno] [PATCH] drm/msm: Add missing stub definition

DRM_MSM fails to build with DRM_MSM_DP=n; add the missing stub. Signed-off-by: Robin Murphy --- drivers/gpu/drm/msm/msm_drv.h | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h index b9dd8f8f4887..0b2686b060c7 100644

Re: [Freedreno] [PATCH 2/3] drm/msm: add DRM_MSM_GEM_SYNC_CACHE for non-coherent cache maintenance

On 2020-10-07 07:25, Christoph Hellwig wrote: On Tue, Oct 06, 2020 at 09:19:32AM -0400, Jonathan Marek wrote: One example why drm/msm can't use DMA API is multiple page table support (that is landing in 5.10), which is something that definitely couldn't work with DMA API. Another one is being

Re: [Freedreno] [PATCHv5 5/6] iommu: arm-smmu-impl: Use table to list QCOM implementations

On 2020-09-22 07:18, Sai Prakash Ranjan wrote: Use table and of_match_node() to match qcom implementation instead of multiple of_device_compatible() calls for each QCOM SMMU implementation. Signed-off-by: Sai Prakash Ranjan --- drivers/iommu/arm/arm-smmu/arm-smmu-impl.c | 12 1

Re: [Freedreno] [PATCHv4 1/6] iommu/io-pgtable-arm: Add support to use system cache

On 2020-09-21 19:03, Will Deacon wrote: On Fri, Sep 11, 2020 at 07:57:18PM +0530, Sai Prakash Ranjan wrote: Add a quirk IO_PGTABLE_QUIRK_SYS_CACHE to override the attributes set in TCR for the page table walker when using system cache. I wonder if the panfrost folks can reuse this for the

Re: [Freedreno] [PATCHv4 6/6] iommu: arm-smmu-impl: Remove unwanted extra blank lines

On 2020-09-11 17:21, Sai Prakash Ranjan wrote: On 2020-09-11 21:37, Will Deacon wrote: On Fri, Sep 11, 2020 at 05:03:06PM +0100, Robin Murphy wrote: BTW am I supposed to have received 3 copies of everything? Because I did... Yeah, this seems to be happening for all of Sai's emails

Re: [Freedreno] [PATCHv4 6/6] iommu: arm-smmu-impl: Remove unwanted extra blank lines

On 2020-09-11 15:28, Sai Prakash Ranjan wrote: There are few places in arm-smmu-impl where there are extra blank lines, remove them FWIW those were deliberate - sometimes I like a bit of subtle space to visually delineate distinct groups of definitions. I suppose it won't be to everyone's

[Freedreno] [PATCH] drm/msm: Drop local dma_parms

Since commit 9495b7e92f71 ("driver core: platform: Initialize dma_parms for platform devices"), struct platform_device already provides a dma_parms structure, so we can save allocating another one. Also the DMA segment size is simply a size, not a bitmask. Signed-off-by: Ro

Re: [Freedreno] [PATCH v9 12/32] drm: msm: fix common struct sg_table related issues

On 2020-08-26 07:32, Marek Szyprowski wrote: The Documentation/DMA-API-HOWTO.txt states that the dma_map_sg() function returns the number of the created entries in the DMA address space. However the subsequent calls to the dma_sync_sg_for_{device,cpu}() and dma_unmap_sg must be called with the

Re: [Freedreno] arm64: Internal error: Oops: qcom_iommu_tlb_inv_context free_io_pgtable_ops on db410c

On 2020-07-20 08:17, Arnd Bergmann wrote: On Mon, Jul 20, 2020 at 8:36 AM Naresh Kamboju wrote: This kernel oops while boot linux mainline kernel on arm64 db410c device. metadata: git branch: master git repo: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git git

Re: [Freedreno] [PATCH v2 1/6] iommu/arm-smmu: Add auxiliary domain support for arm-smmuv2

On 2020-06-26 21:04, Jordan Crouse wrote: Support auxiliary domains for arm-smmu-v2 to initialize and support multiple pagetables for a single SMMU context bank. Since the smmu-v2 hardware doesn't have any built in support for switching the pagetable base it is left as an exercise to the caller

Re: [Freedreno] [PATCH v2 4/6] drm/msm: Add support to create a local pagetable

On 2020-06-26 21:04, Jordan Crouse wrote: Add support to create a io-pgtable for use by targets that support per-instance pagetables. In order to support per-instance pagetables the GPU SMMU device needs to have the qcom,adreno-smmu compatible string and split pagetables and auxiliary domains

Re: [Freedreno] [PATCH v2 2/6] iommu/io-pgtable: Allow a pgtable implementation to skip TLB operations

On 2020-06-26 21:04, Jordan Crouse wrote: Allow a io-pgtable implementation to skip TLB operations by checking for NULL pointers in the helper functions. It will be up to to the owner of the io-pgtable instance to make sure that they independently handle the TLB correctly. I don't really

Re: [Freedreno] [PATCH] dt-bindings: arm-smmu: update the list of clocks

[ /me fires off MAINTAINERS patch... ] On 20/02/2020 9:02 pm, Matthias Kaehlcke wrote: On Thu, Feb 20, 2020 at 01:42:22PM +0530, Sharat Masetty wrote: This patch adds a clock definition needed for powering on the GPU TBUs and the GPU TCU. Signed-off-by: Sharat Masetty ---

Re: [Freedreno] [PATCH v2] iommu/arm-smmu: fix "hang" when games exit

On 2019-10-28 10:38 pm, Rob Clark wrote: On Mon, Oct 28, 2019 at 3:20 PM Will Deacon wrote: Hi Rob, On Mon, Oct 07, 2019 at 01:49:06PM -0700, Rob Clark wrote: From: Rob Clark When games, browser, or anything using a lot of GPU buffers exits, there can be many hundreds or thousands of

Re: [Freedreno] [PATCH v2] iommu/arm-smmu: fix "hang" when games exit

. Reviewed-by: Robin Murphy Signed-off-by: Rob Clark --- v1: original v2: unconditionally use autosuspend, rather than deciding based on what consumer does drivers/iommu/arm-smmu.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu

Re: [Freedreno] [PATCH 00/11] of: Fix DMA configuration for non-DT masters

On 2019-09-26 11:44 am, Nicolas Saenz Julienne wrote: Robin, have you looked into supporting multiple dma-ranges? It's the next thing we need for BCM STB's PCIe. I'll have a go at it myself if nothing is in the works already. Multiple dma-ranges as far as configuring inbound windows should

Re: [Freedreno] [PATCH 00/11] of: Fix DMA configuration for non-DT masters

On 25/09/2019 17:16, Rob Herring wrote: On Wed, Sep 25, 2019 at 10:30 AM Nicolas Saenz Julienne wrote: On Wed, 2019-09-25 at 16:09 +0100, Robin Murphy wrote: On 25/09/2019 15:52, Nicolas Saenz Julienne wrote: On Tue, 2019-09-24 at 16:59 -0500, Rob Herring wrote: On Tue, Sep 24, 2019 at 1

Re: [Freedreno] [PATCH 00/11] of: Fix DMA configuration for non-DT masters

On 25/09/2019 15:52, Nicolas Saenz Julienne wrote: On Tue, 2019-09-24 at 16:59 -0500, Rob Herring wrote: On Tue, Sep 24, 2019 at 1:12 PM Nicolas Saenz Julienne wrote: Hi All, this series tries to address one of the issues blocking us from upstreaming Broadcom's STB PCIe controller[1]. Namely,

Re: [Freedreno] [PATCH v3 0/2] iommu: handle drivers that manage iommu directly

On 06/09/2019 22:44, Rob Clark wrote: From: Rob Clark One of the challenges we have to enable the aarch64 laptops upstream is dealing with the fact that the bootloader enables the display and takes the corresponding SMMU context-bank out of BYPASS. Unfortunately, currently, the IOMMU

Re: [Freedreno] [PATCH] iommu/arm-smmu: fix "hang" when games exit

On 07/09/2019 18:50, Rob Clark wrote: From: Rob Clark When games, browser, or anything using a lot of GPU buffers exits, there can be many hundreds or thousands of buffers to unmap and free. If the GPU is otherwise suspended, this can cause arm-smmu to resume/suspend for each buffer,

Re: [Freedreno] [PATCH v3 0/2] iommu/arm-smmu: Split pagetable support

On 16/08/2019 19:12, Rob Clark wrote: On Fri, Aug 16, 2019 at 9:58 AM Robin Murphy wrote: Hi Jordan, On 15/08/2019 16:33, Jordan Crouse wrote: On Wed, Aug 07, 2019 at 04:21:38PM -0600, Jordan Crouse wrote: (Sigh, resend. I freaked out my SMTP server) This is part of an ongoing evolution

Re: [Freedreno] [PATCH v3 0/2] iommu/arm-smmu: Split pagetable support

Hi Jordan, On 15/08/2019 16:33, Jordan Crouse wrote: On Wed, Aug 07, 2019 at 04:21:38PM -0600, Jordan Crouse wrote: (Sigh, resend. I freaked out my SMTP server) This is part of an ongoing evolution for enabling split pagetable support for arm-smmu. Previous versions can be found [1]. In the

Re: [Freedreno] [RESEND PATCH v2 3/3] iommu/arm-smmu: Add support for DOMAIN_ATTR_SPLIT_TABLES

On 08/07/2019 20:00, Jordan Crouse wrote: When DOMAIN_ATTR_SPLIT_TABLES is specified for pass ARM_64_LPAE_SPLIT_S1 to io_pgtable_ops to allocate and initialize TTBR0 and TTBR1 pagetables. v3: Moved all the pagetable specific work into io-pgtable-arm in a previous patch. Signed-off-by: Jordan

Re: [Freedreno] [RESEND PATCH v2 2/3] iommu/io-pgtable-arm: Add support for AARCH64 split pagetables

Hi Jordan, On 08/07/2019 20:00, Jordan Crouse wrote: Add a new sub-format ARM_64_LPAE_SPLIT_S1 to create and set up split pagetables (TTBR0 and TTBR1). The initialization function sets up the correct va_size and sign extension bits and programs the TCR registers. Split pagetable formats use

Re: [Freedreno] [PATCH] of/device: add blacklist for iommu dma_ops

On 03/06/2019 11:47, Rob Clark wrote: On Sun, Jun 2, 2019 at 11:25 PM Tomasz Figa wrote: On Mon, Jun 3, 2019 at 4:40 AM Rob Clark wrote: On Fri, May 10, 2019 at 7:35 AM Rob Clark wrote: On Tue, Dec 4, 2018 at 2:29 PM Rob Herring wrote: On Sat, Dec 1, 2018 at 10:54 AM Rob Clark

Re: [Freedreno] [PATCH v2 03/15] iommu/arm-smmu: Add split pagetable support for arm-smmu-v2

On 21/05/2019 17:13, Jordan Crouse wrote: Add support for a split pagetable (TTBR0/TTBR1) scheme for arm-smmu-v2. If split pagetables are enabled, create a pagetable for TTBR1 and set up the sign extension bit so that all IOVAs with that bit set are mapped and translated from the TTBR1

Re: [Freedreno] [PATCH] of/device: add blacklist for iommu dma_ops

Hi Rob, On 01/12/2018 16:53, Rob Clark wrote: This solves a problem we see with drm/msm, caused by getting iommu_dma_ops while we attach our own domain and manage it directly at the iommu API level: [0038] user address but active_mm is swapper Internal error: Oops: 9605

Re: [Freedreno] [PATCH v3 1/1] drm: msm: Replace dma_map_sg with dma_sync_sg*

On 29/11/2018 19:57, Tomasz Figa wrote: On Thu, Nov 29, 2018 at 11:40 AM Jordan Crouse wrote: On Thu, Nov 29, 2018 at 01:48:15PM -0500, Rob Clark wrote: On Thu, Nov 29, 2018 at 10:54 AM Christoph Hellwig wrote: On Thu, Nov 29, 2018 at 09:42:50AM -0500, Rob Clark wrote: Maybe the thing we

Re: [Freedreno] [PATCH v18 1/5] iommu/arm-smmu: Add pm_runtime/sleep ops

On 28/11/2018 16:24, Stephen Boyd wrote: Quoting Vivek Gautam (2018-11-27 02:11:41) @@ -1966,6 +1970,23 @@ static const struct of_device_id arm_smmu_of_match[] = { }; MODULE_DEVICE_TABLE(of, arm_smmu_of_match); +static void arm_smmu_fill_clk_data(struct arm_smmu_device *smmu, +

Re: [Freedreno] [PATCH v16 5/5] iommu/arm-smmu: Add support for qcom, smmu-v2 variant

to come ;) Either way I guess there's no real harm in having it. Reviewed-by: Robin Murphy }; struct arm_smmu_s2cr { @@ -1970,6 +1971,17 @@ ARM_SMMU_MATCH_DATA(arm_mmu401, ARM_SMMU_V1_64K, GENERIC_SMMU); ARM_SMMU_MATCH_DATA(arm_mmu500, ARM_SMMU_V2, ARM_MMU500); ARM_SMMU_MATCH_DATA

Re: [Freedreno] [PATCH v16 4/5] dt-bindings: arm-smmu: Add bindings for qcom, smmu-v2

On 30/08/18 15:45, Vivek Gautam wrote: Add bindings doc for Qcom's smmu-v2 implementation. Reviewed-by: Robin Murphy Signed-off-by: Vivek Gautam Reviewed-by: Tomasz Figa Tested-by: Srinivas Kandagatla --- .../devicetree/bindings/iommu/arm,smmu.txt | 39

Re: [Freedreno] [PATCH v16 3/5] iommu/arm-smmu: Add the device_link between masters and smmu

to the smmu. Reviewed-by: Robin Murphy Signed-off-by: Sricharan R Signed-off-by: Vivek Gautam Reviewed-by: Tomasz Figa Tested-by: Srinivas Kandagatla --- drivers/iommu/arm-smmu.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index

Re: [Freedreno] [PATCH v16 2/5] iommu/arm-smmu: Invoke pm_runtime during probe, add/remove device

are also initialized before enabling runtime pm as the runtime_resume() calls device_reset() which does tlb_sync_global() that ultimately requires locks to be initialized. To the best of my knowledge in this stuff (which is still not quite enough to be *truly* confident...), Reviewed-by: Robin

Re: [Freedreno] [PATCH v16 1/5] iommu/arm-smmu: Add pm_runtime/sleep ops

nable before devres does the clk_bulk_put(), however the probe error path is starting to look like it needs a bit of love in general, so I might just spin a cleanup patch on top (and even then only for the sake of not being a bad example; SMMU probe failure is never a realistic situation for t

Re: [Freedreno] [PATCH v16 2/5] iommu/arm-smmu: Invoke pm_runtime during probe, add/remove device

Hi Vivek, On 2018-09-25 6:56 AM, Vivek Gautam wrote: Hi Robin, Will, On Tue, Sep 18, 2018 at 8:41 AM Vivek Gautam wrote: Hi Robin, On Fri, Sep 7, 2018 at 3:52 PM Vivek Gautam wrote: On Fri, Sep 7, 2018 at 3:22 PM Tomasz Figa wrote: On Fri, Sep 7, 2018 at 6:38 PM Vivek Gautam wrote:

Re: [Freedreno] [PATCH v14 0/4] iommu/arm-smmu: Add runtime pm/sleep support

On 20/08/18 10:31, Tomasz Figa wrote: Hi Robin, On Fri, Jul 27, 2018 at 4:02 PM Vivek Gautam wrote: This series provides the support for turning on the arm-smmu's clocks/power domains using runtime pm. This is done using device links between smmu and client devices. The device link framework

Re: [Freedreno] [PATCH v14 4/4] iommu/arm-smmu: Add support for qcom, smmu-v2 variant

On 27/07/18 08:02, Vivek Gautam wrote: qcom,smmu-v2 is an arm,smmu-v2 implementation with specific clock and power requirements. This smmu core is used with multiple masters on msm8996, viz. mdss, video, etc. Add bindings for the same. Signed-off-by: Vivek Gautam Reviewed-by: Rob Herring

Re: [Freedreno] [PATCH 2/2] arm64: dts: sdm845: Add gpu and gmu device nodes

On 08/08/18 23:47, Jordan Crouse wrote: Add the nodes to describe the Adreno GPU and GMU devices. Signed-off-by: Jordan Crouse --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 121 +++ 1 file changed, 121 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi

Re: [Freedreno] [PATCH v13 1/4] iommu/arm-smmu: Add pm_runtime/sleep ops

On 26/07/18 08:12, Vivek Gautam wrote: On Wed, Jul 25, 2018 at 11:46 PM, Vivek Gautam wrote: On Tue, Jul 24, 2018 at 8:51 PM, Robin Murphy wrote: On 19/07/18 11:15, Vivek Gautam wrote: From: Sricharan R The smmu needs to be functional only when the respective master's using it are active

Re: [Freedreno] [PATCH v13 1/4] iommu/arm-smmu: Add pm_runtime/sleep ops

On 19/07/18 11:15, Vivek Gautam wrote: From: Sricharan R The smmu needs to be functional only when the respective master's using it are active. The device_link feature helps to track such functional dependencies, so that the iommu gets powered when the master device enables itself using

Re: [Freedreno] [PATCH v12 3/4] iommu/arm-smmu: Add the device_link between masters and smmu

On 18/07/18 10:30, Vivek Gautam wrote: On Wed, Jul 11, 2018 at 3:23 PM, Rafael J. Wysocki wrote: On Sunday, July 8, 2018 7:34:12 PM CEST Vivek Gautam wrote: From: Sricharan R Finally add the device link between the master device and smmu, so that the smmu gets runtime enabled/disabled only

Re: [Freedreno] [VERY RFC 0/2] iommu: optionally skip attaching to a DMA domain

On 11/04/18 19:55, Jordan Crouse wrote: I've been struggling with a problem for a while and I haven't been able to come up with a clean solution. Rob convinced me to stop complaining and do _something_ and hopefully this can spur a good discussion. The scenario is basically this: The MSM GPU

Re: [Freedreno] [PATCH 02/14] iommu/arm-smmu: Add support for TTBR1

On 21/02/18 22:59, Jordan Crouse wrote: Allow a SMMU device to opt into allocating a TTBR1 pagetable. The size of the TTBR1 region will be the same as the TTBR0 size with the sign extension bit set on the highest bit in the region unless the upstream size is 49 bits and then the sign-extension

Re: [Freedreno] [PATCH 01/14] iommu: Add DOMAIN_ATTR_ENABLE_TTBR1

On 21/02/18 22:59, Jordan Crouse wrote: Add a new domain attribute to enable the TTBR1 pagetable for drivers and devices that support it. This will enabled using a TTBR1 (otherwise known as a "global" or "system" pagetable for devices that support a split pagetable scheme for switching

Re: [Freedreno] [PATCH v7 6/6] drm/msm: iommu: Replace runtime calls with runtime suppliers

On 14/02/18 10:33, Vivek Gautam wrote: On Wed, Feb 14, 2018 at 2:46 PM, Tomasz Figa wrote: Adding Jordan to this thread as well. On Wed, Feb 14, 2018 at 6:13 PM, Vivek Gautam wrote: Hi Tomasz, On Wed, Feb 14, 2018 at 11:08 AM, Tomasz Figa

Re: [Freedreno] [PATCH v7 3/6] iommu/arm-smmu: Invoke pm_runtime during probe, add/remove device

On 13/02/18 08:24, Tomasz Figa wrote: Hi Vivek, Thanks for the patch. Please see my comments inline. On Wed, Feb 7, 2018 at 7:31 PM, Vivek Gautam wrote: From: Sricharan R The smmu device probe/remove and add/remove master device

Re: [Freedreno] [PATCH v7 1/6] base: power: runtime: Export pm_runtime_get/put_suppliers

On 13/02/18 07:44, Tomasz Figa wrote: Hi Vivek, On Wed, Feb 7, 2018 at 7:31 PM, Vivek Gautam wrote: The device link allows the pm framework to tie the supplier and consumer. So, whenever the consumer is powered-on the supplier is powered-on first. There are

Re: [Freedreno] [PATCH v6 4/6] iommu/arm-smmu: Add the device_link between masters and smmu

On 02/02/18 05:40, Sricharan R wrote: Hi Robin/Vivek, On 2/1/2018 2:23 PM, Vivek Gautam wrote: Hi, On 1/31/2018 6:39 PM, Robin Murphy wrote: On 19/01/18 11:43, Vivek Gautam wrote: From: Sricharan R <sricha...@codeaurora.org> Finally add the device link between the master device an

Re: [Freedreno] [PATCH v6 3/6] iommu/arm-smmu: Invoke pm_runtime during probe, add/remove device

On 19/01/18 11:43, Vivek Gautam wrote: From: Sricharan R The smmu device probe/remove and add/remove master device callbacks gets called when the smmu is not linked to its master, that is without the context of the master device. So calling runtime apis in those