On Tue, Nov 13, 2018 at 03:52:44PM -0500, Sean Paul wrote:
> From: Sean Paul
I neglected to add --cover-letter to send-email, so pasting my cover here
instead:
Hi all,
So I kept digging into the locking and dependencies around encoder/crtc and this
is the latest series to pop out. I th
From: Sean Paul
It's just for debug output, we don't need it
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 6 --
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 2 --
drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h | 14 --
3 files changed, 4 insertions
From: Sean Paul
Each time it's called we're holding the crtc modeset lock, so it's
redundant.
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 11 ---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 3 ---
2 files changed, 14 deletions(-)
diff --git a/drivers/gpu
From: Sean Paul
Matches dpu_crtc_enable and we'll need the old state in a future patch
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
b/drivers/gpu/drm/msm
From: Sean Paul
Instead of assigning/clearing the crtc on vblank enable/disable, we can
just assign and clear the crtc on modeset. That allows us to just toggle
the encoder's vblank interrupts on vblank_enable.
So why is this important? Previously the driver was using the legacy
pointers
From: Sean Paul
The drm_crtc_vblank_on/off calls in enable/disable guarantee that we
won't call this function when crtc is not enabled.
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm
From: Sean Paul
I think the intention here was to protect the enc->crtc access, but
that's insufficient to avoid enc->crtc changing. Fortunately we're
already holding the modeset lock when this is called (from
atomic_check), so remove the crtc_lock and add a modeset lock check.
While
From: Sean Paul
There are 4 times that _dpu_crtc_vblank_enable_no_lock() is called:
1- crtc enable
2- crtc disable
3- crtc vblank enable
4- crtc vblank disable
When we enable or disable the crtc, we call drm_crtc_vblank_on and
drm_crtc_vblank_off respectively. That will gate vblank enables
From: Sean Paul
The indirection of registering a callback and opaque pointer isn't real
useful when there's only one callsite. So instead of having the
vblank_cb registration, just give encoder a crtc and let it directly
call the vblank handler.
In a later patch, we'll make use of this further
From: Sean Paul
Now that runtime resume is handled in encoder, we don't need to worry
about crtc_lock recursion when calling pm_runtime_(get|put). So drop the
lock drops in _dpu_crtc_vblank_enable_no_lock().
Changes in v2:
- Added to patch series
Signed-off-by: Sean Paul
---
drivers/gpu/drm
gt;clk_config);
> > if (dpu_mdss->mmio)
> > devm_iounmap(>dev, dpu_mdss->mmio);
> > dpu_mdss->mmio = NULL;
> > -
> > - pm_runtime_disable(dev->dev);
> > priv->mdss = NULL;
> > }
> >
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Sean Paul, Software Engineer, Google / Chromium OS
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From: Sean Paul
power_events are only used for pm_runtime, and that's all handled in
dpu_kms. So just call vbif_init_memtypes at the correct times.
Changes in v2:
- Removed obsolete comment (Jeykumar)
Cc: Jeykumar Sankaran
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
On Mon, Nov 12, 2018 at 05:47:58PM -0800, Jeykumar Sankaran wrote:
> On 2018-11-12 11:42, Sean Paul wrote:
> > From: Sean Paul
> >
> > The crtc runtime resume doesn't actually operate on the crtc, but rather
> > its encoders. The problem with this is that we need to
On Mon, Nov 12, 2018 at 05:43:17PM -0800, Jeykumar Sankaran wrote:
> On 2018-11-12 11:42, Sean Paul wrote:
> > From: Sean Paul
> >
> > Add a bool to dpu_encoder_virt to track whether the encoder is enabled
> > or not. Repurpose the enc_lock mutex to ensure that it is
On Mon, Nov 12, 2018 at 05:20:28PM -0800, Jeykumar Sankaran wrote:
> On 2018-11-12 11:42, Sean Paul wrote:
> > From: Sean Paul
> >
> > Instead of registering through dpu_power_handle just to get a call on
> > runtime_resume, call the crtc function directly.
> &
From: Sean Paul
It's for legacy drivers, for atomic drivers crtc->state->encoder_mask
should be used to map encoder to crtc.
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 46
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 19 +++---
2
From: Sean Paul
Add modeset lock checks to functions that could be called outside the
core atomic stack.
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 2 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 1 +
2 files changed, 3 insertions(+)
diff --git a/drivers/gpu/drm
From: Sean Paul
This patch wraps dpu_core_perf_crtc_release_bw() with modeset locks
since it digs into the state objects.
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
b
From: Sean Paul
The crtc runtime resume doesn't actually operate on the crtc, but rather
its encoders. The problem with this is that we need to inspect the crtc
state to get the currently connected encoders. Since runtime resume
isn't guaranteed to be called while holding the modeset locks
From: Sean Paul
Add a bool to dpu_encoder_virt to track whether the encoder is enabled
or not. Repurpose the enc_lock mutex to ensure that it is consistent
with the hw state.
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 27 +
1 file changed
From: Sean Paul
enc_spinlock instead of enc_spin_lock.
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index
From: Sean Paul
Now that we don't have any event handlers, remove dpu_power_handle!
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/Makefile | 1 -
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 11 --
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 3 -
.../gpu/drm
From: Sean Paul
It's only used in core_perf, so stick it there (and change the name to
reflect that).
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 34 +--
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h | 17 --
drivers/gpu/drm/msm/disp
From: Sean Paul
It's needed for struct dss_module_power, and is currently being pulled
in by dpu_power_handle.h
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
b/drivers/gpu/drm
From: Sean Paul
It's unused
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 3 ---
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h | 5 -
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 1 -
3 files changed, 9 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp
From: Sean Paul
Instead of registering through dpu_power_handle just to get a call on
runtime_resume, call the crtc function directly.
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 23 ++-
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 10
From: Sean Paul
power_events are only used for pm_runtime, and that's all handled in
dpu_kms. So just call vbif_init_memtypes at the correct times.
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 21 +++--
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1
From: Sean Paul
There's only one client -- core, and it's only used for runtime pm which
is already refcounted.
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 22 +
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 -
.../gpu/drm/msm/disp/dpu1
From: Sean Paul
It's only used for debugfs, so just output the enum value instead.
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 6 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c | 14 --
drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.h
From: Sean Paul
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h | 21 -
1 file changed, 21 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
b/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
index 0c122e173892..7ab0ba8224f6 100644
From: Sean Paul
I started pulling a thread last week when looking at dpu locking. It led
me into the power_handle code and eventually runtime suspend/resume.
This set removes the power_handle stuff entirely. I'm sure it's more
useful when there are multiple clients/handles/events, but for our
; Cc: Liviu Dudau
> Cc: Brian Starkey
> Cc: Mali DP Maintainers
> Cc: Boris Brezillon
> Cc: Nicolas Ferre
> Cc: Alexandre Belloni
> Cc: Ludovic Desroches
> Cc: Maarten Lankhorst
> Cc: Maxime Ripard
> Cc: Sean Paul
> Cc: Jani Nikula
> Cc: Joonas Lahtinen
&
On Thu, Nov 08, 2018 at 01:03:03PM -0800, Jeykumar Sankaran wrote:
> On 2018-10-30 09:00, Sean Paul wrote:
> > From: Sean Paul
> >
> > This patch masks any pending flushes which have not been latched for a
> > commit. This will catch the case where an asynchron
gt; work object to encapsulate vblank event parameters.
>
> changes in v2:
> - subclass optimization on system wq (Sean Paul)
I wouldn't do it like this, tbh. One problem is that you've lost your flush() on
unbind, so there's no way to know if you have workers in the wild waiting
On Tue, Nov 06, 2018 at 02:36:26PM -0800, Jeykumar Sankaran wrote:
> To avoid any possible work queues to msm threads, clean up
> the threads after the CRTC objects are released in
> config cleanup.
>
> changes in v2:
> - fix race condition before kthread flush a
From: Sean Paul
Turning on CONFIG_DMA_API_DEBUG_SG results in the following error:
[ 12.078665] msm ae0.mdss: DMA-API: mapping sg segment longer than device
claims to support [len=3526656] [max=65536]
[ 12.089870] WARNING: CPU: 6 PID: 334 at
/mnt/host/source/src/third_party/kernel
stride = MSM_MEDIA_ALIGN(stride * 4/3, alignment);
> + stride = MSM_MEDIA_ALIGN(stride * 4/3, 256);
nit: Can you please surround the binary operators with spaces? This applies
everywhere in the patch.
With that,
Reviewed-by: Sean Paul
> break;
>
num dpu_3d_blend_mode
> dpu_encoder_helper_get_3d_blend_mode(
> dpu_cstate = to_dpu_crtc_state(phys_enc->parent->crtc->state);
>
> if (phys_enc->split_role == ENC_ROLE_SOLO &&
> - dpu_crtc_state_is_stereo(dpu_cstate))
> + (dpu_cstate->
; }
> -static void _dpu_plane_destroy_debugfs(struct drm_plane *plane)
> -{
> -}
> #endif
>
> static int dpu_plane_late_register(struct drm_plane *plane)
> @@ -1479,7 +1417,9 @@ static int dpu_plane_late_register(struct drm_plane
> *plane)
>
> static void dpu_plane_early_unregister(struct drm_plane *plane)
> {
> - _dpu_plane_destroy_debugfs(plane);
> + struct dpu_plane *pdpu = to_dpu_plane(plane);
> +
> + debugfs_remove_recursive(pdpu->debugfs_root);
> }
>
> static const struct drm_plane_funcs dpu_plane_funcs = {
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c
> index ff5091d2555d..ef753ea9c499 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c
> @@ -310,31 +310,25 @@ void dpu_vbif_init_memtypes(struct dpu_kms *dpu_kms)
> }
>
> #ifdef CONFIG_DEBUG_FS
> -void dpu_debugfs_vbif_destroy(struct dpu_kms *dpu_kms)
> -{
> - debugfs_remove_recursive(dpu_kms->debugfs_vbif);
> - dpu_kms->debugfs_vbif = NULL;
> -}
>
> -int dpu_debugfs_vbif_init(struct dpu_kms *dpu_kms, struct dentry
> *debugfs_root)
> +void dpu_debugfs_vbif_init(struct dpu_kms *dpu_kms, struct dentry
> *debugfs_root)
> {
> char vbif_name[32];
> - struct dentry *debugfs_vbif;
> + struct dentry *entry, *debugfs_vbif;
> int i, j;
>
> - dpu_kms->debugfs_vbif = debugfs_create_dir("vbif", debugfs_root);
> - if (!dpu_kms->debugfs_vbif) {
> - DPU_ERROR("failed to create vbif debugfs\n");
> - return -EINVAL;
> - }
> + entry = debugfs_create_dir("vbif", debugfs_root);
> + if (IS_ERR_OR_NULL(entry))
> + return;
>
> for (i = 0; i < dpu_kms->catalog->vbif_count; i++) {
> struct dpu_vbif_cfg *vbif = _kms->catalog->vbif[i];
>
> snprintf(vbif_name, sizeof(vbif_name), "%d", vbif->id);
>
> - debugfs_vbif = debugfs_create_dir(vbif_name,
> - dpu_kms->debugfs_vbif);
> + debugfs_vbif = debugfs_create_dir(vbif_name, entry);
> + if (IS_ERR_OR_NULL(debugfs_vbif))
> + continue;
>
> debugfs_create_u32("features", 0600, debugfs_vbif,
> (u32 *)>features);
> @@ -376,7 +370,5 @@ int dpu_debugfs_vbif_init(struct dpu_kms *dpu_kms, struct
> dentry *debugfs_root)
> (u32 *)>ot_limit);
> }
> }
> -
> - return 0;
> }
> #endif
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.h
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.h
> index f17af52dbbd5..6356876d7a66 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.h
> @@ -78,17 +78,6 @@ void dpu_vbif_clear_errors(struct dpu_kms *dpu_kms);
> */
> void dpu_vbif_init_memtypes(struct dpu_kms *dpu_kms);
>
> -#ifdef CONFIG_DEBUG_FS
> -int dpu_debugfs_vbif_init(struct dpu_kms *dpu_kms, struct dentry
> *debugfs_root);
> -void dpu_debugfs_vbif_destroy(struct dpu_kms *dpu_kms);
> -#else
> -static inline int dpu_debugfs_vbif_init(struct dpu_kms *dpu_kms,
> - struct dentry *debugfs_root)
> -{
> - return 0;
> -}
> -static inline void dpu_debugfs_vbif_destroy(struct dpu_kms *dpu_kms)
> -{
> -}
> -#endif
> +void dpu_debugfs_vbif_init(struct dpu_kms *dpu_kms, struct dentry
> *debugfs_root);
> +
> #endif /* __DPU_VBIF_H__ */
> --
> 2.18.0
>
--
Sean Paul, Software Engineer, Google / Chromium OS
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On Mon, Nov 05, 2018 at 04:30:59PM -0700, Jordan Crouse wrote:
> Allow the KMS operation 'irq_postinstall' to be optional
> so that the target display drivers don't need to define
> a dummy function if they don't need one.
>
> Signed-off-by: Jordan Crouse
Reviewe
> Additionally the postinstall hook isn't used even
> in dpu_core_irq.c so zap that entire path.
>
> Signed-off-by: Jordan Crouse
Nice!
Reviewed-by: Sean Paul
> ---
> drivers/gpu/drm/msm/Makefile | 1 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c | 15 +-
're in those functions remove unneeded
> initialization for a static variable.
>
> v2: Removed a cleanup intended for a different patch
>
> Signed-off-by: Jordan Crouse
Reviewed-by: Sean Paul
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.c | 10 +-
On Mon, Nov 05, 2018 at 04:30:57PM -0700, Jordan Crouse wrote:
> Remove some unused container_of() helper functions.
>
> v2: Retained still used helper functions in the name of readability
>
> Signed-off-by: Jordan Crouse
Reviewed-by: Sean Paul
> ---
> drivers/
rything down.
>
> Signed-off-by: Jordan Crouse
Reviewed-by: Sean Paul
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 17 ++---
> drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 9 -
> 2 files changed, 6 insertions(+), 20 deletions(-)
>
> diff -
On Mon, Nov 05, 2018 at 04:30:55PM -0700, Jordan Crouse wrote:
> dpu_crtc_get_mixer_height() is only used once and the value it
> returns can be easily derived from the calling function.
>
> Signed-off-by: Jordan Crouse
Reviewed-by: Sean Paul
> ---
> drivers/gpu/drm/msm/di
s_show_regset32, inode->i_private);
> -}
> -
> -static const struct file_operations dpu_fops_regset32 = {
> - .open = dpu_debugfs_open_regset32,
> - .read = seq_read,
> - .llseek = seq_lseek,
> - .release = single_release,
> -};
> +DEFINE_SHOW_ATTRIBUTE(dpu_debugfs_regset32);
>
> void dpu_debugfs_setup_regset32(struct dpu_debugfs_regset32 *regset,
> uint32_t offset, uint32_t length, struct dpu_kms *dpu_kms)
> @@ -245,7 +221,7 @@ void *dpu_debugfs_create_regset32(const char *name,
> umode_t mode,
> regset->offset = round_down(regset->offset, 4);
>
> return debugfs_create_file(name, mode, parent,
> - regset, _fops_regset32);
> + regset, _debugfs_regset32_fops);
> }
>
> static int _dpu_debugfs_init(struct dpu_kms *dpu_kms)
> --
> 2.18.0
>
--
Sean Paul, Software Engineer, Google / Chromium OS
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n't make any sense.
>
> v2: Moved some unrelated changes to another patch
>
> Signed-off-by: Jordan Crouse
Reviewed-by: Sean Paul
> ---
> drivers/gpu/drm/msm/Makefile |3 +-
> drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.c | 2393 -
> dri
> - clock-names: the following clocks are required:
> + For 10nm PHY:
> + * "iface"
> + * "ref"
> + For other PHYs:
>* "iface"
>For 28nm HPM/LP, 28nm 8960 PHYs:
> - vddio-supply: phandle to vdd-io regulator d
}
> +
> pll_10nm->phy_cmn_mmio = msm_ioremap(pdev, "dsi_phy", "DSI_PHY");
> if (IS_ERR_OR_NULL(pll_10nm->phy_cmn_mmio)) {
> dev_err(>dev, "failed to map CMN PHY base\n");
> --
> 2.19.1.930.g4563a
On Fri, Nov 02, 2018 at 04:38:48PM -0700, Jeykumar Sankaran wrote:
> On 2018-11-01 12:18, Sean Paul wrote:
> > On Wed, Oct 31, 2018 at 05:19:05PM -0700, Jeykumar Sankaran wrote:
> > > msm maintains a separate structure to define vblank
> > > work definitions and a lis
vm_kzalloc(dev->dev, sizeof(*dpu_mdss), GFP_KERNEL);
> + dpu_mdss = kzalloc(sizeof(*dpu_mdss), GFP_KERNEL);
> if (!dpu_mdss)
> return -ENOMEM;
>
> @@ -239,7 +241,7 @@ int dpu_mdss_init(struct drm_device *dev)
> irq_domain_error:
> msm_dss_put_clk(mp-&
ess a memory which is already freed. This
> results in kernel panic. Fix this by ensuring proper sequence
> of dpu destroy and disable calls.
>
> Changes in v2:
>- Removed double spacings [Jeykumar]
>
> Signed-off-by: Jayant Shekhar
Reviewed-by: Sean Paul
>
On Wed, Oct 10, 2018 at 10:15:59AM -0700, Chandan Uddaraju wrote:
> Add the needed DP PLL specific files to support
> display port interface on msm targets.
>
> The DP driver calls the DP PLL driver registration.
> The DP driver sets the link and pixel clock sources.
>
> Signed-off-by: Chandan
a/drivers/gpu/drm/msm/msm_drv.h
> +++ b/drivers/gpu/drm/msm/msm_drv.h
> @@ -77,12 +77,6 @@ enum msm_mdp_plane_property {
> PLANE_PROP_MAX_NUM
> };
>
> -struct msm_vblank_ctrl {
> - struct kthread_work work;
> - struct list_head event_list;
> - spinlock_t lock;
> -};
>
ivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h
> index 9d11f32..e81b1fa 100644
> --- a/drivers/gpu/drm/msm/msm_drv.h
> +++ b/drivers/gpu/drm/msm/msm_drv.h
> @@ -197,7 +197,7 @@ struct msm_drm_private {
> unsigned int num_crtcs;
> struct drm_crtc *crtcs[MAX_C
From: Sean Paul
This patch sprinkles a few async/legacy_cursor_update checks
through commit to ensure that cursor updates aren't blocked on vsync.
There are 2 main components to this, the first is that we don't want to
wait_for_commit_done in msm_atomic before returning from atomic_complete
From: Sean Paul
There exists a case where a flush of a plane/dma may have been triggered
& started from an async commit. If that plane/dma is subsequently disabled
by the next commit, the flush register will continue to hold the flush
bit for the disabled plane. Since the bit remains ac
From: Sean Paul
This patch masks any pending flushes which have not been latched for a
commit. This will catch the case where an asynchronous update is
nullified by a disable in the same frame.
Changes in v2:
- Added to the set
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1
On Tue, Oct 16, 2018 at 12:44 PM Daniel Vetter wrote:
>
> On Tue, Oct 16, 2018 at 11:52:45AM -0400, Sean Paul wrote:
> > From: Sean Paul
> >
> > It causes a WARN in drm_atomic_get_plane_state(), and is not used by
> > atomic (or dpu).
> >
> > Signed-
From: Sean Paul
It causes a WARN in drm_atomic_get_plane_state(), and is not used by
atomic (or dpu).
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
b/drivers/gpu/drm/msm/disp
error
> changes in v4:
> - Remove Change-Id (Sean Paul)
> - Keep logging within 80 char limit (Sean Paul)
>
> Signed-off-by: Jeykumar Sankaran
Reviewed-by: Sean Paul
I'll push to dpu-staging
Thanks!
Sean
> ---
> drivers/gpu/drm/msm/msm_drv.c | 49
>
On Wed, Oct 10, 2018 at 11:35:56AM -0700, Jeykumar Sankaran wrote:
> On 2018-10-10 07:29, Sean Paul wrote:
> > On Tue, Oct 09, 2018 at 10:46:41PM -0700, Jeykumar Sankaran wrote:
> > > On 2018-10-09 11:07, Sean Paul wrote:
> > > > On Mon, Oct 08, 2018 at 09:27:18PM
clock-names = "iface_clk", "ref_clk",
> + "cfg_ahb_clk", "pipe_clk";
> + clock-rate = <0>;
> +
> + };
> diff --git a/Documentation/devicetree/bindings/display/msm/dpu.txt
> b/Documentation/devicetree/bindings/display/msm/dpu.txt
> index ad2e883..ab2d1f6 100644
> --- a/Documentation/devicetree/bindings/display/msm/dpu.txt
> +++ b/Documentation/devicetree/bindings/display/msm/dpu.txt
> @@ -58,8 +58,9 @@ Required properties:
> Documentation/devicetree/bindings/graph.txt
> Documentation/devicetree/bindings/media/video-interfaces.txt
>
> - Port 0 -> DPU_INTF1 (DSI1)
> - Port 1 -> DPU_INTF2 (DSI2)
> + Port 0 -> DPU_INTF0 (DP)
> + Port 1 -> DPU_INTF1 (DSI1)
> + Port 2 -> DPU_INTF2 (DSI2)
>
> Optional properties:
> - assigned-clocks: list of clock specifiers for clocks needing rate
> assignment
> @@ -115,13 +116,20 @@ Example:
>
> port@0 {
> reg = <0>;
> - dpu_intf1_out: endpoint {
> - remote-endpoint = <_in>;
> + dpu_intf0_out: endpoint {
> + remote-endpoint = <_in>;
> };
> };
>
> port@1 {
> reg = <1>;
> + dpu_intf1_out: endpoint {
> + remote-endpoint = <_in>;
> + };
> + };
> +
> + port@2 {
> + reg = <2>;
> dpu_intf2_out: endpoint {
> remote-endpoint = <_in>;
> };
> --
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
>
--
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> int dpu_rm_reserve(struct dpu_rm *rm,
> struct drm_encoder *drm_enc,
> struct drm_crtc_state *crtc_state,
> - struct msm_display_topology topology,
> - bool test_only);
> + struct msm_display_topology topology);
>
On Mon, Oct 08, 2018 at 09:27:32PM -0700, Jeykumar Sankaran wrote:
> Get rid of hw block pointer in RM iter as we can
> access the same through dpu_hw_blk.
>
> Signed-off-by: Jeykumar Sankaran
Reviewed-by: Sean Paul
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 10 ++
gt; - TP_PROTO(uint32_t id, enum dpu_hw_blk_type type, uint32_t enc_id),
> - TP_ARGS(id, type, enc_id)
> + TP_PROTO(uint32_t id, enum dpu_hw_blk_type type),
> + TP_ARGS(id, type)
> );
> DEFINE_EVENT(dpu_rm_iter_template, dpu_rm_reserve_ctls,
> - TP_PROTO(uint32_t id, enum dpu_hw_blk_type type, uint32_t enc_id),
> - TP_ARGS(id, type, enc_id)
> + TP_PROTO(uint32_t id, enum dpu_hw_blk_type type),
> + TP_ARGS(id, type)
> );
>
> TRACE_EVENT(dpu_rm_reserve_lms,
> - TP_PROTO(uint32_t id, enum dpu_hw_blk_type type, uint32_t enc_id,
> - uint32_t pp_id),
> - TP_ARGS(id, type, enc_id, pp_id),
> + TP_PROTO(uint32_t id, enum dpu_hw_blk_type type, uint32_t pp_id),
> + TP_ARGS(id, type, pp_id),
> TP_STRUCT__entry(
> __field(uint32_t, id )
> __field(enum dpu_hw_blk_type, type)
> - __field(uint32_t, enc_id )
> __field(uint32_t, pp_id )
> ),
> TP_fast_assign(
> __entry->id = id;
> __entry->type = type;
> - __entry->enc_id = enc_id;
> __entry->pp_id = pp_id;
> ),
> - TP_printk("id:%d type:%d enc_id:%u pp_id:%u", __entry->id,
> - __entry->type, __entry->enc_id, __entry->pp_id)
> + TP_printk("id:%d type:%d pp_id:%u", __entry->id,
> + __entry->type, __entry->pp_id)
> );
>
> TRACE_EVENT(dpu_vbif_wait_xin_halt_fail,
> --
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
>
--
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of this flag.
>
> Signed-off-by: Jeykumar Sankaran
Reviewed-by: Sean Paul
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 19 +++
> 1 file changed, 3 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
On Mon, Oct 08, 2018 at 09:27:28PM -0700, Jeykumar Sankaran wrote:
> Now that we have crtc state tracking the reserved
> HW resources, we have access to them after atomic swap.
> So avoid reserving the resources in mode_set.
>
> Signed-off-by: Jeykumar Sankaran
Reviewe
On Mon, Oct 08, 2018 at 09:27:27PM -0700, Jeykumar Sankaran wrote:
> hw_mdp block is common for displays. No need
> to reserve per display.
>
> Signed-off-by: Jeykumar Sankaran
Reviewed-by: Sean Paul
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 7 ++-
> dri
On Mon, Oct 08, 2018 at 09:27:26PM -0700, Jeykumar Sankaran wrote:
> HW blocks reserved for a display are stored in crtc state.
> No one outside RM is interested in using these API's for
> HW block list iterations.
>
> Signed-off-by: Jeykumar Sankaran
Reviewed-by: Sean Paul
&
dpu_rm.h
> @@ -95,13 +95,13 @@ int dpu_rm_reserve(struct dpu_rm *rm,
> bool test_only);
>
> /**
> - * dpu_rm_reserve - Given the encoder for the display chain, release any
> + * dpu_rm_release - Given the encoder for the display chain, release any
> * HW b
On Tue, Oct 09, 2018 at 11:03:24PM -0700, Jeykumar Sankaran wrote:
> On 2018-10-09 12:57, Sean Paul wrote:
> > On Mon, Oct 08, 2018 at 09:27:41PM -0700, Jeykumar Sankaran wrote:
> > > Since HW reservations are happening through atomic_check
> > > and all the display comm
On Tue, Oct 09, 2018 at 11:15:02PM -0700, Jeykumar Sankaran wrote:
> On 2018-10-09 13:41, Sean Paul wrote:
> > On Mon, Oct 08, 2018 at 09:27:39PM -0700, Jeykumar Sankaran wrote:
> > > Instead of letting encoder make a centralized reservation for
> > > all of its displa
On Tue, Oct 09, 2018 at 10:46:41PM -0700, Jeykumar Sankaran wrote:
> On 2018-10-09 11:07, Sean Paul wrote:
> > On Mon, Oct 08, 2018 at 09:27:18PM -0700, Jeykumar Sankaran wrote:
> > > Layer mixer/pingpong block counts and hw ctl block counts
> > > will not be same
gt;topology);
> if (ret) {
> DPU_ERROR("unable to find appropriate CTL\n");
> return ret;
> }
>
> - ret = _dpu_rm_reserve_intf_related_hw(rm, enc->base.id, >hw_res);
> + ret = _dpu_rm_reserve_intf_related_hw(rm, enc->base.id, dpu_cstate,
> + >hw_res);
> if (ret)
> return ret;
>
> @@ -594,7 +611,6 @@ static int _dpu_rm_make_reservation(
> static int _dpu_rm_populate_requirements(
> struct dpu_rm *rm,
> struct drm_encoder *enc,
> - struct drm_crtc_state *crtc_state,
> struct dpu_rm_requirements *reqs,
> struct msm_display_topology req_topology)
> {
> @@ -642,6 +658,7 @@ int dpu_rm_reserve(
> bool test_only)
> {
> struct dpu_rm_requirements reqs;
> + struct dpu_crtc_state *dpu_cstate = to_dpu_crtc_state(crtc_state);
> int ret;
>
> /* Check if this is just a page-flip */
> @@ -653,14 +670,13 @@ int dpu_rm_reserve(
>
> mutex_lock(>rm_lock);
>
> - ret = _dpu_rm_populate_requirements(rm, enc, crtc_state, ,
> - topology);
> + ret = _dpu_rm_populate_requirements(rm, enc, , topology);
> if (ret) {
> DPU_ERROR("failed to populate hw requirements\n");
> goto end;
> }
>
> - ret = _dpu_rm_make_reservation(rm, enc, crtc_state, );
> + ret = _dpu_rm_make_reservation(rm, enc, dpu_cstate, );
> if (ret) {
> DPU_ERROR("failed to reserve hw resources: %d\n", ret);
> _dpu_rm_release_reservation(rm, enc->base.id);
> --
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
>
--
Sean Paul, Software Engineer, Google / Chromium OS
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}
>
> @@ -538,7 +529,7 @@ static int _dpu_rm_reserve_intf(
> }
>
> iter.blk->enc_id = enc_id;
> - trace_dpu_rm_reserve_intf(iter.blk->id, iter.blk->type,
> + trace_dpu_rm_reserve_intf(
From: Sean Paul
state->connector is just a backpointer to conn with the added risk of
state being NULL.
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
On Mon, Oct 08, 2018 at 09:27:22PM -0700, Jeykumar Sankaran wrote:
> Not actively used. Clean up the crtc mixer struct.
>
> Signed-off-by: Jeykumar Sankaran
Reviewed-by: Sean Paul
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 2 --
> drivers/gpu/drm/msm/disp/dpu1/dpu_
On Mon, Oct 08, 2018 at 09:27:21PM -0700, Jeykumar Sankaran wrote:
> Definition was removed already. Clean up header declaration.
>
> Signed-off-by: Jeykumar Sankaran
Reviewed-by: Sean Paul
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 8
> 1 file ch
On Mon, Oct 08, 2018 at 09:27:20PM -0700, Jeykumar Sankaran wrote:
> Not used. Remove from RM.
>
> Signed-off-by: Jeykumar Sankaran
Reviewed-by: Sean Paul
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 3 +--
> drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 7 ++-
>
ean
> - struct mutex rm_lock;
> };
>
> /**
> --
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
>
> ___
> Freedreno mailing list
> Freedreno@
pu1/dpu_trace.h | 28 +-
> drivers/gpu/drm/msm/msm_drv.h | 12 -
> 10 files changed, 322 insertions(+), 800 deletions(-)
>
> --
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
On Tue, Oct 09, 2018 at 11:43:25AM -0700, Jeykumar Sankaran wrote:
> On 2018-10-04 11:09, Sean Paul wrote:
> > From: Sean Paul
> >
> > We are currently leaking a drm_crtc_commit struct for every atomic
> > commit containing plane state. The dpu plane destroy fun
On Mon, Oct 08, 2018 at 06:38:11PM -0700, Abhinav Kumar wrote:
> On 2018-10-03 13:22, Sean Paul wrote:
> > From: Sean Paul
> >
> > Similar to the atomic helpers, we should enable vblank while we're
> > waiting for the commit to finish. DPU needs this, MDP5 see
From: Sean Paul
This patch uses the proper do_div() macro to perform u64 division and
guards against overflow if the result is too large for the unsigned long
return type
Fixes: a2c3c0a54d4c drm/msm/a6xx: Add devfreq support for a6xx
Cc: Sharat Masetty
Signed-off-by: Sean Paul
---
drivers
From: Sean Paul
A small fixup I posted with my v2 patch [1] that was dropped.
[1]- https://lists.freedesktop.org/archives/freedreno/2018-October/003647.html
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff
tch to patchset
>
> Signed-off-by: Bruce Wang
Alllright!
Reviewed-by: Sean Paul
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 39 +---
> 1 file changed, 1 insertion(+), 38 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.
on of dpu_kms_is_suspend_state and
> suspend_state to this patch
>
> Signed-off-by: Bruce Wang
Reviewed-by: Sean Paul
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 48 ++-
> drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 2 -
> drivers/gpu/drm/msm/disp/dpu1/dp
CONNECT flag is never set so periodic polling
> doesn't happen anyways.
>
> v2: reorganized patch order
> v3: made error checks less severe
>
> Signed-off-by: Bruce Wang
Reviewed-by: Sean Paul
> ---
> drivers/gpu/drm/msm/msm_drv.c | 27 ---
&
return to_dpu_kms(ddev_to_msm_kms(dev))->suspend_state != NULL;
> -}
> -
> /**
> * Debugfs functions - extra helper functions for debugfs support
> *
> --
> 2.19.0.605.g01d371f741-goog
>
--
Sean Paul, Software Engineer, Google / Chromium OS
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enabled )
> - __field(bool, suspend )
> __field(bool, vblank_requested )
> ),
> TP_fast_assign(
> __entry->drm_id = drm_id;
> __entry->enabl
On Fri, Oct 05, 2018 at 01:27:54PM -0400, Sean Paul wrote:
> On Fri, Oct 05, 2018 at 11:48:40AM -0400, Bruce Wang wrote:
> > PM resume was crashing during dpu_kms_pm_resume. This patch removes
> > dpu_kms_pm_suspend/resume so that msm_pm_suspend/resume uses the atomic
> > help
cs {
> void (*set_encoder_mode)(struct msm_kms *kms,
>struct drm_encoder *encoder,
>bool cmd_mode);
> - /* pm suspend/resume hooks */
> - int (*pm_suspend)(struct device *dev);
> - int (*pm_resume)(struct
locked since it is never called.
>
> Signed-off-by: Bruce Wang
Reviewed-by: Sean Paul
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 123
> drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 15 ---
> 2 files changed, 138 deletions(-)
>
> diff -
From: Sean Paul
This patch uses the proper do_div() macro to perform u64 division and
guards against overflow if the result is too large for the unsigned long
return type
Changes in v2:
- Added a6xx to the patch
- Removed parens from denominator in a5xx
Fixes: de0a3d094de0 drm/msm: re-factor
From: Sean Paul
This patch uses the proper do_div() macro to perform u64 division and
guards against overflow if the result is too large for the unsigned long
return type
Fixes: de0a3d094de0 drm/msm: re-factor devfreq code
Cc: Sharat Masetty
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm
From: Sean Paul
They're not needed.
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 13 +
1 file changed, 1 insertion(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
index
From: Sean Paul
We are currently leaking a drm_crtc_commit struct for every atomic
commit containing plane state. The dpu plane destroy function cleans up
the fb reference manually, but fails to release the commit ref. As a
result, we just keep allocating drm_crtc_commits without ever freeing
From: Sean Paul
Similar to the atomic helpers, we should enable vblank while we're
waiting for the commit to finish. DPU needs this, MDP5 seems to work
fine without it.
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/msm_atomic.c | 5 +
1 file changed, 5 insertions(+)
diff --git
On Tue, Oct 02, 2018 at 06:14:38PM -0700, Jeykumar Sankaran wrote:
> On 2018-10-01 13:29, Sean Paul wrote:
> > On Wed, Sep 26, 2018 at 11:51:35AM -0700, Jeykumar Sankaran wrote:
> > > On 2018-09-19 11:56, Sean Paul wrote:
> > > > From: Sean Paul
> > > >
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