Re: [Freedreno] [PATCH 2/7] drm/msm/dp: reduce link rate if failed at link training 1

2021-07-15 Thread Stephen Boyd
Quoting khs...@codeaurora.org (2021-07-09 10:46:41) > On 2021-07-08 00:33, Stephen Boyd wrote: > >> + > >> +static bool dp_ctrl_any_lane_cr_lose(struct dp_ctrl_private *ctrl, > >> + u8 *cr_status) > >> +{ > >> + int i; > >> + u8 status; > >> +

Re: [Freedreno] [PATCH 2/7] drm/msm/dp: reduce link rate if failed at link training 1

2021-07-09 Thread khsieh
On 2021-07-08 00:33, Stephen Boyd wrote: Quoting Kuogee Hsieh (2021-07-06 10:20:15) Reduce link rate and re start link training if link training 1 failed due to loss of clock recovery done to fix Link Layer CTS case 4.3.1.7. Also only update voltage and pre-emphasis swing level after link

Re: [Freedreno] [PATCH 2/7] drm/msm/dp: reduce link rate if failed at link training 1

2021-07-08 Thread Stephen Boyd
Quoting Kuogee Hsieh (2021-07-06 10:20:15) > Reduce link rate and re start link training if link training 1 > failed due to loss of clock recovery done to fix Link Layer > CTS case 4.3.1.7. Also only update voltage and pre-emphasis > swing level after link training started to fix Link Layer CTS >

[Freedreno] [PATCH 2/7] drm/msm/dp: reduce link rate if failed at link training 1

2021-07-06 Thread Kuogee Hsieh
Reduce link rate and re start link training if link training 1 failed due to loss of clock recovery done to fix Link Layer CTS case 4.3.1.7. Also only update voltage and pre-emphasis swing level after link training started to fix Link Layer CTS case 4.3.1.6. Signed-off-by: Kuogee Hsieh ---