On 5/15/2023 3:23 PM, Marijn Suijten wrote:
On 2023-05-15 15:03:46, Abhinav Kumar wrote:
On 5/15/2023 2:21 PM, Marijn Suijten wrote:
On 2023-05-12 11:00:22, Kuogee Hsieh wrote:
From: Abhinav Kumar
Add DSC 1.2 hardware blocks to the catalog with necessary sub-block and
feature flag inform
On 2023-05-15 15:03:46, Abhinav Kumar wrote:
> On 5/15/2023 2:21 PM, Marijn Suijten wrote:
> > On 2023-05-12 11:00:22, Kuogee Hsieh wrote:
> >>
> >> From: Abhinav Kumar
> >>
> >> Add DSC 1.2 hardware blocks to the catalog with necessary sub-block and
> >> feature flag information. Each display co
On 5/15/2023 3:03 PM, Abhinav Kumar wrote:
On 5/15/2023 2:21 PM, Marijn Suijten wrote:
On 2023-05-12 11:00:22, Kuogee Hsieh wrote:
From: Abhinav Kumar
Add DSC 1.2 hardware blocks to the catalog with necessary sub-block and
feature flag information. Each display compression engine (DCE)
On 5/15/2023 2:21 PM, Marijn Suijten wrote:
On 2023-05-12 11:00:22, Kuogee Hsieh wrote:
From: Abhinav Kumar
Add DSC 1.2 hardware blocks to the catalog with necessary sub-block and
feature flag information. Each display compression engine (DCE) contains
dual hard slice DSC encoders so both
By the way, can we replace "relevant chipsets" in the title with
"DPU >= 7.0" like the other titles?
- Marijn
On 2023-05-12 11:00:22, Kuogee Hsieh wrote:
On 2023-05-12 11:00:22, Kuogee Hsieh wrote:
>
> From: Abhinav Kumar
>
> Add DSC 1.2 hardware blocks to the catalog with necessary sub-block and
> feature flag information. Each display compression engine (DCE) contains
> dual hard slice DSC encoders so both share same base address but with
> it
From: Abhinav Kumar
Add DSC 1.2 hardware blocks to the catalog with necessary sub-block and
feature flag information. Each display compression engine (DCE) contains
dual hard slice DSC encoders so both share same base address but with
its own different sub block address.
changes in v4:
-- delet
