From: Dmitry Baryshkov <dmitry.barysh...@linaro.org>

[ Upstream commit c2949a49dfe960e952400029e14751dceff79d38 ]

Enable WB2 hardware block, enabling writeback support on this platform.

Signed-off-by: Dmitry Baryshkov <dmitry.barysh...@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhin...@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/570188/
Link: 
https://lore.kernel.org/r/20231203002743.1291956-3-dmitry.barysh...@linaro.org
Signed-off-by: Sasha Levin <sas...@kernel.org>
---
 .../drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h 
b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h
index 1709ba57f384..022b0408c24d 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h
@@ -31,6 +31,7 @@ static const struct dpu_mdp_cfg sm8350_mdp = {
                [DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },
                [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },
                [DPU_CLK_CTRL_DMA3] = { .reg_off = 0x2c4, .bit_off = 8 },
+               [DPU_CLK_CTRL_WB2] = { .reg_off = 0x2bc, .bit_off = 16 },
                [DPU_CLK_CTRL_REG_DMA] = { .reg_off = 0x2bc, .bit_off = 20 },
        },
 };
@@ -298,6 +299,21 @@ static const struct dpu_dsc_cfg sm8350_dsc[] = {
        },
 };
 
+static const struct dpu_wb_cfg sm8350_wb[] = {
+       {
+               .name = "wb_2", .id = WB_2,
+               .base = 0x65000, .len = 0x2c8,
+               .features = WB_SM8250_MASK,
+               .format_list = wb2_formats,
+               .num_formats = ARRAY_SIZE(wb2_formats),
+               .clk_ctrl = DPU_CLK_CTRL_WB2,
+               .xin_id = 6,
+               .vbif_idx = VBIF_RT,
+               .maxlinewidth = 4096,
+               .intr_wb_done = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 4),
+       },
+};
+
 static const struct dpu_intf_cfg sm8350_intf[] = {
        {
                .name = "intf_0", .id = INTF_0,
@@ -393,6 +409,8 @@ const struct dpu_mdss_cfg dpu_sm8350_cfg = {
        .dsc = sm8350_dsc,
        .merge_3d_count = ARRAY_SIZE(sm8350_merge_3d),
        .merge_3d = sm8350_merge_3d,
+       .wb_count = ARRAY_SIZE(sm8350_wb),
+       .wb = sm8350_wb,
        .intf_count = ARRAY_SIZE(sm8350_intf),
        .intf = sm8350_intf,
        .vbif_count = ARRAY_SIZE(sdm845_vbif),
-- 
2.43.0

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