> > - In gcc/config/mips/mips.c:mips_compute_frame_info() you do
> >
> > /* Move above the GPR save area. */
> > if (frame->num_gp > 0)
> > {
> > offset += MIPS_STACK_ALIGN (frame->num_gp * UNITS_PER_WORD);
> > frame->gp_sp_offset = offset - UNITS_PER_WORD;
Snapshot gcc-4.2-20080528 is now available on
ftp://gcc.gnu.org/pub/gcc/snapshots/4.2-20080528/
and on various mirrors, see http://gcc.gnu.org/mirrors.html for details.
This snapshot has been generated from the GCC 4.2 SVN branch
with the following options: svn://gcc.gnu.org/svn/gcc/branches
Richard Sandiford wrote:
Andy H <[EMAIL PROTECTED]> writes:
If L_R_A does nothing with it,
the normal reload handling will first try:
(const:HI (plus:HI (symbol_ref:HI ("chk_fail_buf") (const_int 2
This worked just as your described after I added test of
reg_equiv_constant[] inside L_
Masao Uebayashi <[EMAIL PROTECTED]> writes:
> - In gcc/config/mips/mips.c:mips_compute_frame_info() you do
>
> /* Move above the GPR save area. */
> if (frame->num_gp > 0)
> {
> offset += MIPS_STACK_ALIGN (frame->num_gp * UNITS_PER_WORD);
> frame->
[EMAIL PROTECTED] writes:
> I have copied Anatoly for comment, and I promise to revisit this again
> after reviewing reload capabilities.
Thanks.
Looking back, my message sounded like I was holding you personally
responsible for the current AVR macro. Didn't mean to do that ;)
Richard
Richard,
I appreciate the extra input.
I agree with what you say. The target should not be doing middle-end
stuff .
The inc/dec and (Rxx) != (frame pointer) parts just reload using
pointer class
which is a one extra register than base pointers but the extra reg
cannot take offset.
Howe
Andy H <[EMAIL PROTECTED]> writes:
>> If L_R_A does nothing with it,
>> the normal reload handling will first try:
>>
>> (const:HI (plus:HI (symbol_ref:HI ("chk_fail_buf") (const_int 2
>>
>
> This worked just as your described after I added test of
> reg_equiv_constant[] inside L_R_A .
>
On Wed, May 28, 2008 at 08:15:20PM +0200, Richard Guenther wrote:
> On Wed, May 28, 2008 at 7:13 PM, Joe Buck <[EMAIL PROTECTED]> wrote:
> > On Tue, May 27, 2008 at 09:11:18PM -0400, NightStrike wrote:
> >> On 5/27/08, Joe Buck <[EMAIL PROTECTED]> wrote:
> >> > A third alternative is to issue a sna
On Wed, May 28, 2008 at 7:13 PM, Joe Buck <[EMAIL PROTECTED]> wrote:
> On Tue, May 27, 2008 at 09:11:18PM -0400, NightStrike wrote:
>> On 5/27/08, Joe Buck <[EMAIL PROTECTED]> wrote:
>> > A third alternative is to issue a snapshot (at whatever time interval
>> > is chosen) iff there's been a checki
> If i read this right, it says it was a pass, and is now an XFAIL?
Yes.
> If so, that is the expected result of Richi's patch, and he
> mentioned it when he changed it to xfail
Ok.
On Tue, May 27, 2008 at 09:11:18PM -0400, NightStrike wrote:
> On 5/27/08, Joe Buck <[EMAIL PROTECTED]> wrote:
> > A third alternative is to issue a snapshot (at whatever time interval
> > is chosen) iff there's been a checkin on the branch.
>
> I thought that's how it worked already.
No, a new 4
hrough just today...
>
> --- Start of forwarded message ---
> Date: Wed, 28 May 2008 09:23:10 -0400
> From: DJ Delorie <[EMAIL PROTECTED]>
> To: [EMAIL PROTECTED]
> Subject: Results for 4.4.0 20080528 (experimental) [trunk revision 136068]
> (GCC) testsuite on v850-unknown-elf
Gerald Pfeifer wrote:
At this point, we have three open release branches (4.1, 4.2, and 4.3)
and trunk. Currently we are generating weekly snapshots for all four
of these.
I agree that turning off the 4.1 snapshots makes sense. If you're
sufficiently motivated to do the automatic
snapshot-o
Sorry, bad proofreading. The #4 example should read:
struct copy { char buf[128]; };
#define copyof(str) &({ struct copy cp; strcpy(cp.buf, str); cp; }).buf[0]
int main(int argc, char **argv) {
printf("%s %s\n", copyof("hello"), copyof("world"));
}
-Original Message-
>From: Jama
Hello. I have some complex statement-expressions that I am having trouble with
and this seemed like the more technical mailing list. I have boiled them down
to these small examples:
#1:
#define copyof(str) ({ char buf[sizeof(str)]; strcpy(buf, str); buf; })
int main(int argc, char **argv) {
Same regression, but m32c is overall better since yesterday :-)
--- Start of forwarded message ---
Date: Wed, 28 May 2008 06:57:46 -0400
From: DJ Delorie <[EMAIL PROTECTED]>
To: [EMAIL PROTECTED]
Subject: Results for 4.4.0 20080528 (experimental) [trunk revision 136068]
(GCC) tes
This regression came through just today...
--- Start of forwarded message ---
Date: Wed, 28 May 2008 09:23:10 -0400
From: DJ Delorie <[EMAIL PROTECTED]>
To: [EMAIL PROTECTED]
Subject: Results for 4.4.0 20080528 (experimental) [trunk revision 136068]
(GCC) testsuite on v850-unkno
Hello all,
The target that i am working on is 16bit, big endian and with 16 registers.
It has this particular addressing mode
load Rd, Ra[offset]
store Rs, Ra[offset]
where the offset should be positive, base register Ra should be an
even register and for the source or the destination register R
hello,
The documentation for -fno-branch-count-reg explains that a
dec-and-test-branch instruction is replaced by an equivalent sequence of
instruction that decrement a register, compare it against 0, and branch.
(see the use of the world *instead*)
This is not really true, since this option
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