Re: how to initialize a pointer using data page mode

2010-10-18 Thread Ian Lance Taylor
Phung Nguyen writes: > Is there any way to change the compilation of a declaration? > char *s = "abc"; > compiled into >.section .rodata > .LCO: >.ascii "abc\0"; >.section .data >.align 1 > _s: >.long .LCO > I would like to change the last line in the above

Re: how to initialize a pointer using data page mode

2010-10-18 Thread Phung Nguyen
Hi all, Is there any way to change the compilation of a declaration? char *s = "abc"; compiled into .section .rodata .LCO: .ascii "abc\0"; .section .data .align 1 _s: .long .LCO I would like to change the last line in the above generated code. What is the hook wh

Re: Constant initializers

2010-10-18 Thread Richard Henderson
On 10/18/2010 02:04 PM, Matt Fischer wrote: > I'm attempting to port some code to gcc, and in a couple of places > it's using a construct that it doesn't like. A simplified example is > the following (this is in global scope): > > static const int A = 1; > static const int B = A; > > This compil

Re: Constant initializers

2010-10-18 Thread Jonathan Wakely
On 18 October 2010 22:04, Matt Fischer wrote: > I'm attempting to port some code to gcc, and in a couple of places > it's using a construct that it doesn't like.  A simplified example is > the following (this is in global scope): > > static const int A = 1; > static const int B = A; > > This compil

Constant initializers

2010-10-18 Thread Matt Fischer
I'm attempting to port some code to gcc, and in a couple of places it's using a construct that it doesn't like. A simplified example is the following (this is in global scope): static const int A = 1; static const int B = A; This compiles fine with g++, but gcc says "error: initializer element i

Re: define_peepholes in mn10300

2010-10-18 Thread Paolo Bonzini
It's been a long time since I dealt with this aspect of porting, but isn't it the case that most ports don't expose branch-on-carry-set branch-on-carry-clear? It looks like the mn103 was recently changed to not use cc0, which is definitely a good thing. I'm not sure offhand the best way to recode

Re: Questions about selective scheduler and PowerPC

2010-10-18 Thread Jeff Law
On 10/18/10 09:22, David Edelsohn wrote: On Mon, Oct 18, 2010 at 8:27 AM, Nathan Froyd wrote: On Mon, Oct 18, 2010 at 02:49:21PM +0800, Jie Zhang wrote: 3. The aforementioned rs6000 hack rs6000_issue_rate was added by 2003-03-03 David Edelsohn * config/rs6000/rs6000.c (rs6000_mult

Re: Questions about selective scheduler and PowerPC

2010-10-18 Thread David Edelsohn
On Mon, Oct 18, 2010 at 8:27 AM, Nathan Froyd wrote: > On Mon, Oct 18, 2010 at 02:49:21PM +0800, Jie Zhang wrote: >> 3. The aforementioned rs6000 hack rs6000_issue_rate was added by >> >> 2003-03-03  David Edelsohn   >> >>         * config/rs6000/rs6000.c (rs6000_multipass_dfa_lookahead): Delete.

Re: -isysroot option ignored for crosscompiler?

2010-10-18 Thread Kai Ruottu
16.10.2010 14:58, Uros Bizjak kirjoitti: Trying to use --with-build-sysroot configure option, the build failed with "error: no include path in which to search for ..." error. This problem come down to the fact, that -isysroot is ignored when crosscompiling: Crosscompiler does not handle -isysr

Re: secondary reload via 2 intermediary registers

2010-10-18 Thread Jeff Law
On 09/30/10 03:04, Alex Turjan wrote: Hi, I have 3 questions regarding secondary reload: 1.Is it possible to do the secondary reload via 2 intermediary registers? As far as I can see the insn that implements the secondary reload has to have 3 operands. Make the scratch/intermediary register do

Re: define_peepholes in mn10300

2010-10-18 Thread Jeff Law
On 08/09/10 07:28, Steven Bosscher wrote: Hi Jeff, I'm looking at the remaining text peepholes (define_peephole instead of define_peephole2) and I have a few questions about mn10300, that you are a maintainer of. I've been out on FMLA, so sorry for the late response... The first peephole is

Re: Questions about selective scheduler and PowerPC

2010-10-18 Thread Nathan Froyd
On Mon, Oct 18, 2010 at 02:49:21PM +0800, Jie Zhang wrote: > 3. The aforementioned rs6000 hack rs6000_issue_rate was added by > > 2003-03-03 David Edelsohn > > * config/rs6000/rs6000.c (rs6000_multipass_dfa_lookahead): Delete. > (TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD

Re: Questions about selective scheduler and PowerPC

2010-10-18 Thread Andrey Belevantsev
On 18.10.2010 11:31, Jie Zhang wrote: Hi Andrey, On 10/18/2010 03:13 PM, Andrey Belevantsev wrote: Hi Jie, On 18.10.2010 10:49, Jie Zhang wrote: When this error happens, FENCE_ISSUED_INSNS (fence) is 2 and issue_rate is 1. PowerPC 8540 is capable to issue 2 instructions in one cycle, but rs6

Re: Questions about selective scheduler and PowerPC

2010-10-18 Thread Jie Zhang
Hi Andrey, On 10/18/2010 03:13 PM, Andrey Belevantsev wrote: Hi Jie, On 18.10.2010 10:49, Jie Zhang wrote: When this error happens, FENCE_ISSUED_INSNS (fence) is 2 and issue_rate is 1. PowerPC 8540 is capable to issue 2 instructions in one cycle, but rs6000_issue_rate lies to scheduler that i

Re: Questions about selective scheduler and PowerPC

2010-10-18 Thread Andrey Belevantsev
Hi Jie, On 18.10.2010 10:49, Jie Zhang wrote: When this error happens, FENCE_ISSUED_INSNS (fence) is 2 and issue_rate is 1. PowerPC 8540 is capable to issue 2 instructions in one cycle, but rs6000_issue_rate lies to scheduler that it can only issue 1 instruction before register relocation is do