Hi,
I've followed the instructions to request access to the GCC compile
farm (https://gcc.gnu.org/wiki/CompileFarm#How_to_Get_Involved.3F) but
heard nothing for two weeks, despite a ping. Are the instructions
still correct? Is there anyone else I can contact about it?
Thanks,
Jay.
Hi,
I have read ira/lra code for a while, but still fails to understand
their relationship. The main question is why ira do color so early?
lra pass will do the assignment anyway. Sorry if I mess up coloring
and hard register assignment, but I think it's better to get job
done a
On 09/12/14 20:37, lin zuojian wrote:
> Hi,
> I have read ira/lra code for a while, but still fails to understand
> their relationship. The main question is why ira do color so early?
> lra pass will do the assignment anyway. Sorry if I mess up coloring
> and hard register assignmen
Hi Kugan,
I have read these pdfs. My question is LRA will change the insns, so
why brother do the coloring so early. Changing the insns can
generates new pseudo registers, so they needs to re-assign. Is that
correct?
--
Thanks Kugan
On Tue, Dec 09, 2014 at 09:08:46PM +1100, Kugan w
Moreover, LRA assignment does not refer to the assignment result of ira
directly. In find_hard_regno_for, the value of hard_regno comes from
ira_class_hard_regs[rclass][i] with least cost.
On Tue, Dec 09, 2014 at 06:14:29PM +0800, lin zuojian wrote:
> Hi Kugan,
> I have read these pdfs. My qu
On 09/12/14 21:14, lin zuojian wrote:
> Hi Kugan,
> I have read these pdfs. My question is LRA will change the insns, so
> why brother do the coloring so early. Changing the insns can
> generates new pseudo registers, so they needs to re-assign. Is that
> correct?
Hi,
IRA's job he
This was for x86_64-apple-darwin14. The patch also works for
x86_64-apple-darwin10.
Dominique
> Le 6 déc. 2014 à 01:49, Dominique d'Humières a écrit :
>
> Bootstrap just finished with the patch.
>
> Thanks,
>
> Dominique
On 12/09/2014 04:37 AM, lin zuojian wrote:
> Hi,
> I have read ira/lra code for a while, but still fails to understand
> their relationship. The main question is why ira do color so early?
> lra pass will do the assignment anyway. Sorry if I mess up coloring
> and hard register assi
On 12/09/14 10:10, Vladimir Makarov wrote:
generate the correct code in many cases even for x86. Jeff Law tried
IRA coloring reusage too for reload but whole RA became slower (although
he achieved performance improvements on x86).
Right. After IRA was complete, I'd walk over the unallocated all
On 09-Dec-14 07:56 PM, Jeff Law wrote:
On 12/09/14 10:10, Vladimir Makarov wrote:
generate the correct code in many cases even for x86. Jeff Law tried
IRA coloring reusage too for reload but whole RA became slower (although
he achieved performance improvements on x86).
Right. After IRA was com
On 12/09/14 14:48, shmeel gutl wrote:
On 09-Dec-14 07:56 PM, Jeff Law wrote:
On 12/09/14 10:10, Vladimir Makarov wrote:
generate the correct code in many cases even for x86. Jeff Law tried
IRA coloring reusage too for reload but whole RA became slower (although
he achieved performance improvem
On 12/04/2014 01:54 AM, Richard Biener wrote:
> Apart from what Joseph already said using 'sizetype' in the middle-end
> for sizes and offsets is really really deep-rooted into the compiler.
> What you see above is one aspect - POINTER_PLUS_EXPR offsets
> are forced to have sizetype type. But you'
Thanks Vladimir & Jeff & Kugan. Combining the replies I get a better
view of RA problem.
--
Lin Zuojian
On Tue, Dec 09, 2014 at 12:10:29PM -0500, Vladimir Makarov wrote:
> On 12/09/2014 04:37 AM, lin zuojian wrote:
> > Hi,
> > I have read ira/lra code for a while, but still fails to understand
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