Re: [RFC][PATCH][X86_64] Eliminate PLT stubs for specified external functions via -fno-plt=

2015-05-22 Thread Sriraman Tallam
On Fri, May 22, 2015 at 2:00 AM, Pedro Alves pal...@redhat.com wrote: On 05/21/2015 11:02 PM, Sriraman Tallam wrote: On Thu, May 21, 2015 at 2:51 PM, Pedro Alves pal...@redhat.com wrote: On 05/21/2015 10:12 PM, Sriraman Tallam wrote: My original proposal, for x86_64 only, was to add

Re: [patch] libstdc++/66017 Avoid bad casts and fix alignment of _Rb_tree_nodelong long::_M_storage

2015-05-22 Thread Jonathan Wakely
On 22/05/15 16:29 +0200, Jakub Jelinek wrote: On Fri, May 22, 2015 at 03:15:10PM +0100, Jonathan Wakely wrote: --- a/libstdc++-v3/include/ext/aligned_buffer.h +++ b/libstdc++-v3/include/ext/aligned_buffer.h @@ -31,21 +31,23 @@ #pragma GCC system_header -#if __cplusplus = 201103L -# include

Re: [patch] libstdc++/66017 Avoid bad casts and fix alignment of _Rb_tree_nodelong long::_M_storage

2015-05-22 Thread Jonathan Wakely
On 22/05/15 17:13 +0200, Jakub Jelinek wrote: On Fri, May 22, 2015 at 03:59:47PM +0100, Jonathan Wakely wrote: + alignas(alignof(_Tp2)) unsigned char _M_storage[sizeof(_Tp)]; Is alignof(_Tp2) always the same as alignof(_Tp2::_M_t) on all targets (I mean, won't some target align the

Re: [5/9] Create sensible dummy registers

2015-05-22 Thread Richard Sandiford
Eric Botcazou ebotca...@adacore.com writes: Some pieces of code create a temporary REG or MEM and only fill it in later when they're testing the cost of a particular rtx. This patch makes sure that even the dummy REG or MEM is valid, rather than force the gen_* code to handle garbage values.

[Bug c++/65598] Fix column location for 'explicit'

2015-05-22 Thread paolo.carlini at oracle dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65598 Paolo Carlini paolo.carlini at oracle dot com changed: What|Removed |Added Status|ASSIGNED|RESOLVED

Re: [patch] libstdc++/66017 Avoid bad casts and fix alignment of _Rb_tree_nodelong long::_M_storage

2015-05-22 Thread Jakub Jelinek
On Fri, May 22, 2015 at 03:15:10PM +0100, Jonathan Wakely wrote: --- a/libstdc++-v3/include/ext/aligned_buffer.h +++ b/libstdc++-v3/include/ext/aligned_buffer.h @@ -31,21 +31,23 @@ #pragma GCC system_header -#if __cplusplus = 201103L -# include type_traits -#else +#if __cplusplus

[Bug target/65491] [aarch64] ICE: in emit_move_insn, at expr.c:3609

2015-05-22 Thread ktkachov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65491 --- Comment #3 from ktkachov at gcc dot gnu.org --- Author: ktkachov Date: Fri May 22 14:36:27 2015 New Revision: 223577 URL: https://gcc.gnu.org/viewcvs?rev=223577root=gccview=rev Log: [AArch64] PR target/65491: Classify V1TF vectors as AAPCS64

Fix PR66251 (wrong code with strided group stores)

2015-05-22 Thread Michael Matz
Hi, between Richis improvements of grouped accesses, and mine to strided stores is an interaction that now leads to ICEs and wrong code after both are in, for instance PR66251. The added testcases reflects this situation, and uses both, narrowing and widening (narrowing would still ICE,

Re: [patch] libstdc++/66017 Avoid bad casts and fix alignment of _Rb_tree_nodelong long::_M_storage

2015-05-22 Thread Jakub Jelinek
On Fri, May 22, 2015 at 03:59:47PM +0100, Jonathan Wakely wrote: + alignas(alignof(_Tp2)) unsigned char _M_storage[sizeof(_Tp)]; Is alignof(_Tp2) always the same as alignof(_Tp2::_M_t) on all targets (I mean, won't some target align the structure more than its only field)? Hmm, maybe.

Re: Fwd: PING^3: [PATCH]: New configure options that make the compiler use -fPIE and -pie as default option

2015-05-22 Thread H.J. Lu
I fixed a typo in gcc/config/openbsd.h. Here is the updated patch. The whole patch is also on hjl/pie/master branch in GCC git mirror. -- H.J. From 64364101d6c888e20eb1146ee2baac4b08e684cf Mon Sep 17 00:00:00 2001 From: H.J. Lu hjl.to...@gmail.com Date: Tue, 19 May 2015 10:12:20 -0700 Subject:

[Bug c++/65750] [4.9/5 Regression] misinterpret in a virtual member function with a C++11 style function signature

2015-05-22 Thread paolo.carlini at oracle dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65750 Paolo Carlini paolo.carlini at oracle dot com changed: What|Removed |Added CC|

[Bug middle-end/66253] [6 Regression] 459.GemsFDTD in SPEC CPU 2006 is miscompiled

2015-05-22 Thread hjl.tools at gmail dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66253 --- Comment #4 from H.J. Lu hjl.tools at gmail dot com --- (In reply to Michael Matz from comment #3) Can you check if the patch at https://gcc.gnu.org/ml/gcc-patches/2015-05/msg02133.html helps also gemsfdtd? I tried and I still got

Re: Mostly rewrite genrecog

2015-05-22 Thread Andreas Krebbel
On 05/17/2015 11:12 PM, Richard Sandiford wrote: Andreas Krebbel kreb...@linux.vnet.ibm.com writes: Hi Richard, I see regressions with the current IBM z13 vector patchset which appear to be related to the new genrecog. The following two insn definitions only differ in the mode and

[Bug middle-end/66253] [6 Regression] 459.GemsFDTD in SPEC CPU 2006 is miscompiled

2015-05-22 Thread matz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66253 Michael Matz matz at gcc dot gnu.org changed: What|Removed |Added Assignee|unassigned at gcc dot gnu.org |matz at gcc

Fix hppa_legitimize_address's handling of ASHIFT/MULT sequences

2015-05-22 Thread Jeff Law
The insns generated by hppa_legitimize_address for shift-add calculations are never directly inserted into a MEM -- they're loaded into a register first which may or may not be later combined into a memory reference. So... We should be using the ASHIFT form rather than the MULT form for

[Bug tree-optimization/48052] loop not vectorized if index is unsigned int

2015-05-22 Thread hiraditya at msn dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=48052 --- Comment #13 from AK hiraditya at msn dot com --- We have an updated patch that works for both the cases. https://gcc.gnu.org/ml/gcc-patches/2015-05/msg01991.html

[Bug c++/65815] brace elision doesn't work in NSDMI

2015-05-22 Thread paolo.carlini at oracle dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65815 Paolo Carlini paolo.carlini at oracle dot com changed: What|Removed |Added Status|NEW |ASSIGNED

Re: [PATCH] Fix memory orders description in atomic ops built-ins docs.

2015-05-22 Thread Matthew Wahab
On 21/05/15 19:26, Torvald Riegel wrote: On Thu, 2015-05-21 at 16:45 +0100, Matthew Wahab wrote: On 19/05/15 20:20, Torvald Riegel wrote: On Mon, 2015-05-18 at 17:36 +0100, Matthew Wahab wrote: Hello, On 15/05/15 17:22, Torvald Riegel wrote: This patch improves the documentation of the

[Bug libstdc++/66017] Undefined behaviour in std::setlong long

2015-05-22 Thread redi at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66017 Jonathan Wakely redi at gcc dot gnu.org changed: What|Removed |Added Status|UNCONFIRMED |ASSIGNED

[Bug middle-end/66253] [6 Regression] 459.GemsFDTD in SPEC CPU 2006 is miscompiled

2015-05-22 Thread matz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66253 --- Comment #5 from Michael Matz matz at gcc dot gnu.org --- (In reply to H.J. Lu from comment #4) I tried and I still got Running Benchmarks Running 459.GemsFDTD ref peak lnx32e-gcc default *** Miscompare of sphere_td.nft; for details

[Bug c/66240] RFE: extend -falign-xyz syntax

2015-05-22 Thread josh at joshtriplett dot org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66240 Josh Triplett josh at joshtriplett dot org changed: What|Removed |Added CC||josh at

[PATCH] Print Pass Names

2015-05-22 Thread Aditya K
Currently, when we print the passes it does not print its name. This becomes confusing when we want to print all the passes at once (e.g., -fdump-tree-all-all=stderr pass.dump). This patch adds functionality to print the pass name. It passes bootstrap (with default configurations). Hope this

Re: [Patch libstdc++] Rewrite cpu/generic/atomic_word.h

2015-05-22 Thread Torvald Riegel
On Fri, 2015-05-22 at 12:37 +0100, Ramana Radhakrishnan wrote: Hi, While writing atomic_word.h for the ARM backend to fix PR target/66200 I thought it would make more sense to write it all up with atomic primitives instead of providing various fragile bits of inline asssembler. Thus

Re: [patch] libstdc++/66017 Avoid bad casts and fix alignment of _Rb_tree_nodelong long::_M_storage

2015-05-22 Thread Martin Sebor
On 05/22/2015 09:13 AM, Jakub Jelinek wrote: On Fri, May 22, 2015 at 03:59:47PM +0100, Jonathan Wakely wrote: + alignas(alignof(_Tp2)) unsigned char _M_storage[sizeof(_Tp)]; Is alignof(_Tp2) always the same as alignof(_Tp2::_M_t) on all targets (I mean, won't some target align the

Re: Mostly rewrite genrecog

2015-05-22 Thread Richard Sandiford
Andreas Krebbel kreb...@linux.vnet.ibm.com writes: On 05/17/2015 11:12 PM, Richard Sandiford wrote: Andreas Krebbel kreb...@linux.vnet.ibm.com writes: Hi Richard, I see regressions with the current IBM z13 vector patchset which appear to be related to the new genrecog. The following two

Re: Fix PR66251 (wrong code with strided group stores)

2015-05-22 Thread Richard Biener
On May 22, 2015 5:13:16 PM GMT+02:00, Michael Matz m...@suse.de wrote: Hi, between Richis improvements of grouped accesses, and mine to strided stores is an interaction that now leads to ICEs and wrong code after both are in, for instance PR66251. The added testcases reflects this situation,

[Bug libstdc++/53477] pretty printer fails with: Python Exception type 'exceptions.IndexError' list index out of range

2015-05-22 Thread redi at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=53477 Jonathan Wakely redi at gcc dot gnu.org changed: What|Removed |Added Status|UNCONFIRMED |WAITING Last

Re: [patch, testsuite, ARM] don't try to execute advsimd-intrinsics tests on hardware without NEON

2015-05-22 Thread Ramana Radhakrishnan
On 21/05/15 06:33, Sandra Loosemore wrote: ARM testing shares the AArch64 advsimd-intrinsics execution tests. On ARM, though, the NEON support being tested is optional -- some arches are compatible with the NEON compilation options but hardware available for testing might or might not be able

[C++ Patch] PR 65815

2015-05-22 Thread Paolo Carlini
Hi, surprisingly, for NSDMIs we don't use reshape_init and we end-up rejecting simple testcases like the below. It seems clear to me that we should - consistently with the comment preceding digest_init too - but I'm not 100% sure that digest_nsdmi_init is the best place for that. Anyway, the

[Bug fortran/61831] [4.9/ 5 Regression] runtime error: pointer being freed was not allocated

2015-05-22 Thread mikael at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61831 Mikael Morin mikael at gcc dot gnu.org changed: What|Removed |Added Keywords||patch

Re: Compilers and RCU readers: Once more unto the breach!

2015-05-22 Thread Paul E. McKenney
On Fri, May 22, 2015 at 06:30:29PM +0100, Will Deacon wrote: Hi Paul, On Thu, May 21, 2015 at 09:02:12PM +0100, Paul E. McKenney wrote: On Thu, May 21, 2015 at 08:24:22PM +0100, Will Deacon wrote: On Wed, May 20, 2015 at 07:16:06PM +0100, Paul E. McKenney wrote: On to #5:

[Bug c++/66255] New: ice in retrieve_specialization

2015-05-22 Thread dcb314 at hotmail dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66255 Bug ID: 66255 Summary: ice in retrieve_specialization Product: gcc Version: 6.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: c++

Re: [RFC / CFT] PR c++/66192 - Remove TARGET_RELAXED_ORDERING and use load acquires.

2015-05-22 Thread David Edelsohn
On Fri, May 22, 2015 at 11:23 AM, Ramana Radhakrishnan ramana.radhakrish...@foss.arm.com wrote: So on powerpc where targetm.guard_mask_bit is false - this is what I see. { static int * p; static int * p; if (cleanup_point (unsigned char) *(char *) (long long int) __atomic_load_8

[Bug middle-end/66148] [6 regression] build/genpreds: Internal error: abort in choose_enum_order, at genpreds.c:1006

2015-05-22 Thread danglin at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66148 John David Anglin danglin at gcc dot gnu.org changed: What|Removed |Added CC||thopre01

Re: [RFC / CFT] PR c++/66192 - Remove TARGET_RELAXED_ORDERING and use load acquires.

2015-05-22 Thread Jason Merrill
On 05/22/2015 11:23 AM, Ramana Radhakrishnan wrote: On 22/05/15 15:28, Jason Merrill wrote: I do notice that get_guard_bits after build_atomic_load just won't work on non-ARM targets, as it ends up trying to take the address of a value. So on powerpc where targetm.guard_mask_bit is false -

Re: [patch] libstdc++/66017 Avoid bad casts and fix alignment of _Rb_tree_nodelong long::_M_storage

2015-05-22 Thread Jonathan Wakely
On 22/05/15 16:21 +0100, Jonathan Wakely wrote: On 22/05/15 17:13 +0200, Jakub Jelinek wrote: On Fri, May 22, 2015 at 03:59:47PM +0100, Jonathan Wakely wrote: + alignas(alignof(_Tp2)) unsigned char _M_storage[sizeof(_Tp)]; Is alignof(_Tp2) always the same as alignof(_Tp2::_M_t) on all

Re: [C++ PATCH] fix canonical type ICE

2015-05-22 Thread Nathan Sidwell
On 05/21/15 21:47, Jason Merrill wrote: How about adding may_alias support to the code a bit lower down that copies the abi_tag attribute? Good idea. This keeps the non-copy behavior when the attribute is the last on the source attribute list, and fixes up the case for when there are both

Re: [PATCH i386] Allow sibcalls in no-PLT PIC

2015-05-22 Thread Richard Henderson
On 05/19/2015 06:06 PM, Rich Felker wrote: And are the above indirect calls/jumps (1983+43) candidates for scheduling/hoisting the address load (that's not being done yet), or are they the ones the compiler opted not to schedule/hoist? The win from relaxation seems small here, but as long as

[Bug c++/65945] C++ alignment of nullptr_t is 1 and might cause unaligned stores to the frame

2015-05-22 Thread foom at fuhm dot net
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65945 James Y Knight foom at fuhm dot net changed: What|Removed |Added CC||foom at fuhm dot

Re: IBM z13 support for older GCCs

2015-05-22 Thread Andreas Krebbel
On 05/22/2015 10:54 AM, Richard Biener wrote: On Fri, 22 May 2015, Andreas Krebbel wrote: On 05/22/2015 10:22 AM, Richard Biener wrote: On Fri, 22 May 2015, Andreas Krebbel wrote: Hi, in order to get the IBM z13 support into present distros the Linux distributors asked me to get this

Re: [RFC / CFT] PR c++/66192 - Remove TARGET_RELAXED_ORDERING and use load acquires.

2015-05-22 Thread Richard Henderson
On 05/22/2015 10:36 AM, Jason Merrill wrote: It also seems unnecessary to load 8 bytes on any target; we could add a function to optabs.c that returns the smallest mode for which there's atomic load support? No, while we do use an atomic_loadmode pattern if it exists, we assume that all loads

[Bug c++/66254] New: Member function shadowing enum classes

2015-05-22 Thread vini.ipsmaker at gmail dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66254 Bug ID: 66254 Summary: Member function shadowing enum classes Product: gcc Version: 5.1.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: c++

Re: [PATCH] Print Pass Names

2015-05-22 Thread Richard Biener
On May 22, 2015 6:32:38 PM GMT+02:00, Aditya K hiradi...@msn.com wrote: Currently, when we print the passes it does not print its name. This becomes confusing when we want to print all the passes at once (e.g., -fdump-tree-all-all=stderr pass.dump). This patch adds functionality to print the pass

[Bug c/66240] RFE: extend -falign-xyz syntax

2015-05-22 Thread vda.linux at googlemail dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66240 --- Comment #2 from Denis Vlasenko vda.linux at googlemail dot com --- (In reply to Josh Triplett from comment #1) Another alternative discussed in that thread, which seems near-ideal: align functions to a given size (for instance, 64 bytes),

Re: Compilers and RCU readers: Once more unto the breach!

2015-05-22 Thread Will Deacon
Hi Paul, On Thu, May 21, 2015 at 09:02:12PM +0100, Paul E. McKenney wrote: On Thu, May 21, 2015 at 08:24:22PM +0100, Will Deacon wrote: On Wed, May 20, 2015 at 07:16:06PM +0100, Paul E. McKenney wrote: On to #5: r1 = atomic_load_explicit(x, memory_order_consume); if (r1 == 42)

Re: [PATCH] Fix memory orders description in atomic ops built-ins docs.

2015-05-22 Thread Torvald Riegel
On Fri, 2015-05-22 at 17:41 +0100, Matthew Wahab wrote: On 21/05/15 19:26, Torvald Riegel wrote: On Thu, 2015-05-21 at 16:45 +0100, Matthew Wahab wrote: On 19/05/15 20:20, Torvald Riegel wrote: On Mon, 2015-05-18 at 17:36 +0100, Matthew Wahab wrote: Hello, On 15/05/15 17:22, Torvald

[Bug c/66198] base on aarch64 compiler , fdo optimazition produce wrong result

2015-05-22 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66198 Richard Earnshaw rearnsha at gcc dot gnu.org changed: What|Removed |Added Status|WAITING

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