https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66801
Richard Biener rguenth at gcc dot gnu.org changed:
What|Removed |Added
Target Milestone|--- |6.0
I once wondered why fold didn't optimize (long)int-val INT_MAX
when niter analysis tried to fold this. Now when moving
fold_widened_comparison to match.pd I noticed that a bogus
condition on the limit folding causes it to only apply in the
case when it won't simplify anything...
Thus, fixed.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66792
--- Comment #2 from krichter at posteo dot de ---
I guess, _anything_ would be good enough :)
Hi,
On Tue, Jul 07, 2015 at 01:44:15PM -0500, Segher Boessenkool wrote:
On Tue, Jul 07, 2015 at 07:53:49PM +0200, Martin Jambor wrote:
I've been asked to look into the item one of
http://permalink.gmane.org/gmane.linux.kernel/1990397 and found out
that at least shrink-wrapping happily
On Wed, Jul 08, 2015 at 11:23:09AM +0200, Martin Jambor wrote:
For other archs, e.g. x86-64, you can do
register void *sp asm(%sp);
asm volatile(call func : +r(sp));
snip
Well, I only have had a quick look at where things go wrong and have
not spent much time thinking about
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66782
--- Comment #8 from Uroš Bizjak ubizjak at gmail dot com ---
Created attachment 35931
-- https://gcc.gnu.org/bugzilla/attachment.cgi?id=35931action=edit
Workaround patch that reintroduces direct call clobbers
The patch vs. [trunk revision
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61820
Martin Jambor jamborm at gcc dot gnu.org changed:
What|Removed |Added
Status|NEW |RESOLVED
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66805
Richard Biener rguenth at gcc dot gnu.org changed:
What|Removed |Added
Status|UNCONFIRMED |NEW
Last
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66796
--- Comment #1 from dave.anglin at bell dot net ---
I don't believe this is a regression. It's a new test that Jeff added with the
changes to
the PA shift support for combine.
--
John David Anglin dave.ang...@bell.net
The same bug was earlier reported as PR gcov-profile/43341:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=43341
Alexander
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66807
Bug ID: 66807
Summary: [6 Regression] --enable-libmpx failed
Product: gcc
Version: 6.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: middle-end
On Wed, Jul 8, 2015 at 12:51 PM, Alan Lawrence alan.lawre...@arm.com wrote:
Richard Biener wrote:
On Wed, Jul 8, 2015 at 12:07 AM, Jeff Law l...@redhat.com wrote:
On 07/07/2015 06:37 AM, Alan Lawrence wrote:
[snip]
Fix native_interpret_real for HFmode floats on Bigendian with
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61160
--- Comment #18 from Martin Jambor jamborm at gcc dot gnu.org ---
Author: jamborm
Date: Wed Jul 8 11:24:38 2015
New Revision: 225543
URL: https://gcc.gnu.org/viewcvs?rev=225543root=gccview=rev
Log:
Make gcc/testsuite/g++.dg/ipa/pr61160-3.C main
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61820
--- Comment #4 from Martin Jambor jamborm at gcc dot gnu.org ---
Author: jamborm
Date: Wed Jul 8 11:24:38 2015
New Revision: 225543
URL: https://gcc.gnu.org/viewcvs?rev=225543root=gccview=rev
Log:
Make gcc/testsuite/g++.dg/ipa/pr61160-3.C main
Vectors should be passed in memory for IAMCU.
OK for trunk?
H.J.
---
gcc/
PR target/66806
* config/i386/i386.c (function_arg_advance_32): Don't pass
vectors in registers for IAMCU.
(function_arg_32): Likewise.
(ix86_return_in_memory): Don't return vectors
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66801
--- Comment #4 from Markus Trippelsdorf trippels at gcc dot gnu.org ---
The patch doesn't help, unfortunately.
By the way compiling gimple-match.c with -fprofile-generate takes
almost 4 minutes on gcc112.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66805
Richard Biener rguenth at gcc dot gnu.org changed:
What|Removed |Added
Status|NEW |ASSIGNED
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66805
--- Comment #4 from Jan Engelhardt jengelh at inai dot de ---
If one uses
#pragma pack(push, 1)
#pragma pack(pop)
the issue goes away, so indeed, it seems that some gcov parts are implicitly
built with different padding.
On Wed, Jul 08, 2015 at 01:58:38PM +0200, Richard Biener wrote:
The following fixes #pragma pack effect leaking to all types built
from the middle-end (so possibly even vector types built by the
vectorizer?). The PR in question is about gcov_info_type where
layout is affected and
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66801
--- Comment #6 from Richard Biener rguenth at gcc dot gnu.org ---
Ok, so the only code-gen difference possible is due to match.pd patterns
applying/not applying because of the changed iteration order making lattice
values final at different
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=43341
Richard Biener rguenth at gcc dot gnu.org changed:
What|Removed |Added
CC||jengelh at
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=43341
Richard Biener rguenth at gcc dot gnu.org changed:
What|Removed |Added
Status|UNCONFIRMED |ASSIGNED
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66801
Richard Biener rguenth at gcc dot gnu.org changed:
What|Removed |Added
Status|NEW |ASSIGNED
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66806
H.J. Lu hjl.tools at gmail dot com changed:
What|Removed |Added
Status|UNCONFIRMED |NEW
Last
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66782
--- Comment #7 from Uroš Bizjak ubizjak at gmail dot com ---
The difference when clobbers are implemented with direct clobbers (I'll attach
the patch) is:
(---): Unpatched compiler, usign fusage clobbers
(+++): Patched compiler, using direct
Passes do not expect post-dominators being around and thus forget
to invalidate them properly. Thus passes computing them have to
free them. The patch fixes path-isolation and adds an assert so
this doesn't happen again.
Bootstrapped and tested on x86_64-unknown-linux-gnu, applied to trunk.
On Wed, Jul 8, 2015 at 1:41 PM, H.J. Lu hongjiu...@intel.com wrote:
Vectors should be passed in memory for IAMCU.
OK for trunk?
Bootstrapped and regression tested?
Uros.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66793
--- Comment #3 from Richard Biener rguenth at gcc dot gnu.org ---
Author: rguenth
Date: Wed Jul 8 11:54:28 2015
New Revision: 225546
URL: https://gcc.gnu.org/viewcvs?rev=225546root=gccview=rev
Log:
2015-07-08 Richard Biener rguent...@suse.de
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66793
Richard Biener rguenth at gcc dot gnu.org changed:
What|Removed |Added
Known to work||6.0
Target
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66801
--- Comment #7 from Richard Biener rguenth at gcc dot gnu.org ---
Oh, and FDO also effectively enables most -O3 optimizations of course. After
reproducing FDO/LTO I'll try FDO only and bootstrap-O3 ... fingers crossing ;)
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66805
Richard Biener rguenth at gcc dot gnu.org changed:
What|Removed |Added
Status|ASSIGNED|RESOLVED
On Wed, Jul 08, 2015 at 02:40:33PM +0200, Richard Biener wrote:
toplev.c already sets maximum_field_alignment directly, and to a different
value:
maximum_field_alignment = initial_max_fld_align * BITS_PER_UNIT;
so I'm not sure you need a new function. And, shouldn't you reset to
Hi,
apparently I have forgot to backport this to the 4.9 branch which was
now pointed out in a separate PR 61820. The patch is obvious and
testcase-only, so I have done the backport now, after some basic
testing, so that I can close the bug.
Thanks,
Martin
On Tue, Jul 22, 2014 at 06:31:32PM
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66794
Richard Biener rguenth at gcc dot gnu.org changed:
What|Removed |Added
Known to work||6.0
Target
C++0x changed the signature of std::list::merge to take an rvalue
reference, and then LWG DR 1133 [1] added the lvalue reference
signature back as an overload. Our implementation follows that history
rather literally, as we changed list::merge to take an rvalue in C++0x
mode, then later [2] added
On Wed, Jul 8, 2015 at 12:01 PM, Bin.Cheng amker.ch...@gmail.com wrote:
On Wed, Jul 8, 2015 at 5:58 PM, Bin.Cheng amker.ch...@gmail.com wrote:
On Wed, Jul 8, 2015 at 5:51 PM, Richard Biener
richard.guent...@gmail.com wrote:
On Wed, Jul 8, 2015 at 8:52 AM, Bin.Cheng amker.ch...@gmail.com wrote:
On 08/07/15 13:00 +0100, Jonathan Wakely wrote:
patch2.txt then does the same thing for splice(), introducing a
__const_iterator typedef [3] to make the signatures consistent for
different language modes.
I think this makes the code more maintainable, as there are fewer #if
blocks with subtly
On Tue, Jul 7, 2015 at 3:40 PM, Jeff Law l...@redhat.com wrote:
And a generic question on the testsuite -- presumably it turns on type
demangling?I wanted to verify the flow through d_expression_1 was what I
expected it to be and it took a while to realize that c++filt doesn't
demangle
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66806
Bug ID: 66806
Summary: internal compiler error: in emit_move_insn, at
expr.c:3551
Product: gcc
Version: 6.0
Status: UNCONFIRMED
Severity: normal
Hi,
since r225260 the backend register elimination hooks also get invoked
after reload is completed e.g. from sched2. During register
elimination we call s390_init_frame_layout which is not supposed to be
invoked after reload. We had an assertion here to make sure this does
not happen. This got
The following fixes #pragma pack effect leaking to all types built
from the middle-end (so possibly even vector types built by the
vectorizer?). The PR in question is about gcov_info_type where
layout is affected and inconsistency between that and the libgcov.a
copy causes libgcov to crash.
As
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66744
--- Comment #4 from Martin Liška marxin at gcc dot gnu.org ---
Author: marxin
Date: Wed Jul 8 12:25:40 2015
New Revision: 225547
URL: https://gcc.gnu.org/viewcvs?rev=225547root=gccview=rev
Log:
Fix PR bootstrap/66744.
PR
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66744
Martin Liška marxin at gcc dot gnu.org changed:
What|Removed |Added
Status|UNCONFIRMED |RESOLVED
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66806
Yulia Koval julia.koval at intel dot com changed:
What|Removed |Added
CC||julia.koval at
On Wed, 8 Jul 2015, Jakub Jelinek wrote:
On Wed, Jul 08, 2015 at 01:58:38PM +0200, Richard Biener wrote:
The following fixes #pragma pack effect leaking to all types built
from the middle-end (so possibly even vector types built by the
vectorizer?). The PR in question is about
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66801
--- Comment #5 from rguenther at suse dot de rguenther at suse dot de ---
On Wed, 8 Jul 2015, trippels at gcc dot gnu.org wrote:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66801
--- Comment #4 from Markus Trippelsdorf trippels at gcc dot
On Wed, Jul 8, 2015 at 1:41 PM, H.J. Lu hongjiu...@intel.com wrote:
Vectors should be passed in memory for IAMCU.
OK for trunk?
H.J.
---
gcc/
PR target/66806
* config/i386/i386.c (function_arg_advance_32): Don't pass
vectors in registers for IAMCU.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66782
Michael Matz matz at gcc dot gnu.org changed:
What|Removed |Added
CC||matz at gcc dot
The following fixes path-isolation to properly split the block
if it inserts a trap after a stmt ending a BB (in this case a noreturn
stmt).
Bootstrapped and tested on x86_64-unknown-linux-gnu, applied to trunk.
Richard.
2015-07-08 Richard Biener rguent...@suse.de
PR
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66794
--- Comment #2 from Richard Biener rguenth at gcc dot gnu.org ---
Author: rguenth
Date: Wed Jul 8 11:47:42 2015
New Revision: 225545
URL: https://gcc.gnu.org/viewcvs?rev=225545root=gccview=rev
Log:
2015-07-08 Richard Biener rguent...@suse.de
On Wed, 8 Jul 2015, Richard Biener wrote:
The following fixes #pragma pack effect leaking to all types built
from the middle-end (so possibly even vector types built by the
vectorizer?). The PR in question is about gcov_info_type where
layout is affected and inconsistency between that and
On 08/07/15 12:40, Andreas Schwab wrote:
Tom de Vries tom_devr...@mentor.com writes:
* testsuite/libgomp.c/parloops-exit-first-loop-alt-3.c (main): Test low
iteration count case.
../../../../libgomp/testsuite/libgomp.c/parloops-exit-first-loop-alt-3.c: In
function 'main':
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=41861
--- Comment #11 from Jonathan Wakely redi at gcc dot gnu.org ---
Aaron, your reply got added to Bug 887 for some reason.
Re-posting Aaron's comment here:
Thanks. I had already patched our gcc so that gthreads cond always gets
initialized with
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66801
Bug ID: 66801
Summary: [6 Regression] gcc miscompiled during PGO/LTO
bootstrap
Product: gcc
Version: 6.0
Status: UNCONFIRMED
Severity: normal
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66797
Richard Biener rguenth at gcc dot gnu.org changed:
What|Removed |Added
CC||amker.cheng
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66803
Jonathan Wakely redi at gcc dot gnu.org changed:
What|Removed |Added
Status|UNCONFIRMED |NEW
Last
On Tue, Jul 7, 2015 at 11:23 PM, Abe abe_skol...@yahoo.com wrote:
(if-conversion could directly generate masked load/stores
of course and not use a scratch-pad at all in that case).
IMO that`s a great idea, but I don`t know how to do it. Hints would be
welcome. In particular, how does one
On Wed, Jul 08, 2015 at 10:23:43AM +0200, Martin Liška wrote:
PR bootstrap/66744
* tree-sra.c (create_access_1): Can ctor without brackets.
(create_artificial_child_access): Likewise.
When committing this, please s/Can/Call/ or something similar.
Marek
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66460
Paolo Carlini paolo.carlini at oracle dot com changed:
What|Removed |Added
Status|UNCONFIRMED |NEW
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66801
Markus Trippelsdorf trippels at gcc dot gnu.org changed:
What|Removed |Added
Target|ppc64le |
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65186
Paolo Carlini paolo.carlini at oracle dot com changed:
What|Removed |Added
CC||ppalka at
On Mon, Jul 6, 2015 at 12:36 PM, Mikhail Maltsev malts...@gmail.com wrote:
diff --git a/libiberty/cp-demangle.c b/libiberty/cp-demangle.c
index 44a0a9b..befa6b6 100644
--- a/libiberty/cp-demangle.c
+++ b/libiberty/cp-demangle.c
@@ -103,6 +103,7 @@
#include config.h
#endif
+#include
Richard Biener wrote:
On Wed, Jul 8, 2015 at 12:07 AM, Jeff Law l...@redhat.com wrote:
On 07/07/2015 06:37 AM, Alan Lawrence wrote:
[snip]
Fix native_interpret_real for HFmode floats on Bigendian with
UNITS_PER_WORD=4
(with missing space)
OK with ChangeLog in proper form.
Err -
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66800
Richard Biener rguenth at gcc dot gnu.org changed:
What|Removed |Added
Status|UNCONFIRMED |RESOLVED
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66802
Bug ID: 66802
Summary: Some of the Bugzilla Bug fields descriptions do not
reflect GCC development
Product: gcc
Version: unknown
Status: UNCONFIRMED
Severity:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66804
--- Comment #6 from Markus Trippelsdorf trippels at gcc dot gnu.org ---
See discussion in PR65709 for a similar issue.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66804
--- Comment #5 from Richard Biener rguenth at gcc dot gnu.org ---
(In reply to Fei Yang from comment #4)
(In reply to Markus Trippelsdorf from comment #2)
You're invoking undefined behavior:
test.c:34:12: runtime error: store to
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66801
--- Comment #1 from Markus Trippelsdorf trippels at gcc dot gnu.org ---
Started with r225504.
On Tue, Jul 7, 2015 at 8:35 PM, Uros Bizjak ubiz...@gmail.com wrote:
BT has *slightly* higher latency than TEST (0.33 vs. 0.25 cycles on a
modern processor), so I have limited the conversion to -Os in case the
bit-test is in the low 32 bits.
A small update, in case of -Os, unpatched compiler
On Wed, Jul 8, 2015 at 5:58 PM, Bin.Cheng amker.ch...@gmail.com wrote:
On Wed, Jul 8, 2015 at 5:51 PM, Richard Biener
richard.guent...@gmail.com wrote:
On Wed, Jul 8, 2015 at 8:52 AM, Bin.Cheng amker.ch...@gmail.com wrote:
Hi,
Function fill_always_executed_in_1 computes basic blocks' always
On 2015.07.06 at 14:40 +0200, Richard Biener wrote:
The intent (as I read it) of the iteration order in ssa_propagate is
to process stmts in the following order:
1) complete simulation of BBs from making one of their entries executable
2) simulation of stmts fed by stmts that changed to
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66796
Richard Biener rguenth at gcc dot gnu.org changed:
What|Removed |Added
Target Milestone|--- |6.0
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66804
--- Comment #4 from Fei Yang felix.yang at huawei dot com ---
(In reply to Markus Trippelsdorf from comment #2)
You're invoking undefined behavior:
test.c:34:12: runtime error: store to
misaligned address 0x00401c8c for type 'unsigned char
Abe wrote:
I`m uncertain to what that is intended to refer, but I believe Sebastian would
agree that the new if converter is safer than the old one in terms of
correctness at the time of running the code being compiled.
even if they take us a step backwards from a performance standpoint.
On Wed, Jul 8, 2015 at 12:07 AM, Jeff Law l...@redhat.com wrote:
On 07/07/2015 06:37 AM, Alan Lawrence wrote:
As per https://gcc.gnu.org/ml/gcc-patches/2015-04/msg01346.html. Fixes
FAIL of advsimd-intrinsics vcreate.c on aarch64_be-none-elf from
previous patch.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66460
--- Comment #1 from Paolo Carlini paolo.carlini at oracle dot com ---
Stack trace very similar to c++/66292
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66805
--- Comment #1 from Jan Engelhardt jengelh at inai dot de ---
(gdb) r
Starting program: t
Program received signal SIGSEGV, Segmentation fault.
compute_summary (max_length=synthetic pointer, this_prg=0x7fff9540,
list=0x77dda180)
at
Ping.
https://gcc.gnu.org/ml/gcc-patches/2015-06/msg01064.html
Thanks,
Kyrill
On 16/06/15 09:36, Kyrill Tkachov wrote:
On 27/05/15 09:39, Andrew Pinski wrote:
On Wed, May 27, 2015 at 4:38 PM, Kyrill Tkachov kyrylo.tkac...@arm.com wrote:
Ping.
Ping.
Thanks,
Kyrill
On 17/06/15 11:16, Kyrill Tkachov wrote:
Ping^5.
https://gcc.gnu.org/ml/gcc-patches/2015-04/msg01130.html
Thanks,
Kyrill
On 02/06/15 09:16, Kyrill Tkachov wrote:
Ping^4.
Thanks,
Kyrill
On 21/05/15 18:00, Kyrill Tkachov wrote:
Ping^3.
Thanks,
Kyrill
On 12/05/15
Hello.
Following small patch does what is described in $subject.
Patch can boostrap on ppc64-linux-unknown-pc and on i686-w64-mingw32.
Ready for trunk?
Thanks,
Martin
From 0b3f863ff9806ed9f802b18aabe0276830a3c38e Mon Sep 17 00:00:00 2001
From: mliska mli...@suse.cz
Date: Fri, 3 Jul 2015 17:48:01
I haven't seen the patch yet but here are my thoughts on where this should be
going.
On 07/07/15 18:17, Alan Lawrence wrote:
Kyrill Tkachov wrote:
On 07/07/15 17:34, Alan Lawrence wrote:
Kyrill Tkachov wrote:
On 07/07/15 14:09, Kyrill Tkachov wrote:
Hi Alan,
On 07/07/15 13:34, Alan
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66803
Bug ID: 66803
Summary: std::this_thread::sleep_for gets interrupted by
signals.
Product: gcc
Version: 5.1.0
Status: UNCONFIRMED
Severity: normal
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66804
--- Comment #2 from Markus Trippelsdorf trippels at gcc dot gnu.org ---
You're invoking undefined behavior:
test.c:34:12: runtime error: store to misaligned address 0x00401c8c for
type 'unsigned char *', which requires 8 byte alignment
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65988
--- Comment #8 from Jonathan Wakely redi at gcc dot gnu.org ---
(In reply to Jesus Cea from comment #7)
I close this but report, but I would love future GCC releases to document
what CLOOG and ISL versions they require.
It already does, see
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66782
Uroš Bizjak ubizjak at gmail dot com changed:
What|Removed |Added
Status|UNCONFIRMED |NEW
On 21/04/15 10:11, Kyrill Tkachov wrote:
Hi all,
This is the first of a series to clean up and simplify the arm rtx costs
function.
This patch initialises the cost to COSTS_N_INSNS (1) at the top and
increments it when appropriate
in the rest of the function. This makes it more similar
Yes, this is OK.
Committed as SVN 225536.
Regards,
Andrew
Hi,
This patch adds support for optional arguments for interrupt and
use_shadow_register_set attributes. The patch also fixes an ICE if both
interrupt and use_shadow_register_set are enabled and compiled with -mips64r2
-mabi=64 discovered during testing of the attached test.
The interrupt
Hi Matthew/Catherine,
The attached patch removes the restriction to compile a TU with an ISR with
-mhard-float. Instead of forcing -msoft-float, the coprocessor 1 is disabled in
an ISR for -mhard-float.
Ok to apply?
Regards,
Robert
gcc/
* config/mips/mips.c
Bootstrapped regression-tested on x86_64-linux-gnu :)
2015-07-08 Kito Cheng kito.ch...@gmail.com
* function.c (stack_protect_epilogue): Use if rather than switch for
check targetm.have_stack_protect_test().
From 0306990aac578167872a80ab55085d335e2bea14 Mon Sep 17 00:00:00 2001
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66804
--- Comment #7 from Richard Biener rguenth at gcc dot gnu.org ---
CCP computes this precisely:
Visiting PHI node: # PT = { D.1842 } (nonlocal, escaped)
p_3 = PHI MEM[(void *)xxx + 2444B](2), p_4(3)
Argument #0 (2 - 4 executable)
On Wed, Jul 8, 2015 at 10:23 AM, Martin Liška mli...@suse.cz wrote:
Hello.
Following small patch does what is described in $subject.
Patch can boostrap on ppc64-linux-unknown-pc and on i686-w64-mingw32.
Ready for trunk?
Ok.
Richard.
Thanks,
Martin
On Wed, Jul 8, 2015 at 5:51 PM, Richard Biener
richard.guent...@gmail.com wrote:
On Wed, Jul 8, 2015 at 8:52 AM, Bin.Cheng amker.ch...@gmail.com wrote:
Hi,
Function fill_always_executed_in_1 computes basic blocks' always
executed information, and it has below code and comment:
/*
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66748
--- Comment #4 from Marek Polacek mpolacek at gcc dot gnu.org ---
Author: mpolacek
Date: Wed Jul 8 10:36:26 2015
New Revision: 225541
URL: https://gcc.gnu.org/viewcvs?rev=225541root=gccview=rev
Log:
PR c++/66748
* tree.c
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66793
Richard Biener rguenth at gcc dot gnu.org changed:
What|Removed |Added
Status|UNCONFIRMED |ASSIGNED
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66804
--- Comment #1 from Fei Yang felix.yang at huawei dot com ---
Also reproducible with GCC-5 and GCC-6.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66804
Bug ID: 66804
Summary: Alignment issue caused by auto vectorization
Product: gcc
Version: 4.9.4
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66792
--- Comment #1 from Jonathan Wakely redi at gcc dot gnu.org ---
Would:
// The algorithm used here is unchanged from the SGI STL and is
// described in The C++ Standard Template Library by Plauger,
// Stepanov, Lee,
On Tue, Jul 07, 2015 at 02:25:34PM -0600, Jeff Law wrote:
On 07/07/2015 11:53 AM, Martin Jambor wrote:
Hi,
I've been asked to look into the item one of
http://permalink.gmane.org/gmane.linux.kernel/1990397 and found out
that at least shrink-wrapping happily moves prologue past an asm
Abe wrote:
[snip]
Predication of instructions can help to remove the burden of the conditional
branch, but is not available on all relevant architectures.
In some architectures that are typically implemented in modern high-speed
processors -- i.e. with high core frequency, caches, speculative
1 - 100 of 271 matches
Mail list logo
