Re: ppc eabi float arguments

2015-09-22 Thread Alan Modra
On Tue, Sep 22, 2015 at 07:39:43PM +0200, Bernhard Schommer wrote: > Does anyone know the reason why the gcc passes the argument as single float? That's how the first powerpc gcc implementation behaved. Once gcc compiled code is out in the field, you need to ask everyone to recompile their code i

Re: ppc eabi float arguments

2015-09-22 Thread Joseph Myers
I advise looking at the "Power Architecture® 32-bit Application Binary Interface Supplement 1.0 - Embedded", not any older EABI documents. There may well be bugs in this ABI document (i.e. it may fail to reflect actual practice), but it's still more reliable as a guide to current practice than

gcc-5-20150922 is now available

2015-09-22 Thread gccadmin
Snapshot gcc-5-20150922 is now available on ftp://gcc.gnu.org/pub/gcc/snapshots/5-20150922/ and on various mirrors, see http://gcc.gnu.org/mirrors.html for details. This snapshot has been generated from the GCC 5 SVN branch with the following options: svn://gcc.gnu.org/svn/gcc/branches/gcc-5

Re: [cfe-dev] RFC: Support x86 interrupt and exception handlers

2015-09-22 Thread H. Peter Anvin
On 09/22/15 04:52, David Chisnall wrote: > On 22 Sep 2015, at 12:47, H.J. Lu wrote: >> >> since __builtin_exception_error () is the same as >> __builtin_return_address (0) and __builtin_interrupt_data () is >> address of __builtin_exception_error () + size of register. > > Except that they’re *no

Re: [cfe-dev] RFC: Support x86 interrupt and exception handlers

2015-09-22 Thread H. Peter Anvin
On 09/22/15 04:44, David Chisnall wrote: > On 22 Sep 2015, at 12:39, H.J. Lu via cfe-dev wrote: >> >> The center piece of my proposal is not to change how parameters >> are passed in compiler. As for user experience, the feedbacks on >> my proposal from our users are very positive. > > Implement

Re: [cfe-dev] RFC: Support x86 interrupt and exception handlers

2015-09-22 Thread H. Peter Anvin
On 09/22/15 01:41, David Chisnall wrote: > On 21 Sep 2015, at 21:45, H.J. Lu via cfe-dev wrote: >> >> The main purpose of x86 interrupt attribute is to allow programmers >> to write x86 interrupt/exception handlers in C WITHOUT assembly >> stubs to avoid extra branch from assembly stubs to C funct

Re: [cfe-dev] RFC: Support x86 interrupt and exception handlers

2015-09-22 Thread Richard Henderson
On 09/21/2015 04:03 PM, Hal Finkel wrote: > - Original Message - >> From: "H.J. Lu" >> To: "Hal Finkel" >> Cc: "GCC Development" , cfe-...@lists.llvm.org >> Sent: Monday, September 21, 2015 5:57:36 PM >> Subject: Re: [cfe-dev] RFC: Support x86 interrupt and exception handlers >> >> On Mon

Re: ppc eabi float arguments

2015-09-22 Thread Bernhard Schommer
Am 22.09.2015 um 19:43 schrieb David Edelsohn: On Tue, Sep 22, 2015 at 1:39 PM, Bernhard Schommer wrote: Hi, if been working with the windriver Diab c compiler for 32bit ppc for and encountered an incompatibly with the eabi version of the gcc 4.83. When calling functions with more than 8 floa

Re: ppc eabi float arguments

2015-09-22 Thread David Edelsohn
On Tue, Sep 22, 2015 at 1:39 PM, Bernhard Schommer wrote: > Hi, > > if been working with the windriver Diab c compiler for 32bit ppc for and > encountered an incompatibly with the eabi version of the gcc 4.83. When > calling functions with more than 8 float arguments the gcc stores the 9th > floa

ppc eabi float arguments

2015-09-22 Thread Bernhard Schommer
Hi, if been working with the windriver Diab c compiler for 32bit ppc for and encountered an incompatibly with the eabi version of the gcc 4.83. When calling functions with more than 8 float arguments the gcc stores the 9th float argument (and so on) as a float where as the diab compiler stores th

Re: Compilers and RCU readers: Once more unto the breach!

2015-09-22 Thread Paul E. McKenney
On Mon, Jul 13, 2015 at 05:44:59PM -0700, Paul E. McKenney wrote: > On Tue, May 19, 2015 at 05:55:10PM -0700, Paul E. McKenney wrote: > > Hello! > > > > Following up on last year's discussion (https://lwn.net/Articles/586838/, > > https://lwn.net/Articles/588300/), I believe that we have a solutio

Re: [cfe-dev] RFC: Support x86 interrupt and exception handlers

2015-09-22 Thread David Chisnall
On 22 Sep 2015, at 12:47, H.J. Lu wrote: > > since __builtin_exception_error () is the same as > __builtin_return_address (0) and __builtin_interrupt_data () is > address of __builtin_exception_error () + size of register. Except that they’re *not*. __builtin_return_address(0) is guaranteed to

Re: [cfe-dev] RFC: Support x86 interrupt and exception handlers

2015-09-22 Thread H.J. Lu
On Tue, Sep 22, 2015 at 4:44 AM, David Chisnall wrote: > On 22 Sep 2015, at 12:39, H.J. Lu via cfe-dev wrote: >> >> The center piece of my proposal is not to change how parameters >> are passed in compiler. As for user experience, the feedbacks on >> my proposal from our users are very positive.

Re: [cfe-dev] RFC: Support x86 interrupt and exception handlers

2015-09-22 Thread H.J. Lu
On Tue, Sep 22, 2015 at 1:41 AM, David Chisnall wrote: > On 21 Sep 2015, at 21:45, H.J. Lu via cfe-dev wrote: >> >> The main purpose of x86 interrupt attribute is to allow programmers >> to write x86 interrupt/exception handlers in C WITHOUT assembly >> stubs to avoid extra branch from assembly s

Re: [cfe-dev] RFC: Support x86 interrupt and exception handlers

2015-09-22 Thread David Chisnall
On 22 Sep 2015, at 12:39, H.J. Lu via cfe-dev wrote: > > The center piece of my proposal is not to change how parameters > are passed in compiler. As for user experience, the feedbacks on > my proposal from our users are very positive. Implementing the intrinsics for getting the current interru

Re: [cfe-dev] RFC: Support x86 interrupt and exception handlers

2015-09-22 Thread H.J. Lu
On Tue, Sep 22, 2015 at 1:11 AM, Hal Finkel wrote: > - Original Message - >> From: "H.J. Lu" >> To: "Hal Finkel" >> Cc: "GCC Development" , cfe-...@lists.llvm.org >> Sent: Monday, September 21, 2015 7:17:20 PM >> Subject: Re: [cfe-dev] RFC: Support x86 interrupt and exception handlers >>

Re: Predictive commoning leads to register to register moves through memory.

2015-09-22 Thread Richard Biener
On Tue, Sep 22, 2015 at 12:45 PM, Simon Dardis wrote: > I took an attempt at addressing this through the RTL GCSE pass. This attempt > tweaks > mem_attrs_eq_p to return true if its comparing something like poly+8 and MEM > [&poly + 8]. > > Is this a more suitable approach? I actually recently m

RE: Predictive commoning leads to register to register moves through memory.

2015-09-22 Thread Simon Dardis
I took an attempt at addressing this through the RTL GCSE pass. This attempt tweaks mem_attrs_eq_p to return true if its comparing something like poly+8 and MEM [&poly + 8]. Is this a more suitable approach? Thanks, Simon +/* Return true if p and q reference the same location by the same name

Re: [cfe-dev] RFC: Support x86 interrupt and exception handlers

2015-09-22 Thread David Chisnall
On 21 Sep 2015, at 21:45, H.J. Lu via cfe-dev wrote: > > The main purpose of x86 interrupt attribute is to allow programmers > to write x86 interrupt/exception handlers in C WITHOUT assembly > stubs to avoid extra branch from assembly stubs to C functions. I > want to keep the number of new intr

Re: avoiding recursive calls of calloc due to optimization

2015-09-22 Thread Richard Biener
On Mon, Sep 21, 2015 at 8:17 PM, Marc Glisse wrote: > On Mon, 21 Sep 2015, Daniel Gutson wrote: > >> This is derived from https://gcc.gnu.org/ml/gcc-help/2015-03/msg00091.html >> >> Currently, gcc provides an optimization that transforms a call to >> malloc and a call to memset into a call to call

Re: [cfe-dev] RFC: Support x86 interrupt and exception handlers

2015-09-22 Thread Hal Finkel
- Original Message - > From: "H.J. Lu" > To: "Hal Finkel" > Cc: "GCC Development" , cfe-...@lists.llvm.org > Sent: Monday, September 21, 2015 7:17:20 PM > Subject: Re: [cfe-dev] RFC: Support x86 interrupt and exception handlers > > On Mon, Sep 21, 2015 at 4:03 PM, Hal Finkel wrote: > >