Re: [PATCH] Fix PR71132

On Tue, May 17, 2016 at 11:21 AM, H.J. Lu wrote: > On Tue, May 17, 2016 at 5:51 AM, Richard Biener wrote: >> >> The following fixes a latent issue in loop distribution catched by >> the fake edge placement adjustment. >> >> Bootstrapped and tested on

[Bug middle-end/70526] [5/6 Regression] GCC 6 miscompiles Firefox JIT compiler

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70526 --- Comment #34 from Vittorio Zecca --- The Intel icpc compiler complains that in the reduced testcase ansi-alias rules are violated. icpc gccerr45.C -Wstrict-aliasing gccerr45.C(77) (col. 32): warning #2102: violation of ansi-alias rules This

[Bug c++/71166] [6/7 Regression] ICE with nested constexpr/initializer

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71166 Martin Sebor changed: What|Removed |Added Keywords||ice-on-valid-code

[Bug c++/56671] Gcc uses large amounts of memory and processor power with large C++11 bitsets

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=56671 Martin Sebor changed: What|Removed |Added CC||gcc-bugzilla at bmevers dot de ---

[Bug c++/63728] Memory exhaustion using constexpr constructors for classes with large array members

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63728 Martin Sebor changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug c++/55004] [meta-bug] constexpr issues

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=55004 Bug 55004 depends on bug 63728, which changed state. Bug 63728 Summary: Memory exhaustion using constexpr constructors for classes with large array members https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63728 What|Removed

[Bug target/71151] [avr] -fmerge-constants and -fdata-sections/-ffunction-sections results in string constants in .progmem.gcc_sw section

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71151 --- Comment #1 from Senthil Kumar Selvaraj --- A workaround is to disable constant merging (-fno-merge-constants).

Re: [PATCH 16/17][ARM] Add tests for VFP FP16 ACLE instrinsics.

On Tue, 17 May 2016, Matthew Wahab wrote: > In some tests, there are unavoidable differences in precision when > calculating the actual and the expected results of an FP16 operation. A > new support function CHECK_FP_BIAS is used so that these tests can check > for an acceptable margin of error.

[Bug tree-optimization/63586] x+x+x+x -> 4*x in gimple

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63586 --- Comment #8 from kugan at gcc dot gnu.org --- Author: kugan Date: Wed May 18 00:58:45 2016 New Revision: 236356 URL: https://gcc.gnu.org/viewcvs?rev=236356=gcc=rev Log: gcc/testsuite/ChangeLog: 2016-05-17 Kugan Vivekanandarajah

Re: [PATCH 9/17][ARM] Add NEON FP16 arithmetic instructions.

On Tue, 17 May 2016, Matthew Wahab wrote: > As with the VFP FP16 arithmetic instructions, operations on __fp16 > values are done by conversion to single-precision. Any new optimization > supported by the instruction descriptions can only apply to code > generated using intrinsics added in this

Re: [PATCH 8/17][ARM] Add VFP FP16 arithmetic instructions.

On Wed, 18 May 2016, Joseph Myers wrote: > But why do you need to force that? If the instructions follow IEEE > semantics including for exceptions and rounding modes, then X OP Y > computed directly with binary16 arithmetic has the same value as results > from promoting to binary32, doing

Re: [PATCH 8/17][ARM] Add VFP FP16 arithmetic instructions.

On Tue, 17 May 2016, Matthew Wahab wrote: > In most cases the instructions are added using non-standard pattern > names. This is to force operations on __fp16 values to be done, by > conversion, using the single-precision instructions. The exceptions are > the precision preserving operations ABS

[PATCH] Fix bootstrap on hppa*-*-hpux*

r235550 introduced the use of long long, and the macros LLONG_MIN and LLONG_MAX. These macros are not defined by default and we need to include when compiling with c++ to define them. Tested on hppa2.0w-hp-hpux11.11 and hppa64-hp-hpux11.11. Okay for trunk? Dave -- John David Anglin

Re: [PATCH 2/4] BRIG (HSAIL) frontend: The FE itself.

This patch has many improperly formatted diagnostic messages (e.g. starting with capital letters, ending with '.' or failing to use %q for quoting). I also note cases where you use %lu as a format for size_t, which is not correct (you'd need to add pretty-print.c support for %zu before you

[Bug middle-end/70795] [7 Regression] gcc/libjava/interpret.cc:1948:1: ICE: in binds_to_current_def_p, at symtab.c:2232

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70795 --- Comment #3 from John David Anglin --- Created attachment 38511 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=38511=edit Revert r235318 Reverting r235318 restores boot.

Re: [PATCH 0/4] BRIG (HSAIL) frontend

On Mon, 16 May 2016, Pekka Jääskeläinen wrote: > The diffstat is as follows: I don't see any .texi files in this diffstat. New front ends need all relevant documentation updated. -- Joseph S. Myers jos...@codesourcery.com

[Bug c/18063] Gcc doesn't check overflowed size of structure

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=18063 --- Comment #8 from joseph at codesourcery dot com --- I think we should diagnose the definition of the struct (generally, any construction of a too-large fixed-size type in any context).

[Bug libstdc++/70511] tuple constructor from elements hides copy constructor

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70511 Jonathan Wakely changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED CC|

Re: [PATCH #2] Add PowerPC ISA 3.0 word splat and byte immediate splat support

On Tue, May 17, 2016 at 06:45:49PM -0400, Michael Meissner wrote: > As I mentioned in the last message, my previous patch had some problems that > showed up on big endian systems, using RELOAD (one of the tests that failed > was > the vshuf-v32qi.c test in the testsuite). Little endian and IRA

[PATCH #2] Add PowerPC ISA 3.0 word splat and byte immediate splat support

As I mentioned in the last message, my previous patch had some problems that showed up on big endian systems, using RELOAD (one of the tests that failed was the vshuf-v32qi.c test in the testsuite). Little endian and IRA did compiled the test fine. This patch fixes the problem. I went over the

Re: [PATCH 3/3] jit: implement gcc_jit_rvalue_set_bool_require_tail_call

On Tue, May 17, 2016 at 06:01:32PM -0400, David Malcolm wrote: > This implements the libgccjit support for must-tail-call via > a new: > gcc_jit_rvalue_set_bool_require_tail_call > API entrypoint. It seems to me like that's not a great name, the rvalue and bool parts are just about the argument

gcc-5-20160517 is now available

Snapshot gcc-5-20160517 is now available on ftp://gcc.gnu.org/pub/gcc/snapshots/5-20160517/ and on various mirrors, see http://gcc.gnu.org/mirrors.html for details. This snapshot has been generated from the GCC 5 SVN branch with the following options: svn://gcc.gnu.org/svn/gcc/branches/gcc-5

[Bug fortran/66461] [4.9/5/6/7 Regression] ICE on missing end program in fixed source

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66461 --- Comment #12 from Jerry DeLisle --- I have a patch testing for this. I am not sure this is a regression. I see it as far back as 4.5. I don't have any earlier builds. My thinking is that since this is an ICE on invalid code, I don't want

Re: [PATCH 1/3] function: Do the CLEANUP_EXPENSIVE after shrink-wrapping, not before

> I built cross-compilers for 30 targets, and built Linux with that. > 6 of those failed for unrelated reasons. Of the 24 that do build, > five show a few insns difference between having a cleanup_cfg before > shrink-wrapping or not (CLEANUP_EXPENSIVE made no difference there). > These targets

[Bug rtl-optimization/71148] [7 Regression] Compile time hog w/ -O3 -funroll-loops

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71148 Eric Botcazou changed: What|Removed |Added Severity|normal |critical --- Comment #3 from Eric

Re: [PATCH 1/3] function: Do the CLEANUP_EXPENSIVE after shrink-wrapping, not before

On Tue, May 17, 2016 at 04:17:58AM -0500, Segher Boessenkool wrote: > On Tue, May 17, 2016 at 11:08:53AM +0200, Eric Botcazou wrote: > > > How would it? The shrink-wrapping algorithms do not much care how you > > > write your control flow. The only things I can think of are drastic > > > things

Re: [C++ Patch] PR 70466 ("ICE on invalid code in tree check: expected constructor, have parm_decl in convert_like_real...")

Hi, On 17/05/2016 20:15, Jason Merrill wrote: On 05/17/2016 04:47 AM, Paolo Carlini wrote: ... alternately, if the substance of my patchlet is right, we could simplify a bit the logic per the below. Here's a well-formed variant that was accepted by 4.5. Does your patch fix it? I also

[PATCH 1/3] Introduce can_implement_as_sibling_call_p

This patch moves part of the logic for determining if tail call optimizations are possible to a new helper function. There are no functional changes. expand_call is 1300 lines long, so there's arguably a case for doing this on its own, but this change also enables the followup patch. The patch

[PATCH 2/3] Implement CALL_EXPR_MUST_TAIL_CALL

This patch implements support for marking CALL_EXPRs as being mandatory for tail-call-optimization. expand_call tries harder to perform the optimization on such CALL_EXPRs, and issues an error if it fails. Currently this flag isn't accessible from any frontend, so the patch uses a plugin for

[PATCH 3/3] jit: implement gcc_jit_rvalue_set_bool_require_tail_call

This implements the libgccjit support for must-tail-call via a new: gcc_jit_rvalue_set_bool_require_tail_call API entrypoint. (I didn't implement a wrapper for this within the C++ bindings) Successfully bootstrapped on x86_64-pc-linux-gnu. gcc/jit/ChangeLog: *

[ptx] More test tweaks

This adjusts a few more tests: * I'd missed the optimization glob on a ptx skip-if, so it wasn't being skipped. * An asm test relied on the register allocator being run to assign an input to the same register as an output. * An atomic test operated on automatic storage, which doesn't work on

Re: inhibit the sincos optimization when the target has sin and cos instructions

On 05/17/2016 02:22 PM, Andrew Pinski wrote: > On Tue, May 17, 2016 at 2:10 PM, Cesar Philippidis > wrote: >> On 05/13/2016 01:13 PM, Andrew Pinski wrote: >>> On Fri, May 13, 2016 at 12:58 PM, Richard Biener >>> wrote: On May 13, 2016

Re: inhibit the sincos optimization when the target has sin and cos instructions

On Tue, May 17, 2016 at 2:10 PM, Cesar Philippidis wrote: > On 05/13/2016 01:13 PM, Andrew Pinski wrote: >> On Fri, May 13, 2016 at 12:58 PM, Richard Biener >> wrote: >>> On May 13, 2016 9:18:57 PM GMT+02:00, Cesar Philippidis >>>

Re: inhibit the sincos optimization when the target has sin and cos instructions

On 05/13/2016 01:13 PM, Andrew Pinski wrote: > On Fri, May 13, 2016 at 12:58 PM, Richard Biener > wrote: >> On May 13, 2016 9:18:57 PM GMT+02:00, Cesar Philippidis >> wrote: >>> The cse_sincos pass tries to optimize sequences such as >>> >>>

Re: [PATCH, GCC] PR middle-end/55299, fold bitnot through ASR and rotates

On 05/17/2016 06:09 PM, Richard Biener wrote: > > The patch is ok. > Committed as r236344. -- Regards, Mikhail Maltsev

[Bug middle-end/19987] [meta-bug] fold missing optimizations in general

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=19987 Bug 19987 depends on bug 54579, which changed state. Bug 54579 Summary: missed optimization: ASR idiom https://gcc.gnu.org/bugzilla/show_bug.cgi?id=54579 What|Removed |Added

[Bug tree-optimization/54579] missed optimization: ASR idiom

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=54579 Mikhail Maltsev changed: What|Removed |Added Status|NEW |RESOLVED CC|

[Bug middle-end/19987] [meta-bug] fold missing optimizations in general

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=19987 Bug 19987 depends on bug 55299, which changed state. Bug 55299 Summary: missed optimization: ASR idiom https://gcc.gnu.org/bugzilla/show_bug.cgi?id=55299 What|Removed |Added

[Bug middle-end/55299] missed optimization: ASR idiom

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=55299 Mikhail Maltsev changed: What|Removed |Added Status|NEW |RESOLVED CC|

[Bug tree-optimization/54579] missed optimization: ASR idiom

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=54579 --- Comment #2 from Mikhail Maltsev --- Author: miyuki Date: Tue May 17 20:50:22 2016 New Revision: 236344 URL: https://gcc.gnu.org/viewcvs?rev=236344=gcc=rev Log: Fold bit_not through ASR and rotate gcc/ PR tree-optimization/54579

[Bug middle-end/55299] missed optimization: ASR idiom

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=55299 --- Comment #3 from Mikhail Maltsev --- Author: miyuki Date: Tue May 17 20:50:22 2016 New Revision: 236344 URL: https://gcc.gnu.org/viewcvs?rev=236344=gcc=rev Log: Fold bit_not through ASR and rotate gcc/ PR tree-optimization/54579

[C++ Patch] PR 69793 ("ICE on invalid code in "cp_lexer_peek_nth_token"")

Hi, this ICE during error recovery exposes a rather more general weakness: we should never call cp_lexer_peek_nth_token (*, 2) when a previous cp_lexer_peek_token returns CPP_EOF. The fix seems easy, just reshape a bit the condition and delay the latter. It should also be a net, albeit

[Bug target/69401] gcc 5.3.0 on microblaze: internal compiler error: in gen_reg_rtx, at emit-rtl.c:1027

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69401 --- Comment #3 from Thomas Petazzoni --- Created attachment 38510 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=38510=edit Pre-processed source code

[Bug target/69401] gcc 5.3.0 on microblaze: internal compiler error: in gen_reg_rtx, at emit-rtl.c:1027

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69401 --- Comment #2 from Thomas Petazzoni --- This still happens with gcc 6.1. With gcc 6.1: - The file can be built with no optimization, with and without -fPIC - The file can be built in -O2 or -O3 without

Re: [PATCH 2/3] function: Factor out make_*logue_seq

On 05/16/2016 07:09 PM, Segher Boessenkool wrote: Make new functions make_split_prologue_seq, make_prologue_seq, and make_epilogue_seq. Tested as in the previous patch; is this okay for trunk? Segher 2016-05-16 Segher Boessenkool * function.c

Re: [PATCH GCC]Enable vect_cond_mixed for AArch64.

On 05/17/2016 03:04 AM, Bin Cheng wrote: Hi, After supporting all vcond/vcondu patterns in AArch64 backend, now we can vectorize VEC_COND_EXPR with different type in comparison operands and value operands on AArch64. GCC uses vect_cond_mixed to control such test cases, for now, there are

[Bug c++/70613] -fabi-version docs don't match implementation

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70613 Jim Wilson changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

Re: New hashtable power 2 rehash policy

On 14/05/2016 19:06, Daniel Krügler wrote: 2016-05-14 18:13 GMT+02:00 François Dumont : New patch attached, tested under linux x86_64. François 1) The function __clp2 is declared using _GLIBCXX14_CONSTEXPR, which means that it is an inline function if and *only* if

[Bug c/71115] Missing warning: excess elements in struct initializer

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71115 Manuel López-Ibáñez changed: What|Removed |Added CC||manu at gcc dot gnu.org ---

[Bug c++/70613] -fabi-version docs don't match implementation

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70613 Andrew Pinski changed: What|Removed |Added Status|RESOLVED|UNCONFIRMED Resolution|FIXED

[Bug c++/69793] ICE on invalid code in "cp_lexer_peek_nth_token"

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69793 Paolo Carlini changed: What|Removed |Added Status|NEW |ASSIGNED Assignee|unassigned

[Bug ipa/71146] [7 Regression] error: __builtin_unreachable or __builtin_trap call with arguments

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71146 --- Comment #11 from Marek Polacek --- Author: mpolacek Date: Tue May 17 20:00:41 2016 New Revision: 236343 URL: https://gcc.gnu.org/viewcvs?rev=236343=gcc=rev Log: PR ipa/71146 * tree-inline.c (expand_call_inline): Call

[PATCH] Fix ICE with redirecting to unreachable in thunks (PR ipa/71146)

Since Honza's change in r236012 we're able to expand thunks inline, and as a side-effect we can redirect call within thunk to __buitin_unreachable (at least that's my understanding ;). But that means we need to employ the maybe_remove_unused_call_args function so that we don't left

Re: [PATCH] c++/60760 - arithmetic on null pointers should not be allowed in constant expressions

On 05/12/2016 06:34 PM, Martin Sebor wrote: Attached is a resubmission of the patch for c++/60760 originally submitted late in the 6.0 cycle along with a patch for c++/67376. Since c++/60760 was not a regression, it was decided that it would be safer to defer the fix until after the 6.1.0

[Committed] jit: gcc diagnostics are jit errors

libgccjit performs numerous checks at the API boundary, but if these succeed, it ignores errors and other diagnostics emitted within the core of gcc, and treats the compile of a gcc_jit_context as having succeeded. This patch ensures that if any diagnostics are emitted, they are visible from the

[Bug middle-end/70526] [5/6 Regression] GCC 6 miscompiles Firefox JIT compiler

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70526 --- Comment #33 from rguenther at suse dot de --- On May 17, 2016 8:55:26 PM GMT+02:00, guido at trentalancia dot net wrote: >https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70526 > >guido at trentalancia dot net changed:

[Committed] jit: document gcc_jit_context_new_call_through_ptr

Every version of libgccjit.h in trunk has had gcc_jit_context_new_call_through_ptr, but it wasn't documented until now. Committed to trunk as r236341. gcc/jit/ChangeLog: * docs/topics/expressions.rst (Function calls): Document gcc_jit_context_new_call_through_ptr. *

[Bug libstdc++/70511] tuple constructor from elements hides copy constructor

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70511 --- Comment #2 from Ivan Le Lann --- It seems that this has been "fixed". Fedora 24, using "gcc (GCC) 6.1.1 20160510 (Red Hat 6.1.1-2)" gives me the intuitive behavior. I did a local revert of this this commit

[Bug c++/71167] New: Long typenames produce extremely hard to read diagnostics and slow down compilation time

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71167 Bug ID: 71167 Summary: Long typenames produce extremely hard to read diagnostics and slow down compilation time Product: gcc Version: 6.0 Status: UNCONFIRMED

[Bug middle-end/70526] [5/6 Regression] GCC 6 miscompiles Firefox JIT compiler

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70526 guido at trentalancia dot net changed: What|Removed |Added CC||guido at trentalancia dot

Re: [PATCH] integer overflow checking builtins in constant expressions

On 05/01/2016 12:39 PM, Martin Sebor wrote: + if (TREE_CODE (arg0) == INTEGER_CST && TREE_CODE (arg1) == INTEGER_CST) +{ + if (tree result = size_binop_loc (EXPR_LOC_OR_LOC (t, input_location), + opcode, arg0, arg1)) + { + if

[Bug fortran/66461] [4.9/5/6/7 Regression] ICE on missing end program in fixed source

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66461 --- Comment #11 from Gerhard Steinmetz --- ... some more variations with slightly different "line breaks" : $ cat z6.f program p integer x x = 0 if ( x > &

Successful bootstrap and install of gcc (GCC) 6.1.0 on sparc64-unknown-linux-gnu

Hi, Here's a report of a successful build and install of GCC: $ gcc-6.1.0/config.guess sparc64-unknown-linux-gnu $ newcompiler/bin/gcc -v Using built-in specs. COLLECT_GCC=newcompiler/bin/gcc

[Bug c++/70613] -fabi-version docs don't match implementation

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70613 Jim Wilson changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug c++/70613] -fabi-version docs don't match implementation

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70613 --- Comment #4 from Jim Wilson --- Author: wilson Date: Tue May 17 18:42:16 2016 New Revision: 236339 URL: https://gcc.gnu.org/viewcvs?rev=236339=gcc=rev Log: Make -fabi-version docs match the implementation. gcc/ PR c++/70613

[Bug c++/70466] [ICE on invalid code in tree check: expected constructor, have parm_decl in convert_like_real, at cp/call.c:6371 with -std=c++11

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70466 Jason Merrill changed: What|Removed |Added CC||jason at gcc dot gnu.org

[Patch] Implement is_[nothrow_]swappable (p0185r1)

This is an implementation of the Standard is_swappable traits according to http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2016/p0185r1.html During that work it has been found that std::array's member swap's exception specification for zero-size arrays was incorrectly depending on the

[Bug rtl-optimization/69008] gcc emits unneeded memory access when passing trivial structs by value (ARM)

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69008 Michael Collison changed: What|Removed |Added Component|target |rtl-optimization --- Comment #3 from

Re: [PATCH] Fix PR71132

On Tue, May 17, 2016 at 5:51 AM, Richard Biener wrote: > > The following fixes a latent issue in loop distribution catched by > the fake edge placement adjustment. > > Bootstrapped and tested on x86_64-unknown-linux-gnu, applied. > > Richard. > > 2016-05-17 Richard Biener

Re: [C++ Patch] PR 70466 ("ICE on invalid code in tree check: expected constructor, have parm_decl in convert_like_real...")

On 05/17/2016 04:47 AM, Paolo Carlini wrote: ... alternately, if the substance of my patchlet is right, we could simplify a bit the logic per the below. Here's a well-formed variant that was accepted by 4.5. Does your patch fix it? I also think with your patch we can drop the C++11 check,

Re: CppCoreGuidelines warnings

On Tue, May 17, 2016 at 8:51 AM, Manuel López-Ibáñez wrote: > Please also note that, in terms of legal papers, the FSF is much more > flexible than one may think, but they are not very pro-active or fast > (in my past experience, things may have changed now). If you find

[Bug target/71153] aarch64 LSE __atomic_fetch_and() generates inversion for constants

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71153 --- Comment #7 from Andrew Pinski --- Created attachment 38509 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=38509=edit Full fix which needs full testing I think I have a full fix. Basically there is no reason why we can't expand

Re: PING^5 [PATCH, GCC 5] PR 70613, -fabi-version docs don't match implementation

On May 17, 2016, at 8:19 AM, Sandra Loosemore wrote: > > I thought I remembered mail going by that changes to a release branch require > RM approval too. For time to time, the RM can close any release branch at any time for any reason. :-) For example, a gcc 3.2.x

[gomp4.5] Minor OpenMP 4.5 fortran translation fixes, 3 new taskloop testcases

Hi! Tested on x86_64-linux, committed to gomp-4_5-branch. 2016-05-17 Jakub Jelinek * trans-openmp.c (gfc_split_omp_clauses): Handle EXEC_OMP_TARGET_SIMD. (gfc_trans_omp_teams): Don't wrap into OMP_TEAMS if -fopenmp-simd. (gfc_trans_omp_target): Set

[Bug c/18063] Gcc doesn't check overflowed size of structure

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=18063 Martin Sebor changed: What|Removed |Added Last reconfirmed|2005-09-18 01:37:52 |2016-5-17 CC|

[Bug c++/71166] New: ICE with nested constexpr/initializer

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71166 Bug ID: 71166 Summary: ICE with nested constexpr/initializer Product: gcc Version: 6.1.1 Status: UNCONFIRMED Severity: normal Priority: P3 Component: c++

[Bug ipa/71146] [7 Regression] error: __builtin_unreachable or __builtin_trap call with arguments

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71146 Marek Polacek changed: What|Removed |Added Status|NEW |ASSIGNED Assignee|unassigned

[Bug ipa/71146] [7 Regression] error: __builtin_unreachable or __builtin_trap call with arguments

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71146 --- Comment #9 from Jan Hubicka --- Aha, this is because we do not re-evaulate the predicates for inlined edges and in the inline order we first inline into thunk and then inline thunk. This results in some extra work done by tree-inline but is

[Bug c++/71165] New: std::array with aggregate initialization generates huge code

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71165 Bug ID: 71165 Summary: std::array with aggregate initialization generates huge code Product: gcc Version: 5.3.1 Status: UNCONFIRMED Severity: normal

[GCC 6] [PR target/70860] [nvptx] Handle NULL cfun in nvptx_libcall_value

Hi! On Thu, 28 Apr 2016 12:26:24 +0200, I wrote: > Richard's r235511 changes (quoted below) cause certain nvptx offloading > test cases to run into SIGSEGVs: With these changes recently having been ported to gcc-6-branch in r236210, these failures/regressions now also show up there: > [...]

[Bug ipa/71146] [7 Regression] error: __builtin_unreachable or __builtin_trap call with arguments

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71146 Jan Hubicka changed: What|Removed |Added CC||hubicka at gcc dot gnu.org --- Comment #8

[Bug target/70860] [nvptx] Revisit cfun->machine->doing_call

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70860 --- Comment #2 from Thomas Schwinge --- Author: tschwinge Date: Tue May 17 16:08:37 2016 New Revision: 236326 URL: https://gcc.gnu.org/viewcvs?rev=236326=gcc=rev Log: [PR target/70860] [nvptx] Handle NULL cfun in nvptx_libcall_value Backport

Re: [PATCH][AArch64] Improve aarch64_modes_tieable_p

James Greenhalgh wrote: > It would be handy if you could raise something in bugzilla for the > register allocator deficiency. The register allocation issues are well known and we have multiple workarounds for this in place. When you allow modes to be tieable the workarounds are not as effective.

[Bug c/71115] Missing warning: excess elements in struct initializer

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71115 Martin Sebor changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug tree-optimization/71120] [6/7 Regression] Aliasing "struct sockaddr_storage" produces invalid code due to SRA

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71120 Martin Jambor changed: What|Removed |Added Assignee|unassigned at gcc dot gnu.org |jamborm at gcc dot gnu.org ---

[Bug tree-optimization/71120] [6/7 Regression] Aliasing "struct sockaddr_storage" produces invalid code due to SRA

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71120 Richard Biener changed: What|Removed |Added CC||jamborm at gcc dot gnu.org

[Bug target/49244] __sync or __atomic builtins will not emit 'lock bts/btr/btc'

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=49244 --- Comment #20 from dhowells at redhat dot com --- Here's a further underoptimisation with -Os: bool foo_test_and_change_bit(unsigned long *p) { return test_and_change_bit(83, p); } is compiled to: 0015 :

Re: [PATCH][AArch64] Adjust SIMD integer preference

ping From: Wilco Dijkstra Sent: 22 April 2016 16:35 To: gcc-patches@gcc.gnu.org Cc: nd Subject: [PATCH][AArch64] Adjust SIMD integer preference SIMD operations like combine prefer to have their operands in FP registers, so increase the cost of integer

[Bug fortran/70856] [6/7 Regression] ICE with -fopenacc in get_constraint_for_ssa_var, at tree-ssa-structalias.c:2952

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70856 Martin Liška changed: What|Removed |Added CC||marxin at gcc dot gnu.org --- Comment #7

[Bug target/70981] [7 regression] gcc.target/i386/avx512f-vprord-1.c FAILs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70981 Kirill Yukhin changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

Re: [PATCH, wide-int] change fixed_wide_int_storage from class to struct

On May 15, 2016, at 1:30 PM, Andrew Pinski wrote: > > Can we recommend that clang disable this warning by default instead? No. We want to ensure the class/struct tags match as there is no good reason to have them differ. > Or use an option flag to disable the warning while

Re: RFA: Generate normal DWARF DW_LOC descriptors for non integer mode pointers

On 05/17/2016 06:37 AM, Nick Clifton wrote: Hi Jeff, Currently dwarf2out.c:mem_loc_descriptor() has some special case code to handle the situation where an address is held in a register whose mode is not of type MODE_INT. It generates a DW_OP_GNU_regval_type expression which may later

[Bug libgcc/70720] moxie-rtems stanza does not include crti/crtn extra_parts

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70720 Joel Sherrill changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug c++/71164] New: tree check fail at cp/pt.c:12961

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71164 Bug ID: 71164 Summary: tree check fail at cp/pt.c:12961 Product: gcc Version: 7.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: c++

Re: [PATCH][RFC] Introduce BIT_FIELD_INSERT

Hi, On Tue, 17 May 2016, Richard Biener wrote: > BIT_INSERT_EXPR This. > Any preference? Ciao, Michael.

Re: PING^5 [PATCH, GCC 5] PR 70613, -fabi-version docs don't match implementation

On 05/17/2016 03:27 AM, Ramana Radhakrishnan wrote: On Tue, May 17, 2016 at 1:22 AM, Sandra Loosemore wrote: On 05/16/2016 04:35 PM, Jim Wilson wrote: This is my fifth ping. I just need someone to rubber stamp it so I can check it in. The documentation change

[Bug sanitizer/71158] ICE in tree_to_uhwi with -fsanitize=address

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71158 Martin Sebor changed: What|Removed |Added Blocks||16994 --- Comment #3 from Martin Sebor

Re: [PATCH, GCC] PR middle-end/55299, fold bitnot through ASR and rotates

On Tue, May 17, 2016 at 4:05 PM, Marc Glisse wrote: > On Tue, 17 May 2016, Richard Biener wrote: > >> On Fri, May 13, 2016 at 3:36 PM, Marc Glisse wrote: >>> >>> On Fri, 13 May 2016, Mikhail Maltsev wrote: >>> > I don't know if we might want some

[Bug target/71153] aarch64 LSE __atomic_fetch_and() generates inversion for constants

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71153 --- Comment #6 from ktkachov at gcc dot gnu.org --- (In reply to ktkachov from comment #5) > In the foo_clear_bit_unlock case combine tries to match: > (parallel [ > (set (mem/v:DI (reg:DI 88) [-1 S8 A64]) >

[Bug bootstrap/71134] GCC fails to build with in-tree dependencies: missing libopcodes

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71134 --- Comment #3 from Dan Collins --- https://gcc.gnu.org/install/download.html states that you can "unpack the binutils distribution either in the same directory or a separate one"

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