[Committed] IBM Z: Fix ICE in expand_perm_as_replicate

The current implementation assumes to always be invoked with register operands. For memory operands we even have an instruction though (vlrep). With the patch we try this first and only if it fails force the input into a register and continue. vec_splats generation fails for single element 128bit

Re: How to target a processor with very primitive addressing modes?

* Jeff Law via Gcc: > If he's got a CC register exposed prior to LRA and LRA needs to insert > any code, that inserted code may clobber the CC state. This is > discussed in the reload-to-LRA transition wiki page. Do you mean the CC0 conversion page? T

Re: Building libgccjit with -fno-semantic-interposition? ( was Re: 1.76% performance loss in VRP due to inlining)

Andrea Corallo via Gcc writes: >> FWIW I've no idea if any libgccjit users are using semantic >> interposition; I suspect the answer is "no one is using it". >> >> Antoyo, Andrea [also CCed]: are either of you using semantic >> interposition of symbols within libgccjit? > > Hi David, > > AFAIU i

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Re: How to target a processor with very primitive addressing modes?

> On Jun 10, 2024, at 4:47 AM, Florian Weimer via Gcc wrote: > > * Jeff Law via Gcc: > >> If he's got a CC register exposed prior to LRA and LRA needs to insert >> any code, that inserted code may clobber the CC state. This is >> discussed in the reload-to-LRA transition wiki page. > > Do y

Re: What is the purpose of these two fixincludes?

On Thu, Jun 6, 2024 at 6:22 AM FX Coudert via Gcc wrote: > Hi, > > > I usually just install with install-no-fixedincludes, but really this > > should probably be a configure option and default to on. > > It would be great if we could measure what fixincludes are still needed, > on which targets.

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Re: How to target a processor with very primitive addressing modes?

Am 08.06.24 um 11:32 schrieb Mikael Pettersson via Gcc: On Thu, Jun 6, 2024 at 8:59 PM Dimitar Dimitrov wrote: Have you tried defining TARGET_LEGITIMIZE_ADDRESS for your target? From a quick search I see that the iq2000 and rx backends are rewriting some PLUS expression addresses with insn s

Re: How to target a processor with very primitive addressing modes?

> On Jun 10, 2024, at 11:48 AM, Georg-Johann Lay wrote: > > > > Am 08.06.24 um 11:32 schrieb Mikael Pettersson via Gcc: >> On Thu, Jun 6, 2024 at 8:59 PM Dimitar Dimitrov wrote: >>> Have you tried defining TARGET_LEGITIMIZE_ADDRESS for your target? From >>> a quick search I see that the iq2

Re: What is the purpose of these two fixincludes?

> Laugh or cry. Wow. But how does any other compiler deal with them? I’ve pushed the change as https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=66d6b1861ec57ba29540a5fa7854df3978ba5409 Please let me know if you see any issue in the next tests. FX