Re: Back End Responsibilities + RTL Generation

2006-12-15 Thread Frank Riese
On Thursday 14 December 2006 08:32, you wrote: > The data structures for the CFG are in basic-block.h. These data > structures are most definitely *not* incorporated into the RTL > structures. The CFG is independent of the intermediate > representations for the function instructions. It has to b

Back End Responsibilities + RTL Generation

2006-12-13 Thread Frank Riese
Hi! I need some clearification concerning the responsibilities of Middle End, Back End, the generation of the control flow graph (CFG) and RTL. I looked at several articles about the internal structure of the GCC and looked at the internals documentation. However, I would like to have a second

Re: "insn outside basic block" in custom back end

2006-11-28 Thread Frank Riese
On Thursday 19 October 2006 23:10, Rask Ingemann Lambertsen wrote: >Also, looking at the insns added during the vregs pass, notice that some > of them use HImode registers. Have you forgotten to change something from > HImode to QImode? Maybe your Pmode? For example, this sequence is clearly >

Re: "insn outside basic block" in custom back end

2006-10-19 Thread Frank Riese
On Wednesday 18 October 2006 15:45, you wrote: >-fdump-rtl-all-details will give you an idea of how far the compiler > gets, and thus maybe a clue to which pass runs into problems. Also, a > backtrace from the debugger is nice to have. Here is the backtrace from gdb: Breakpoint 2, rtl_verify_

"insn outside basic block" in custom back end

2006-10-17 Thread Frank Riese
Hi, I have the following problem with a back end I've written after the following changes in the machine header, to tell GCC that the machine is word-addressed with a word width of 16 Bit: #define BITS_PER_UNIT 16 #define UNITS_PER_WORD 1 #define BITS_PER_WORD 16 A

Re: Reloading Problems and Memory Addressing

2006-04-24 Thread Frank Riese
On Monday 24 April 2006 17:59, Frank Riese wrote: > With my limited experience I would say that this tells me that the compiler > gradually uses up all available registers and then, instead of freeing one, > it complains that it hasn't any left (as a reminder: registers 3-7 are my

Re: Reloading Problems and Memory Addressing

2006-04-24 Thread Frank Riese
On Wednesday 12 April 2006 15:43, Rask Ingemann Lambertsen wrote: > On Wed, Apr 12, 2006 at 07:47:32AM +0200, Frank Riese wrote: > > On Monday 10 April 2006 19:48, you wrote: > > > Can it at least add (small) immediates to registers? > > > > Nope, sry. The onl

Re: Reloading Problems and Memory Addressing

2006-04-11 Thread Frank Riese
On Monday 10 April 2006 19:48, you wrote: > Can it at least add (small) immediates to registers? Nope, sry. The only instructions that take other arguments than registers are the aforementioned LDL/LDH (load low/high), branch instructions (they take a memory address) and four bit operations whic

Reloading Problems and Memory Addressing

2006-04-10 Thread Frank Riese
Hi! Im writing a backend for GCC 4.0-2 for a simple machine with a rather limited instruction set. With the kind help of Ian Lance Taylor I was already able to solve a few big problems I had earlier. Now I am stuck on another problem that IMHO concerns reloading. Most of the instructions of t