?
Thanks again.
Shiva
2015-04-18 0:03 GMT+08:00 Jeff Law :
> On 04/17/2015 03:57 AM, Shiva Chen wrote:
>>
>> Hi,
>>
>> I think the rtl dump in
>> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64916
>> is not jump2 phase rtl dump.
>>
>> Because jump2 i
)))
+ return dir_none;
+}
+ else
+{
+ if (!CONST_INT_P (SET_SRC (s2))
+ || !rtx_equal_p (XEXP (note1, 0), SET_SRC (s2)))
+ return dir_none;
+}
+
I'm not sure the idea is ok or it might crash something.
Any suggestion would be very helpful.
Thanks in advance.
Shiva Chen
check the aarch64_layout_frame() and find out the FP/LP will
push as last register by aarch64_save_or_restore_callee_save_registers
() if FP is not needed.
Thanks for your kindly help,
I really appreciate it.
Shiva
2014-02-13 22:32 GMT+08:00 Renlin Li :
> On 13/02/14 02:14, Shiva Chen wrote:
>>
&g
fp_offset
+ 2* UNITS_PER_WORD));
Or I just mis-understanding something ?
Hope someone could give me a tip.
It would be very helpful.
Thanks
Shiva Chen
2013/7/16 Hendrik Greving :
> Along the same lines, what's the difference of target_flags (I know
> from old compilers) and target_flags_explicit (I do not know)?
>
> Thanks,
> Regards,
> Hendrik Greving
>
> On Mon, Jul 15, 2013 at 10:30 AM, Hendrik Greving
> wrote:
>> Hi,
>>
>> when defining targ
Thank you for all your kindly help make the issue more clear.
Currently, we would disable abssi2 pattern and the soft-fp could work correctly.
Thanks all the explanation and assistance.
I really appreciate it.
2013/6/30 Joseph S. Myers :
> On Sun, 30 Jun 2013, Shiva Chen wrote:
>
>>
e abs instruction if the target abs have
saturation behavior ?
We couldn't use abssi2 naming pattern and ss_abssi2 naming pattern
doesn't exist.
Or we should suggest CPU provider define another abs instruction
without saturation ?
2013/6/28 Joseph S. Myers :
> On Fri, 28 Jun 2013, Shiva Che
rote:
>
>> On 06/28/2013 08:53 AM, Shiva Chen wrote:
>>>
>>> I have a case which will generate abs instructions.
>>>
>>> int main(int argc)
>>> {
>>> if (argc < 0)
>>>argc = -(unsigned int)argc;
>>>
Hi,
I have a case which will generate abs instructions.
int main(int argc)
{
if (argc < 0)
argc = -(unsigned int)argc;
return argc;
}
To my understanding, given that argc=0x8000 in 32bit int plaform,
the result of (unsigned int)argc is well defined and should be 0x8000
t gcc/ChangeLog is as below:
2013-04-23 Shiva Chen
* lra-assigns.c (find_hard_regno_for): Use lra_reg_val_equal_p
to check the register content is equal or not.
* lra-constraints.c (match_reload): Use lra_assign_reg_val
to assign register content record.
info[i].restore_regno = -1;
lra_reg_info[i].val = get_new_reg_value ();
+ lra_reg_info[i].offset = 0;
lra_reg_info[i].copies = NULL;
}
2013/4/20 Vladimir Makarov :
> On 13-04-17 11:11 PM, Shiva Chen wrote:
>>
>> Hi, Vladimir
>>
>> Overlapped live range RTL is from li
riginal)].val;
+ lra_reg_info[REGNO (new_reg)].offset = 0;
+}
return new_reg;
}
Thanks for the comment :)
Shiva
2013/4/18 Shiva Chen :
> Full test2.c.209r.reload is about 296kb and i can't send successfully.
> Is there another way to send the dump file?
>
> Shiva
>
>
Full test2.c.209r.reload is about 296kb and i can't send successfully.
Is there another way to send the dump file?
Shiva
2013/4/18 Shiva Chen :
> Hi, Vladimir
>
> attachment is the ira dump of the case
>
> Shiva
>
> 2013/4/17 Vladimir Makarov :
>> On 13
HI,
I'm trying to port a new 32bit target to GCC 4.8.0 with LRA enabled
There is an error case which generates following RTL
(insn 536 267 643 3 (set (reg/f:SI 0 $r0 [477]) <== r477 assign to r0
(plus:SI (reg/f:SI 31 $sp)
(const_int 112 [0x70]))) test2.c:95 64 {*addsi3}
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