On Wed, Jun 27, 2007 at 11:26:41AM +1000, Hasjim Williams wrote:
G'day all,
As I wrote previously on gcc-patches (
http://gcc.gnu.org/ml/gcc-patches/2007-06/msg00244.html ), I'm working
on code to get the MaverickCrunch Floating-Point Co-processor supported
on ARM. I mentioned previously
if (get_attr_cirrus (prev_active_insn(insn)) == CIRRUS_COMPARE)
return \beq\\t%l0\;bvs\\t%l0\; else return \bge\\t%l0\;nop\;
[(set_attr conds jump_clob)
(set_attr length 8)]
)
As you can see, I need to replace all bge with a maverick crunch
equivalent. However, bge is still
On Wed, 27 Jun 2007 08:17:47 +0200, Paolo Bonzini [EMAIL PROTECTED]
said:
if (get_attr_cirrus (prev_active_insn(insn)) == CIRRUS_COMPARE)
return \beq\\t%l0\;bvs\\t%l0\; else return \bge\\t%l0\;nop\;
[(set_attr conds jump_clob)
(set_attr length 8)]
)
As you can
On Wed, 27 Jun 2007 18:15:12 +1000, Hasjim Williams [EMAIL PROTECTED]
said:
if_then_else (ge (match_operand:CCFP 1 cc_register ) (const_int 0))
if_then_else (ge:CCFP (match_operand 1 cc_register ) (const_int 0))
Is the second line still valid syntax?
The second line doesn't work. The
On Wed, Jun 27, 2007 at 06:45:26PM +1000, Hasjim Williams wrote:
On Wed, 27 Jun 2007 18:15:12 +1000, Hasjim Williams [EMAIL PROTECTED]
said:
if_then_else (ge (match_operand:CCFP 1 cc_register ) (const_int 0))
if_then_else (ge:CCFP (match_operand 1 cc_register ) (const_int 0))
Is
G'day all,
As I wrote previously on gcc-patches (
http://gcc.gnu.org/ml/gcc-patches/2007-06/msg00244.html ), I'm working
on code to get the MaverickCrunch Floating-Point Co-processor supported
on ARM. I mentioned previously that you can't use the same opcodes for
testing GE on the
