On Mon, 16 Feb 2009 10:17:36 -0500
Daniel Jacobowitz wrote:
> On Mon, Feb 16, 2009 at 12:19:52PM +0100, Vincent R. wrote:
> > 00011000 :
> > [...]
>
> Notice how many more registers used to be pushed? I expect the new
> code is faster.
Assuming an ARM7 core with 0 wait-state memory and removin
On Monday 16 February 2009 11:19:52, Vincent R. wrote:
> I used to have .align 0 with gcc-4.1 and now I get a .align 4, how can I
> change that ?
It was a bug in the patches I had sent you months ago. I've posted the
latest patch I had here at cegcc-devel@ --- it should fix this.
--
Pedro Alves
On Mon, Feb 16, 2009 at 12:19:52PM +0100, Vincent R. wrote:
> 00011000 :
>11000: e92d40f0push{r4, r5, r6, r7, lr}
>11004: e1a04000mov r4, r0
>11008: e1a05001mov r5, r1
>1100c: e1a06002mov r6, r2
>11010: e1a07003
Hi,
I am comparing the assembly generated by compilers targeting arm-wince
platform and it seems
that cross-compiler from gcc-trunk is less optimized than an old one based
on gcc 4.1.x
Here is the comparison obtained from objdump:
cegcc-4.1.x :
00011000 :
11000: e92d40f0push
