Michael Hope schrieb:
The problem is when I have to clobber ACC such as when moving between
registers. The output should be:
LOADACC, R10; STOREACC, R11 (equivalent to ACC = R10; R11 = ACC)
I've tried a parallel clobber like:
(define_insn "movsi"
[(set (match_operand:SI 0 "nonimmediate_oper
st of
the redundant instructions. If need be, you might add a machine
dependent reorg pass that cleans up the code even more. You can have
post-reload patterns by checking for reload_completed in the condition.
There have been some ports to small accumulator based machines, but
mostly they
Hi there. The machine I'm working is part accumulator based, part
register based. I'm having trouble figuring out how best to tell the
compiler how ACC is affected and when.
For example, the add instruction is two operand with the destination
being a general register:
ADD, R11 is equivalent to
