I've been trying off and on for a couple of days to create a machine
description that handles the following target and produces the output I
am hoping for.
The CPU has a 16 bit word size - and only has word size registers. As a
consequence it sign or zero extends when loading byte operands -
On 01/05/2012 10:33 PM, Paul S wrote:
> (define_insn "addqi3i"
> [(set (match_operand:HI 0 "register_operand" "=r")
> (plus:HI (match_operand:HI 1 "register_operand" "%0")
> (sign_extend:HI (match_operand:QI 2 "memory_operand" "m"]
Two things are wrong with this pattern:
(1) % is incorrect b
Thanks Richard,
The penny dropped when I read your comment about the % operator. item
(2) send me back to the gcc internals document (again !) and I had the
problem sorted in about half an hour.
Thanks again,
Paul.
On 06/01/12 08:23, Richard Henderson wrote:
On 01/05/2012 10:33 PM, Paul S w
