>> approach, as it takes effect after all other instruction rearrangement
>> is complete, but there are existing backends which use the former.
>>
>> For an example of inserting nops in TARGET_MACHINE_DEPENDENT_REORG,
>> see the MIPS backend, specifically mips_avoid_ha
rearrangement
> is complete, but there are existing backends which use the former.
>
> For an example of inserting nops in TARGET_MACHINE_DEPENDENT_REORG,
> see the MIPS backend, specifically mips_avoid_hazards. For an example
> of inserting nops in TARGET_ASM_FUNCTION_PROLOGUE, s
petruk_gile <[EMAIL PROTECTED]> writes:
> I'm a pure beginner in GCC, and currently working on a project to implement
> instruction scheduling for a new DSP processor. This processor doesn't have
> pipeline interlock, so the compiler HAVE to schedule the instruction without
> relying on hardware h
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