On Wed, Jun 19, 2013 at 11:04:25AM -0500, Peter Bergner wrote:
> On Tue, 2013-06-18 at 21:48 +0200, Andi Kleen wrote:
> > > Given Torvald's comment, can you verify whether your hw txn succeeds
> > > (all the way to commit) or whether it is failing and somehow skips
> > > the fall through code that
On Tue, 2013-06-18 at 21:48 +0200, Andi Kleen wrote:
> > Given Torvald's comment, can you verify whether your hw txn succeeds
> > (all the way to commit) or whether it is failing and somehow skips
> > the fall through code that is hanging for us (Power and S390)?
>
> All the 3 transactions in reen
> Given Torvald's comment, can you verify whether your hw txn succeeds
> (all the way to commit) or whether it is failing and somehow skips
> the fall through code that is hanging for us (Power and S390)?
All the 3 transactions in reentrant.c abort. That's not surprising,
because there are usually
On Tue, 2013-06-18 at 18:41 +0200, Torvald Riegel wrote:
> On Fri, 2013-06-14 at 19:44 -0500, Peter Bergner wrote:
> > I'll note that if I hack the call to
> > htm_abort_should_retry(ret) so that we break of of the loop and fallback
> > to SW TM, then the test case executes correctly.
>
> That mat
On Tue, 2013-06-18 at 11:22 -0700, Andi Kleen wrote:
> Peter Bergner writes:
> >
> > I have yet to track down who has the write lock and why, but I am working
> > towards that. Talking with Andreas, he said he is seeing the same failure
> > on S390, so I'm wondering whether this might be a generi
Peter Bergner writes:
>
> I have yet to track down who has the write lock and why, but I am working
> towards that. Talking with Andreas, he said he is seeing the same failure
> on S390, so I'm wondering whether this might be a generic libitm issue
> and it might hit Intel too. Does anyone know
On Fri, 2013-06-14 at 19:44 -0500, Peter Bergner wrote:
> I'm currently implementing support for hardware transactional memory in
> the rs6000 backend for POWER8. Things seem to be mostly working, but I
> have run into a few issues I'm wondering whether other people are seeing.
>
> For me, all of
Hi Peter,
On Sat, Jun 15, 2013 at 2:44 AM, Peter Bergner wrote:
> I'm currently implementing support for hardware transactional memory in
> the rs6000 backend for POWER8. Things seem to be mostly working, but I
> have run into a few issues I'm wondering whether other people are seeing.
It sound
I'm currently implementing support for hardware transactional memory in
the rs6000 backend for POWER8. Things seem to be mostly working, but I
have run into a few issues I'm wondering whether other people are seeing.
For me, all of the libitm execution test cases in libitm/testsuite/libitm.c/
com
