Re: missing optimization a (b 63) to a b

2013-01-17 Thread Richard Biener
On Thu, Jan 17, 2013 at 2:44 AM, Wei Mi w...@google.com wrote: Hi, For x86, shift insn will automatically mask the count to 5 bits in 32 bit mode and to 6 bits in 64 bit mode, so for the testcase below, the buf_ (-end 63) could be optimized to buf_ -end. But for trunk compiler, some place

Re: missing optimization a (b 63) to a b

2013-01-17 Thread Xinliang David Li
Or better way to solve the problem? Appreciated a lot! Combine / simplify-rtx should recognize this at the RTL level for SHIFT_COUNT_TRUNCATED targets. IIUC, combine uses UD chains (LOG links) which is best suitable for cases where this is only one downward uses of the def. The example here

missing optimization a (b 63) to a b

2013-01-16 Thread Wei Mi
Hi, For x86, shift insn will automatically mask the count to 5 bits in 32 bit mode and to 6 bits in 64 bit mode, so for the testcase below, the buf_ (-end 63) could be optimized to buf_ -end. But for trunk compiler, some place in the testcase is not optimized. typedef unsigned long long

Re: missing optimization a (b 63) to a b

2013-01-16 Thread Xinliang David Li
[cc list trimmed] On Wed, Jan 16, 2013 at 5:44 PM, Wei Mi w...@google.com wrote: Hi, For x86, shift insn will automatically mask the count to 5 bits in 32 bit mode and to 6 bits in 64 bit mode, so for the testcase below, the buf_ (-end 63) could be optimized to buf_ -end. But for trunk