Some progress... the scheduler is willing to schedule them together if
I define the SCHED_REORDER2 hook (just SCHED_REORDER was
insufficient), and always return the number of ready insns. In my
case, the VLIW packing restrictions are fully defined by a DFA; I
don't need to further restrict packin
> The problem may be in the dependency cost between the SET (insn 27)
> and the USE (insn 30) being >= 1. Have you tried using
> targetm.sched.adjust_cost() hook to set the cost of USE to 0?
It doesn't get called for those two insns.
> Anyway, this seems strange, the scheduler should just outpu
DJ Delorie wrote:
I'm working on a VLIW coprocessor for MeP. One thing I noticed is
that sched2 won't bundle the function's RET with the insn that sets
the return value register, apparently because there's an intervening
USE of that register (insn 30 in the example below).
Is there any way arou
I'm working on a VLIW coprocessor for MeP. One thing I noticed is
that sched2 won't bundle the function's RET with the insn that sets
the return value register, apparently because there's an intervening
USE of that register (insn 30 in the example below).
Is there any way around this? The retur