[Bug target/99988] aarch64: GCC generates excessive consecutive bti j instructions

2021-04-09 Thread acoplan at gcc dot gnu.org via Gcc-bugs
|1 Assignee|unassigned at gcc dot gnu.org |acoplan at gcc dot gnu.org Last reconfirmed||2021-04-09 --- Comment #2 from Alex Coplan --- Taking a look at this.

[Bug target/99988] aarch64: GCC generates excessive consecutive bti j instructions

2021-04-09 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99988 Alex Coplan changed: What|Removed |Added Known to fail||10.3.1, 9.3.1 --- Comment #1 from Alex Cop

[Bug target/99988] New: aarch64: GCC generates excessive consecutive bti j instructions

2021-04-09 Thread acoplan at gcc dot gnu.org via Gcc-bugs
Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- Created attachment 50535 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=50535&action=edit minimal reproducer For the a

[Bug target/99977] arm: ICE with __sync_bool_compare_and_swap and -mcpu=cortex-m23

2021-04-09 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99977 Alex Coplan changed: What|Removed |Added Assignee|unassigned at gcc dot gnu.org |acoplan at gcc dot gnu.org Last

[Bug target/99977] arm: ICE with __sync_bool_compare_and_swap and -mcpu=cortex-m23

2021-04-08 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99977 --- Comment #1 from Alex Coplan --- I should have mentioned the testcase was reduced from gcc.dg/ia64-sync-3.c.

[Bug target/99977] New: arm: ICE with __sync_bool_compare_and_swap and -mcpu=cortex-m23

2021-04-08 Thread acoplan at gcc dot gnu.org via Gcc-bugs
Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- The following fails: $ cat t1.c int a[1]; void f() { __sync_bool_compare_and_swap(a, -1, 0); } $ arm-eabi-gcc -c t1.c -mcpu=cortex-m23

[Bug target/99647] arm: GCC generates invalid MVE vmov instruction

2021-04-08 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99647 --- Comment #4 from Alex Coplan --- Fixed on trunk so far.

[Bug target/99960] MVE: Wrong code storing V2DI vector

2021-04-07 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99960 --- Comment #1 from Alex Coplan --- Looks like both loads and stores are wrong in V2DImode: typedef long long __attribute((vector_size(16))) v2di; v2di load(v2di *p) { return *p; } void store(v2di *p, v2di v) { *p = v; } gives: load: v

[Bug target/99960] New: MVE: Wrong code storing V2DI vector

2021-04-07 Thread acoplan at gcc dot gnu.org via Gcc-bugs
Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- For the following testcase: typedef long long v2di __attribute((vector_size(16))); void foo(v2di *p) { *p = (v2di){ 1, 2 }; } we miscompile it at -O2 -march=armv8.1-m.main+mve

[Bug testsuite/99955] New: gcc.c-torture/execute/pr92618.c violates strict aliasing rules

2021-04-07 Thread acoplan at gcc dot gnu.org via Gcc-bugs
Priority: P3 Component: testsuite Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- The above execution test trips the strict aliasing warnings: aarch64-linux-gnu-gcc -O2 -Wall gcc/testsuite/gcc.c-torture/execute

[Bug target/99929] SVE: Wrong code at -O2 -ftree-vectorize

2021-04-06 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99929 --- Comment #1 from Alex Coplan --- Slightly cleaner testcase: #include static void e(short *g, short p2) { *g ^= p2; } static short m[23]; int main() { for (unsigned i = 0; i < 23; ++i) m[i] = 4; if (svaddv(svptrue_pat_b32(SV_VL1), svd

[Bug target/99929] New: SVE: Wrong code at -O2 -ftree-vectorize

2021-04-06 Thread acoplan at gcc dot gnu.org via Gcc-bugs
Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- AArch64 GCC miscompiles the following testcase: #include static void e(unsigned long long *g, int p2) { *g ^= p2; } static unsigned long long b; static int f[1][1][1][1]; static

[Bug target/99748] MVE: Wrong code at -O0 with float to integer conversion

2021-04-06 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99748 --- Comment #5 from Alex Coplan --- Fixed on trunk so far, needs a backport to GCC 10.

[Bug target/99867] [10/11 Regression] ICE in to_constant, at poly-int.h:504

2021-04-01 Thread acoplan at gcc dot gnu.org via Gcc-bugs
||acoplan at gcc dot gnu.org Known to fail||10.2.1, 11.0 Status|UNCONFIRMED |NEW Last reconfirmed||2021-04-01 Summary|[11 Regression] ICE in |[10/11 Regression] ICE in

[Bug target/99647] arm: GCC generates invalid MVE vmov instruction

2021-04-01 Thread acoplan at gcc dot gnu.org via Gcc-bugs
gcc dot gnu.org |acoplan at gcc dot gnu.org Last reconfirmed||2021-04-01 Ever confirmed|0 |1 --- Comment #2 from Alex Coplan --- Taking a look at this.

[Bug target/99748] MVE: Wrong code at -O0 with float to integer conversion

2021-03-31 Thread acoplan at gcc dot gnu.org via Gcc-bugs
dot gnu.org |acoplan at gcc dot gnu.org Last reconfirmed||2021-03-31 Status|UNCONFIRMED |ASSIGNED --- Comment #3 from Alex Coplan --- I'm taking a look.

[Bug rtl-optimization/99469] ICE: qsort checking failed with selective scheduling on aarch64

2021-03-31 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99469 --- Comment #3 from Alex Coplan --- Started with r8-6635-g3f26f054872c375e7f9a80ede7a56036d9b57597.

[Bug tree-optimization/97849] [10 Regression] aarch64: ICE (segfault) during GIMPLE pass: ifcvt since r10-3543-gf30b3d28

2021-03-31 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97849 Alex Coplan changed: What|Removed |Added Resolution|--- |FIXED Status|ASSIGNED

[Bug target/99792] MVE: Assemble failure with "branch out of range" at -O3

2021-03-31 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99792 --- Comment #2 from Alex Coplan --- Ok, I'd guess it just exposes a latent backend / rtl-optimization issue then

[Bug rtl-optimization/98601] [8/9/10/11 Regression] aarch64: ICE in rtx_addr_can_trap_p_1, at rtlanal.c:467

2021-03-31 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98601 Alex Coplan changed: What|Removed |Added Status|UNCONFIRMED |NEW Ever confirmed|0

[Bug rtl-optimization/98601] [8/9/10/11 Regression] aarch64: ICE in rtx_addr_can_trap_p_1, at rtlanal.c:467

2021-03-31 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98601 Alex Coplan changed: What|Removed |Added Target Milestone|--- |11.0

[Bug rtl-optimization/98601] [8/9/10/11 Regression] aarch64: ICE in rtx_addr_can_trap_p_1, at rtlanal.c:467

2021-03-31 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98601 Alex Coplan changed: What|Removed |Added Summary|aarch64: ICE in |[8/9/10/11 Regression] |

[Bug target/97701] [10 Regression] aarch64: ICE in extract_constrain_insn since r10-4447-g095f78c6

2021-03-31 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97701 --- Comment #15 from Alex Coplan --- So fixed everywhere?

[Bug rtl-optimization/99830] [11 Regression] ICE: in lra_eliminate_regs_1, at lra-eliminations.c:659 with -O2 -fno-expensive-optimizations -fno-split-wide-types -g

2021-03-30 Thread acoplan at gcc dot gnu.org via Gcc-bugs
||acoplan at gcc dot gnu.org Status|UNCONFIRMED |NEW Ever confirmed|0 |1 --- Comment #1 from Alex Coplan --- Confirmed. Started with r11-5185-gd0d8b5d83614d8f0d0e40c0520d4f40ffa01f8d9 so must be latent. I'll see if

[Bug target/99829] New: MVE: ICE in lra_assign at -O3

2021-03-30 Thread acoplan at gcc dot gnu.org via Gcc-bugs
Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- The following fails: $ arm-eabi-gcc -c -xc++ gcc/testsuite/c-c++-common/torture/vshuf-v16qi.c -march=armv8.1-m.main+mve -mfloat-abi=hard -mtune=cortex-m7 -O3 during RTL pass: reload In file

[Bug target/99820] aarch64: ICE (segfault) in aarch64_analyze_loop_vinfo with -moverride=tune=use_new_vector_costs

2021-03-29 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99820 Alex Coplan changed: What|Removed |Added Known to fail||11.0 Target Milestone|---

[Bug target/99820] New: aarch64: ICE (segfault) in aarch64_analyze_loop_vinfo with -moverride=tune=use_new_vector_costs

2021-03-29 Thread acoplan at gcc dot gnu.org via Gcc-bugs
Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- The following fails: $ cat test.c extern short a[]; void f() { for (int i = 0; i < 100; i++)

[Bug target/97252] arm: ICE compiling pure-code/pr94538-2.c with MVE since r10-7293-g3eff57aa

2021-03-29 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97252 Alex Coplan changed: What|Removed |Added Resolution|--- |FIXED Summary|[10 Regression] a

[Bug target/99216] ICE in aarch64_sve::function_expander::expand() with LTO

2021-03-29 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99216 --- Comment #8 from Alex Coplan --- Fixed on trunk. Needs backporting to GCC 10 together with bump to lto-streamer.h:LTO_minor_version.

[Bug target/99813] New: SVE: Invalid assembly at -O3 (multiplier out of range in incb instruction)

2021-03-29 Thread acoplan at gcc dot gnu.org via Gcc-bugs
: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- The following fails: $ cat test.cc long a, b; bool c[2][14][2][16], f[2][14][2][16]; bool d; char e[2][4][2][6]; void g

[Bug target/99792] New: MVE: Assemble failure with "branch out of range" at -O3

2021-03-26 Thread acoplan at gcc dot gnu.org via Gcc-bugs
ty: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- The following fails: $ cat test.c short a[2][19][6][844]; char b[2][19][40]; long long c[2][722]; void d() { for (int e; e < 2;

[Bug target/99766] [11 Regression] ICE: unable to generate reloads with SVE code since r11-7807-gbe70bb5e

2021-03-26 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99766 --- Comment #7 from Alex Coplan --- Here is a testcase with SVE intrinsics that ICEs in the same way at -Os: $ cat test.cc #include char a; void c(unsigned &, const unsigned &); void d(char, bool, short, int, int, char e, int, short f, unsigned

[Bug target/99773] ARM v8.1-m MVE interaction with -mfloat-abi not clear

2021-03-25 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99773 Alex Coplan changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug target/96582] aarch64:ICE during GIMPLE pass: veclower

2021-03-25 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96582 Alex Coplan changed: What|Removed |Added CC||acoplan at gcc dot gnu.org --- Comment #5

[Bug target/99758] ICE in setup_preferred_alternate_classes_for_new_pseudos, at ira.c:2772

2021-03-25 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99758 Alex Coplan changed: What|Removed |Added CC||acoplan at gcc dot gnu.org

[Bug c/99768] New: [11 Regression] Bogus -Wuninitialized diagnostic with type punning

2021-03-25 Thread acoplan at gcc dot gnu.org via Gcc-bugs
Priority: P3 Component: c Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- For the following code (which has a strict aliasing violation): float foo(unsigned v) { unsigned tmp = v; float *f = (float

[Bug target/99766] [11 Regression] ICE: unable to generate reloads with SVE code since r11-7807-gbe70bb5e

2021-03-25 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99766 Alex Coplan changed: What|Removed |Added Summary|[11 Regression] ICE: unable |[11 Regression] ICE: unable

[Bug target/99766] [11 Regression] ICE: unable to generate reloads with SVE code

2021-03-25 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99766 --- Comment #2 from Alex Coplan --- The above ICEs with just -O3 -march=armv8.2-a+sve.

[Bug target/99766] [11 Regression] ICE: unable to generate reloads with SVE code

2021-03-25 Thread acoplan at gcc dot gnu.org via Gcc-bugs
|1 Status|UNCONFIRMED |NEW CC||acoplan at gcc dot gnu.org --- Comment #1 from Alex Coplan --- Confirmed. Here is a testcase without the includes: typedef float a __attribute__((__mode__(HF))); typedef

[Bug target/99727] [11 Regression] MVE: ICE (segfault) in arm_print_operand at -O3 since r11-6616-g25bef689

2021-03-24 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99727 --- Comment #5 from Alex Coplan --- Thanks for the quick fix :)

[Bug target/99748] MVE: Wrong code at -O0 with float to integer conversion

2021-03-24 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99748 --- Comment #2 from Alex Coplan --- GCC 10 also has the issue, so not a regression.

[Bug target/99748] MVE: Wrong code at -O0 with float to integer conversion

2021-03-24 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99748 --- Comment #1 from Alex Coplan --- I should have mentioned, I found this because a number of the execution tests are failing when testing with --with-arch=armv8.1-m.main+mve --with-float=hard.

[Bug target/99748] New: MVE: Wrong code at -O0 with float to integer conversion

2021-03-24 Thread acoplan at gcc dot gnu.org via Gcc-bugs
Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- GCC miscompiles the following testcase: int main() { float a = 1.0f; return (int)a != 1; } with -march=armv8.1-m.main+mve -mfloat-abi=hard

[Bug target/99727] [11 Regression] MVE: ICE (segfault) in arm_print_operand at -O3 since r11-6616-g25bef689

2021-03-23 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99727 Alex Coplan changed: What|Removed |Added CC||clyon at gcc dot gnu.org Summar

[Bug target/99727] [11 Regression] MVE: ICE (segfault) in arm_print_operand at -O3

2021-03-23 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99727 Alex Coplan changed: What|Removed |Added Known to fail||11.0 Known to work|

[Bug target/99727] New: [11 Regression] MVE: ICE (segfault) in arm_print_operand at -O3

2021-03-23 Thread acoplan at gcc dot gnu.org via Gcc-bugs
Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- The following fails: $ cat test.c char a[7][25][15][14]; void b() { for (int c;; ++c) for (int d = 0; d < 25; ++d) for (

[Bug target/99725] New: arm: ICE in dwarf2out_frame_debug_adjust_cfa with -mcmse

2021-03-23 Thread acoplan at gcc dot gnu.org via Gcc-bugs
Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- The following fails: $ cat test.c typedef int __attribute__((cmse_nonsecure_call)) (*t)(); t f; void g() { f(); } $ arm-eabi-gcc -c test.c

[Bug target/99723] arm: ICE in build_function_type during selftests

2021-03-23 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99723 Alex Coplan changed: What|Removed |Added Target|aarch64 |arm --- Comment #1 from Alex Coplan --- @

[Bug target/99723] New: arm: ICE in build_function_type during selftests

2021-03-23 Thread acoplan at gcc dot gnu.org via Gcc-bugs
: target Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- If I configure a cross arm GCC with: --enable-languages=c,c++ --disable-bootstrap --target=arm-linux-gnueabihf --with-arch=armv8-a --with-float=hard and run `make all

[Bug target/97252] [10 Regression] arm: ICE compiling pure-code/pr94538-2.c with MVE since r10-7293-g3eff57aa

2021-03-22 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97252 Alex Coplan changed: What|Removed |Added Summary|[10/11 Regression] arm: ICE |[10 Regression] arm: ICE

[Bug target/99540] [10/11 Regression] ICE: Segmentation fault in aarch64_add_offset

2021-03-19 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99540 --- Comment #3 from Alex Coplan --- *** Bug 99554 has been marked as a duplicate of this bug. ***

[Bug rtl-optimization/99554] [10/11 Regression] SVE: ICE (segfault) in recog.c:extract_asm_operands during expand

2021-03-19 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99554 Alex Coplan changed: What|Removed |Added Resolution|--- |DUPLICATE Status|NEW

[Bug target/99647] arm: GCC generates invalid MVE vmov instruction

2021-03-18 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99647 --- Comment #1 from Alex Coplan --- Also fails for GCC 10. Not sure if this counts as a regression since MVE only went in with GCC 10.

[Bug target/99647] New: arm: GCC generates invalid MVE vmov instruction

2021-03-18 Thread acoplan at gcc dot gnu.org via Gcc-bugs
: target Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- We generate invalid assembly for the following testcase: $ cat test.c typedef int __attribute((vector_size(16))) V; V f(void) { return (V){ (int)f, (int)f, (int)f, (int

[Bug target/97252] [10/11 Regression] arm: ICE compiling pure-code/pr94538-2.c with MVE since r10-7293-g3eff57aa

2021-03-17 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97252 Alex Coplan changed: What|Removed |Added Assignee|unassigned at gcc dot gnu.org |acoplan at gcc dot gnu.org

[Bug target/97252] [10/11 Regression] arm: ICE compiling pure-code/pr94538-2.c with MVE since r10-7293-g3eff57aa

2021-03-16 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97252 --- Comment #3 from Alex Coplan --- FWIW, for the related testcase (which we also ICE on): typedef int __attribute((vector_size(16))) V; V v; void f() { v = (V){4095}; } clang pushes the constant out to the constant pool: $ clang -target arm i

[Bug target/97252] [10/11 Regression] arm: ICE compiling pure-code/pr94538-2.c with MVE since r10-7293-g3eff57aa

2021-03-16 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97252 --- Comment #2 from Alex Coplan --- > Unless I'm missing something, I don't think "Uxi" is a valid constraint. > Perhaps the "Ux" constraint was intended instead? D'oh, this is of course the union of the Ux (MVE-specific) constraint and the "i"

[Bug target/99596] [11 Regression] arm: internal error in single_pred_edge

2021-03-15 Thread acoplan at gcc dot gnu.org via Gcc-bugs
||arm CC||acoplan at gcc dot gnu.org, ||rsandifo at gcc dot gnu.org Keywords||ice-on-valid-code Status|UNCONFIRMED |NEW Ever

[Bug target/97252] [10/11 Regression] arm: ICE compiling pure-code/pr94538-2.c with MVE since r10-7293-g3eff57aa

2021-03-15 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97252 Alex Coplan changed: What|Removed |Added Last reconfirmed||2021-03-15 Known to fail|

[Bug target/99560] aarch64: ICE (segfault) in LRA with SVE intrinsics

2021-03-12 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99560 Alex Coplan changed: What|Removed |Added Target Milestone|--- |10.3 Keywords|

[Bug target/99560] New: aarch64: ICE (segfault) in LRA with SVE intrinsics

2021-03-12 Thread acoplan at gcc dot gnu.org via Gcc-bugs
: target Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- For the following testcase on AArch64: #include int foo(int x, int y); void bar(int f, int g, int h, int i, int *j, int k[3][8][7]) { while (1) { int p = i ? foo

[Bug target/99540] [10/11 Regression] ICE: Segmentation fault in aarch64_add_offset

2021-03-11 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99540 Alex Coplan changed: What|Removed |Added CC||acoplan at gcc dot gnu.org --- Comment #2

[Bug rtl-optimization/99554] [10/11 Regression] SVE: ICE (segfault) in recog.c:extract_asm_operands during expand

2021-03-11 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99554 Alex Coplan changed: What|Removed |Added Known to fail||10.2.1 Known to work|

[Bug rtl-optimization/99554] [10/11 Regression] SVE: ICE (segfault) in recog.c:extract_asm_operands during expand

2021-03-11 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99554 Alex Coplan changed: What|Removed |Added Summary|SVE: ICE (segfault) in |[10/11 Regression] SVE: ICE

[Bug rtl-optimization/99554] New: SVE: ICE (segfault) in recog.c:extract_asm_operands during expand

2021-03-11 Thread acoplan at gcc dot gnu.org via Gcc-bugs
Priority: P3 Component: rtl-optimization Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- The following fails: $ cat test.cc int a[21][256]; void b() { for (long c; c; ++c) for (long d = 0; d < 16;

[Bug target/99381] SVE: ICE with ACLE intrinsics when missing -march=armv8.2-a+sve

2021-03-11 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99381 Alex Coplan changed: What|Removed |Added Resolution|--- |FIXED Status|ASSIGNED

[Bug tree-optimization/99523] Declarations for variable names missing in GIMPLE dump

2021-03-11 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99523 --- Comment #5 from Alex Coplan --- Thanks for the fix!

[Bug tree-optimization/99523] New: Declarations for variable names missing in GIMPLE dump

2021-03-10 Thread acoplan at gcc dot gnu.org via Gcc-bugs
Component: tree-optimization Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- For the following testcase: int f(__builtin_va_list *ap) { return __builtin_va_arg(*ap, int); } on AArch64 at -O2 with -fdump-tree-optimized=-, we get

[Bug tree-optimization/97104] [11 Regression] aarch64, SVE: ICE in vect_get_loop_mask since r11-3070-g783dc66f9cc

2021-03-09 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97104 Alex Coplan changed: What|Removed |Added Resolution|--- |FIXED Status|NEW

[Bug tree-optimization/97104] [11 Regression] aarch64, SVE: ICE in vect_get_loop_mask since r11-3070-g783dc66f9cc

2021-03-09 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97104 --- Comment #5 from Alex Coplan --- I have a bisect in progress.

[Bug rtl-optimization/99469] ICE: qsort checking failed with selective scheduling on aarch64

2021-03-08 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99469 --- Comment #1 from Alex Coplan --- FWIW this is easy to reproduce with either csmith or yarpgen, so should be straightforward to procure a new testcase if the above goes latent.

[Bug rtl-optimization/99469] New: ICE: qsort checking failed with selective scheduling on aarch64

2021-03-08 Thread acoplan at gcc dot gnu.org via Gcc-bugs
Priority: P3 Component: rtl-optimization Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- The following fails: $ cat test.c typedef struct { int a[3]; } s; s ss[1][5][8]; int g(); void h(s); int foo(char

[Bug target/99216] ICE in aarch64_sve::function_expander::expand() with LTO

2021-03-05 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99216 --- Comment #6 from Alex Coplan --- Ok, I'll have a go, thanks.

[Bug target/99216] ICE in aarch64_sve::function_expander::expand() with LTO

2021-03-05 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99216 --- Comment #4 from Alex Coplan --- Right, the problem appears to be to do with the way that overloaded functions are implemented for the ACLE. Specifically the m_direct_overloads flag in aarch64_sve::function_builder. If this flag is set, we reg

[Bug target/99216] ICE in aarch64_sve::function_expander::expand() with LTO

2021-03-04 Thread acoplan at gcc dot gnu.org via Gcc-bugs
gcc dot gnu.org |acoplan at gcc dot gnu.org --- Comment #3 from Alex Coplan --- I'll take a look

[Bug target/99381] SVE: ICE with ACLE intrinsics when missing -march=armv8.2-a+sve

2021-03-04 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99381 Alex Coplan changed: What|Removed |Added Ever confirmed|0 |1 Last reconfirmed|

[Bug target/99381] SVE: ICE with ACLE intrinsics when missing -march=armv8.2-a+sve

2021-03-04 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99381 --- Comment #2 from Alex Coplan --- Fixed on trunk. Needs backporting to GCC 10.

[Bug target/99381] New: SVE: ICE with ACLE intrinsics when missing -march=armv8.2-a+sve

2021-03-04 Thread acoplan at gcc dot gnu.org via Gcc-bugs
Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- For the following C testcase: #include _Bool a; int main() { a = svaddv(svptrue_b8(), svdup_s8(0)); } we ICE while printing a

[Bug target/99252] New: SVE: ICE in maybe_legitimize_operand with LTO

2021-02-24 Thread acoplan at gcc dot gnu.org via Gcc-bugs
: target Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- Presumably related to PR99216 since we fail to compile a simpler call to svaddv with LTO there (although we're ICEing in a different place). $ cat test.cc #include int

[Bug target/99249] New: SVE: ICE in aarch64_expand_sve_const_vector (during RTL pass: early_remat)

2021-02-24 Thread acoplan at gcc dot gnu.org via Gcc-bugs
: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- The following fails: $ cat test.cc #include extern char b[]; int x; void f() { while (x) { x = svaddv

[Bug target/99216] ICE in aarch64_sve::function_expander::expand() with LTO

2021-02-23 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99216 --- Comment #2 from Alex Coplan --- This one ICEs at all optimization levels (not just -O0): #include unsigned long long a; void b(unsigned long long *c, int e) { *c ^= e; } bool d; int main() { d = svaddv(svptrue_pat_b8(SV_VL16), svdup_s8(0)

[Bug target/99216] New: ICE in aarch64_sve::function_expander::expand() with LTO

2021-02-23 Thread acoplan at gcc dot gnu.org via Gcc-bugs
Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- The following fails: $ cat test.cc #include bool a; int main() { a = svaddv(svptrue_b8(), svdup_s8(0)); } $ aarch64-linux-gnu-gcc -march

[Bug target/98196] [11 Regression] aarch64: Wrong code at -O3 -march=armv8.2-a+sve -msve-vector-bits=256 -fvect-cost-model=unlimited

2021-02-18 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98196 --- Comment #6 from Alex Coplan --- g:0411210fddbd3ec27c8dc1183f40f662712a2232

[Bug rtl-optimization/98791] [11 Regression] ICE in paradoxical_subreg_p (in ira) with SVE

2021-02-15 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98791 --- Comment #3 from Alex Coplan --- And here is a testcase (using SVE intrinsics) that ICEs without the param: #include extern char a[11]; extern long b[]; void f() { for (int d; d < 10; d++) { a[d] = svaddv(svptrue_b8(), svdup_u8(0));

[Bug target/99102] [11 Regression] SVE: Wrong code with -O2 -ftree-vectorize -march=armv8.2-a+sve -msve-vector-bits=256

2021-02-15 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99102 Alex Coplan changed: What|Removed |Added Summary|SVE: Wrong code with -O2|[11 Regression] SVE: Wrong

[Bug target/99102] New: SVE: Wrong code with -O2 -ftree-vectorize -march=armv8.2-a+sve -msve-vector-bits=256

2021-02-15 Thread acoplan at gcc dot gnu.org via Gcc-bugs
Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- AArch64 GCC miscompiles the following testcase: long a[44]; short d, e = -7; void b(char f, short j, short k

[Bug target/98931] New: arm: Assembly fails with "branch out of range or not a multiple of 2"

2021-02-02 Thread acoplan at gcc dot gnu.org via Gcc-bugs
ty: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- GCC's output fails to assemble for the following: $ cat test.c extern long long a[][20][26][26][22]; void foo() {

[Bug target/98917] SVE: wrong code with -O -ftree-vectorize -msve-vector-bits=128 --param=aarch64-autovec-preference=2

2021-02-01 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98917 --- Comment #2 from Alex Coplan --- (In reply to ktkachov from comment #1) > Is this a 11 regression? It's hard to tell given the dependency on --param=aarch64-autovec-preference=2.

[Bug target/98917] New: SVE: wrong code with -O -ftree-vectorize -msve-vector-bits=128 --param=aarch64-autovec-preference=2

2021-02-01 Thread acoplan at gcc dot gnu.org via Gcc-bugs
Status: UNCONFIRMED Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- Created attachment 50109 --> https://gcc.gnu.org/bugzilla/attachment.cgi

[Bug rtl-optimization/98791] [11 Regression] ICE in paradoxical_subreg_p (in ira) with SVE, LTO

2021-02-01 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98791 --- Comment #2 from Alex Coplan --- Here is a non-LTO testcase that fails with -O -ftree-vectorize -march=armv8.2-a+sve --param=aarch64-autovec-preference=3: extern char a[], b[]; short c, d; long *e; void f() { for (int g; g < c; g += 1) {

[Bug rtl-optimization/98791] New: ICE in paradoxical_subreg_p (in ira) with SVE, LTO

2021-01-22 Thread acoplan at gcc dot gnu.org via Gcc-bugs
: rtl-optimization Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- The following fails: $ cat test.c extern char a[]; extern long b[]; void c(unsigned d, unsigned long long g[][13]) { for (int f = 0; f < 24; f += d - 45

[Bug tree-optimization/97960] [8/9/10/11 Regression] Wrong code at -O3 since r8-6511-g3ae129323d

2021-01-22 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97960 --- Comment #7 from Alex Coplan --- FWIW, the testcase now exits cleanly on AArch64 with current trunk.

[Bug tree-optimization/98766] New: SVE: ICE in tree_to_shwi with -O3 --param=avoid-fma-max-bits

2021-01-20 Thread acoplan at gcc dot gnu.org via Gcc-bugs
Priority: P3 Component: tree-optimization Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- The following fails: $ cat test.c extern int a[]; void c(short *d) { for (int e = 0; e < 9; e++) a[e] = d[e]

[Bug tree-optimization/98726] SVE: tree check: expected integer_cst, have poly_int_cst in to_wide, at tree.h:5984

2021-01-18 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98726 Alex Coplan changed: What|Removed |Added Target Milestone|--- |11.0 Known to fail|

[Bug tree-optimization/98726] New: aarch64: tree check: expected integer_cst, have poly_int_cst in to_wide, at tree.h:5984

2021-01-18 Thread acoplan at gcc dot gnu.org via Gcc-bugs
Severity: normal Priority: P3 Component: tree-optimization Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- The following fails: $ cat test.c int a, c; char b; int d() { a = 0; for (; a <= 21; a = (sh

[Bug tree-optimization/98268] [10 Regression] ICE: verify_gimple failed with LTO and SVE

2021-01-18 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98268 --- Comment #5 from Alex Coplan --- Ah, sorry, I hit this with a VLA compile on trunk, so the full command line is: $ aarch64-elf-gcc a.c b.c -flto -O1 -ftree-vectorize -march=armv8.2-a+sve --param=aarch64-autovec-preference=3 with the above so

[Bug tree-optimization/98268] ICE: verify_gimple failed with LTO and SVE

2021-01-18 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98268 --- Comment #3 from Alex Coplan --- Adding --param=aarch64-autovec-preference=3 I can reproduce the ICE on trunk.

[Bug tree-optimization/97104] [11 Regression] aarch64, SVE: ICE in vect_get_loop_mask since r11-3070-g783dc66f9cc

2021-01-14 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97104 --- Comment #3 from Alex Coplan --- Seems to have gone latent for the previous testcases, but still ICEs for: extern int a[]; extern long b[]; char c; long d; void e(_Bool f[], long g[]) { for (int h; h; h += 1) { a[h] = c < f[0]; b[h]

[Bug target/98681] aarch64: Invalid ubfiz instruction rejected by assembler

2021-01-14 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98681 Alex Coplan changed: What|Removed |Added Target Milestone|--- |11.0

[Bug target/98681] New: aarch64: Invalid ubfiz instruction rejected by assembler

2021-01-14 Thread acoplan at gcc dot gnu.org via Gcc-bugs
Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: acoplan at gcc dot gnu.org Target Milestone: --- AArch64 GCC generates an invalid ubfiz instruction for the following testcase: extern unsigned char a[]; int b; void c() { for (int d; d

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