[Bug other/44658] ARM/NEON VSHLL instruction/intrinsic must allow shifts by 0

2010-06-24 Thread gmcgrath at yahoo dot com
--- Comment #2 from gmcgrath at yahoo dot com 2010-06-24 18:16 --- It is seen at the highest level in GCC using the ARM NEON intrinsic: uint16x8_t vshll_n_u8(uint8x8_t a, __constrange(0,8) int b); -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44658

[Bug other/44658] New: ARM/NEON VSHLL instruction/intrinsic must allow shifts by 0

2010-06-24 Thread gmcgrath at yahoo dot com
gcc dot gnu dot org ReportedBy: gmcgrath at yahoo dot com http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44658

[Bug inline-asm/41538] Mixing ARM/NEON intrinsic variables and inline assembly

2010-03-15 Thread gmcgrath at yahoo dot com
--- Comment #6 from gmcgrath at yahoo dot com 2010-03-15 22:11 --- It seems to work in 4.4.0. The code: register int16x8_t a asm ("q7"); asm ( "vadd.i32 %q0, %q1, %q2 \n\t" : "=w" (a) : "w" (b), "w" (c) );

[Bug inline-asm/41538] Mixing ARM/NEON intrinsic variables and inline assembly

2010-03-11 Thread gmcgrath at yahoo dot com
--- Comment #4 from gmcgrath at yahoo dot com 2010-03-11 21:48 --- Bug 37188 answers half the problem. It still does not answer why: register int16x8_t val asm ("q0"); compiles without warning yet does not put "val" into the "q0" NEON register.

[Bug inline-asm/41538] New: Mixing ARM/NEON intrinsic variables and inline assembly

2009-10-01 Thread gmcgrath at yahoo dot com
mbly nearly impossible for NEON code. -- Summary: Mixing ARM/NEON intrinsic variables and inline assembly Product: gcc Version: unknown Status: UNCONFIRMED Severity: major Priority: P3 Component: inline-asm As